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* ilo: simplify setting of shader samplers and viewsChia-I Wu2013-08-071-44/+33
* ilo: correctly check for stencil ref changeChia-I Wu2013-08-071-1/+1
* draw: fix slot detectionZack Rusin2013-08-062-2/+1
* gallivm: Fix build - Remove TargetOptions.RealignStack for llvm>=3.4Laurent Carlier2013-08-061-0/+2
* i965: Add #defines for the MI_LOAD_REGISTER_MEM command.Kenneth Graunke2013-08-061-0/+4
* i965: Initialize the intel_context::bufmgr pointer earlier.Kenneth Graunke2013-08-061-2/+1
* i965: Tidy preprocessor macros for SO_PRIM_STORAGE_NEEDED registers.Kenneth Graunke2013-08-061-5/+2
* i965: Tidy preprocessor macros for SO_NUM_PRIMS_WRITTEN registers.Kenneth Graunke2013-08-062-7/+4
* nvc0: don't access array out of bounds on unexpected sample countChristoph Bumiller2013-08-061-2/+1
* nv50: handle pure integer vertex attributesEmil Velikov2013-08-062-2/+14
* nvc0: implement MP performance counters for nvc0:nvd9Samuel Pitoiset2013-08-062-93/+370
* nvc0: implement compute support for nvc0Samuel Pitoiset2013-08-069-32/+706
* nvc0: add more MP counters for nve4Samuel Pitoiset2013-08-063-14/+47
* mesa: Generate a renderbuffer wrapper even if the texture has no imageIan Romanick2013-08-061-2/+3
* mesa: Validate the layer selection of an array texture tooIan Romanick2013-08-061-4/+30
* mesa: Don't call driver RenderTexture for invalid zoffsetIan Romanick2013-08-061-0/+6
* mesa: Don't call driver RenderTexture for really broken texturesIan Romanick2013-08-061-2/+20
* mesa: Remove stray debug printfs in attachment completeness codeIan Romanick2013-08-061-2/+0
* mesa: Treat glBindFramebuffer and glBindFramebufferEXT more correctlyIan Romanick2013-08-063-12/+20
* mesa: Treat glBindRenderbuffer and glBindRenderbufferEXT correctlyIan Romanick2013-08-063-8/+19
* radeonsi: Number of SGPRs retrieved from LLVM already includes VCCMichel Dänzer2013-08-061-8/+8
* i965: Don't allocate curbe buffers on Gen6+.Kenneth Graunke2013-08-061-2/+4
* llvmpipe: Do not need to free anything if there is no geometry shader.Vinson Lee2013-08-051-2/+5
* nvc0: Initialize ptr for unexpected sample_count on release builds.Vinson Lee2013-08-051-0/+1
* draw: Change slot from unsigned to int.Vinson Lee2013-08-051-1/+1
* postprocess: Check ppq is null before calling pp_free_bos.Vinson Lee2013-08-051-1/+3
* draw: add back separate input assemblerZack Rusin2013-08-036-4/+351
* draw: implement proper primitive assembler as a pipeline stageZack Rusin2013-08-0312-352/+280
* draw: fix front face injectionZack Rusin2013-08-031-9/+15
* tgsi: remove unneeded File == TGSI_FILE_INPUT testBrian Paul2013-08-051-1/+0
* tgsi: clean up tgsi_scan_shader() functionBrian Paul2013-08-051-41/+42
* llvmpipe: fix frontface behavior againZack Rusin2013-08-021-3/+11
* r600g/sb: Dump correct value for CND.Vinson Lee2013-08-041-1/+1
* intel_fbo: remove unused intel_renderbuffer hiz functionsJordan Justen2013-08-042-26/+0
* i965 clear/draw: set renderbuffer attachment as needing depth resolveJordan Justen2013-08-042-2/+4
* i965: add intel_renderbuffer_att_set_needs_depth_resolveJordan Justen2013-08-042-0/+18
* i965: add intel_miptree_set_all_slices_need_depth_resolveJordan Justen2013-08-042-0/+16
* i965 gen7: don't set FORCE_ZERO_RTAINDEX for layered renderingJordan Justen2013-08-041-1/+1
* hsw hiz: Remove x/y offset restriction for hizJordan Justen2013-08-041-24/+0
* gen7 depth surface: program 3DSTATE_DEPTH_BUFFER to top of surfaceJordan Justen2013-08-044-66/+45
* gen7 fbo: make unmatched depth/stencil configs return unsupportedJordan Justen2013-08-041-0/+16
* hsw hiz: Add new size restrictions for miplevels > 0Jordan Justen2013-08-041-3/+13
* gen7 blorp depth: calculate base surface width/heightJordan Justen2013-08-041-0/+13
* gen7 depth surface: calculate minimum array element being renderedJordan Justen2013-08-042-0/+17
* gen7 depth surface: calculate LOD being rendered toJordan Justen2013-08-042-0/+6
* gen7 depth surface: calculate depth (array size) for depth surfaceJordan Justen2013-08-042-0/+5
* gen7 depth surface: calculate more specific surface typeJordan Justen2013-08-042-0/+47
* i965: init global state first in brw_workaround_depthstencil_alignmentJordan Justen2013-08-041-5/+14
* nv50: fix some h264 interlaced decoding on vp2Ilia Mirkin2013-08-032-7/+8
* llvmpipe: don't interpolate front face or prim idZack Rusin2013-08-021-15/+13
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