| Commit message (Expand) | Author | Age | Files | Lines |
* | i965/nir/vec4: Implement "bool<->int,float" format conversion | Antia Puentes | 2015-08-03 | 1 | -0/+19 |
* | i965/nir/vec4: Implement logical operators | Antia Puentes | 2015-08-03 | 1 | -0/+16 |
* | i965/nir/vec4: Implement non-equality ops on vectors | Antia Puentes | 2015-08-03 | 1 | -0/+34 |
* | i965/nir/vec4: Implement equality ops on vectors | Antia Puentes | 2015-08-03 | 1 | -0/+33 |
* | i965/nir/vec4: Implement non-vector comparison ops | Antia Puentes | 2015-08-03 | 1 | -0/+14 |
* | i965/nir: Add utility method for comparisons | Antia Puentes | 2015-08-03 | 1 | -0/+39 |
* | i965/nir/vec4: Derivatives are not allowed in VS | Antia Puentes | 2015-08-03 | 1 | -0/+8 |
* | i965/nir/vec4: Implement min/max operations | Antia Puentes | 2015-08-03 | 1 | -0/+14 |
* | i965/vec4: Return the emitted instruction in emit_minmax() | Antia Puentes | 2015-08-03 | 2 | -3/+5 |
* | i965/nir/vec4: Implement various rounding functions | Antia Puentes | 2015-08-03 | 1 | -0/+35 |
* | i965/nir/vec4: Implement carry/borrow for addition/subtraction | Antia Puentes | 2015-08-03 | 1 | -0/+16 |
* | i965/nir/vec4: Implement more math operations | Antia Puentes | 2015-08-03 | 1 | -0/+52 |
* | i965/vec4: Return the last emitted instruction in emit_math() | Antia Puentes | 2015-08-03 | 2 | -4/+7 |
* | i965/nir/vec4: Implement multiplication | Antia Puentes | 2015-08-03 | 1 | -0/+44 |
* | i965/nir/vec4: Implement the addition operation | Antia Puentes | 2015-08-03 | 1 | -0/+7 |
* | i965/nir/vec4: Implement int<->float format conversion ops | Antia Puentes | 2015-08-03 | 1 | -0/+11 |
* | i965/nir/vec4: Lower "vecN" instructions and mark them unreachable | Antia Puentes | 2015-08-03 | 2 | -0/+10 |
* | i965/nir/vec4: Implement single-element "mov" operations | Antia Puentes | 2015-08-03 | 1 | -0/+13 |
* | i965/nir: Disable alu_to_scalar pass on non-scalar shaders | Alejandro Piñeiro | 2015-08-03 | 1 | -6/+10 |
* | i965/nir/vec4: Prepare source and destination registers for ALU operations | Antia Puentes | 2015-08-03 | 1 | -1/+18 |
* | i965/nir/vec4: Implement loading values from an UBO | Antia Puentes | 2015-08-03 | 1 | -2/+59 |
* | i965/nir/vec4: Implement atomic counter intrinsics (read, inc and dec) | Alejandro Piñeiro | 2015-08-03 | 1 | -2/+25 |
* | i965/nir/vec4: Implement load_uniform intrinsic | Iago Toral Quiroga | 2015-08-03 | 1 | -2/+24 |
* | i965/nir/vec4: Implement intrinsics that load system values | Alejandro Piñeiro | 2015-08-03 | 1 | -6/+21 |
* | i965/nir/vec4: Implement store_output intrinsic | Eduardo Lima Mitev | 2015-08-03 | 2 | -3/+19 |
* | i965/vec4: Make sure that register types always match during emit_urb_slot() | Eduardo Lima Mitev | 2015-08-03 | 1 | -5/+10 |
* | i965/nir/vec4: Implement load_input intrinsic | Eduardo Lima Mitev | 2015-08-03 | 1 | -2/+20 |
* | i965/nir/vec4: Implement loop statements (nir_cf_node_loop) | Eduardo Lima Mitev | 2015-08-03 | 1 | -1/+5 |
* | i965/nir/vec4: Implement conditional statements (nir_cf_node_if) | Iago Toral Quiroga | 2015-08-03 | 1 | -1/+15 |
* | i965/nir/vec4: Add get_nir_dst() and get_nir_src() methods | Eduardo Lima Mitev | 2015-08-03 | 2 | -0/+83 |
* | i965/nir: Move brw_type_for_nir_type() to brw_nir to allow reuse | Eduardo Lima Mitev | 2015-08-03 | 3 | -18/+21 |
* | i965/nir/vec4: Implement load_const intrinsic | Eduardo Lima Mitev | 2015-08-03 | 3 | -2/+20 |
* | i965/vec4: Add auxiliary func to build a writemask from a component size | Eduardo Lima Mitev | 2015-08-03 | 1 | -0/+6 |
* | i965/nir: Dot not assign direct uniform locations first for vec4-based shaders | Iago Toral Quiroga | 2015-08-03 | 1 | -4/+10 |
* | nir/nir_lower_io: Add vec4 support | Iago Toral Quiroga | 2015-08-03 | 3 | -33/+86 |
* | i965/nir: Pass a is_scalar boolean to brw_create_nir() | Eduardo Lima Mitev | 2015-08-03 | 5 | -7/+12 |
* | i965/nir/vec4: Add shader function implementation | Eduardo Lima Mitev | 2015-08-03 | 2 | -1/+11 |
* | i965/nir/vec4: Add setup for system values | Alejandro Piñeiro | 2015-08-03 | 2 | -1/+50 |
* | i965/vec4: Redefine make_reg_for_system_value() to allow reuse in NIR->vec4 pass | Alejandro Piñeiro | 2015-08-03 | 8 | -11/+19 |
* | i965/nir/vec4: Add setup of uniform variables | Iago Toral Quiroga | 2015-08-03 | 2 | -3/+97 |
* | i965/nir/vec4: Add setup of input variables in NIR->vec4 pass | Eduardo Lima Mitev | 2015-08-03 | 2 | -1/+12 |
* | i965/vec4: Move type_size() method to brw_vec4_visitor class | Eduardo Lima Mitev | 2015-08-03 | 2 | -6/+17 |
* | i965/nir/vec4: Select between new nir_vec4 or current vec4_visitor code-paths | Eduardo Lima Mitev | 2015-08-03 | 2 | -10/+22 |
* | i965/nir/vec4: Add implementation placeholders for a new NIR->vec4 pass | Eduardo Lima Mitev | 2015-08-03 | 3 | -0/+273 |
* | mesa: Replace F_TO_I() with _mesa_lroundevenf(). | Matt Turner | 2015-08-03 | 6 | -42/+42 |
* | mesa: Add -fno-trapping-math to CFLAGS. | Matt Turner | 2015-08-03 | 1 | -2/+2 |
* | mesa: Add -fno-math-errno to CFLAGS. | Matt Turner | 2015-08-03 | 1 | -0/+3 |
* | r600,compute: force tiling on 2D and 3D texture compute resources | Zoltan Gilian | 2015-08-03 | 1 | -2/+9 |
* | clover: handle setKernelArg errors | Zoltan Gilian | 2015-08-03 | 1 | -0/+15 |
* | clover: fix image resource depth and array_size | Zoltan Gilian | 2015-08-03 | 2 | -1/+2 |