summaryrefslogtreecommitdiffstats
Commit message (Collapse)AuthorAgeFilesLines
* identity: Add new identity driverJakob Bornecrantz2009-06-2412-5/+1716
| | | | | | | | | | | | This driver does no transformation of the gallium calls going to the real driver, like the identity matrix. It is intended to be the basis for transforming and/or debug drivers like trace and rbug. Authors of this patch are: Michal Krol, orignal heavy lifting. José Fonesca, object wrapping code stolen from trace. Jakob Bornecrantz, put it all toghether and renamed a stuff.
* i965: Disable texture tiling by default.Eric Anholt2009-06-231-5/+1
| | | | | I haven't fixed all the regressions yet, and it'll be easy to re-enable when the known problems are fixed.
* i965: Set the max index buffer address correctly according to the docs.Eric Anholt2009-06-231-1/+1
| | | | It's the last addressable byte, not the byte after the end of the buffer.
* i965: Don't set a reserved bit in MI_FLUSH.Eric Anholt2009-06-231-1/+1
| | | | | I noticed this when this MI_FLUSH showed up in IPEHR for the ut2004 hang. Not setting the reserved bit didn't help, though.
* dri2: Refresh the fake front contents after glXSwapBuffers().Eric Anholt2009-06-231-0/+7
| | | | | | Bug #19177. Reviewed by: Ian Romanick <[email protected]>
* i965: Fix depth-texture Y-tiling detection for sized internal formats.Eric Anholt2009-06-234-3/+9
| | | | Fixes assertion failure on norsetto shadow mapping demo.
* i965: Fix packed depth/stencil textures to be Y-tiled as well.Eric Anholt2009-06-232-1/+4
| | | | Fixes shadowtex.c. And an assert is added to catch this sooner next time.
* intel: Bail on blits with non-tile-aligned offsets.Eric Anholt2009-06-231-6/+18
|
* intel: Avoid trying to do blits to Y tiled regions.Eric Anholt2009-06-2310-90/+137
| | | | | | | | This is somewhat nasty, but we need to do Y-tiled depth for FBO support. May help with corruption and hangs since enabling texture tiling, and since switching depth textures to Y tiled. Fixes piglit depthtex.c on 965.
* intel: Fix some potential writes to zero-copy PBOs when used as regions.Eric Anholt2009-06-235-10/+13
| | | | | | I was in the midst of fixing some blitting-with-Y-tiled issues when I noticed this. Hopefully PBO usage will be a little more robust, as a result.
* intel: Remove long-unused intel_region_fill and intelEmitFillBlit.Eric Anholt2009-06-234-106/+0
|
* intel: Refuse to do texture tiling if we don't have the kernel support.Eric Anholt2009-06-231-0/+6
|
* Fix crash when debug output is enabled and sarea is notset in r200ClearPauli Nieminen2009-06-231-1/+4
|
* mesa: From float type modifier from values to large for singlesIan Romanick2009-06-221-7/+7
| | | | | | | | The values 2147483648.0 and 4294967294.0 are too larget to be stored in single precision floats. Forcing these to be singles causes bits to be lost, which results in errors in some pixel transfer tests. This fixes bug #22344.
* st/mesa: fix setup_edgeflags() regressionBrian Paul2009-06-221-1/+3
| | | | | stobj is now non-null for the default/null buffer object. Update the test to check the buffer ID to see if it's a real buffer object.
* gallium-intel: Improve Xorg Makefile a bitJakob Bornecrantz2009-06-221-15/+27
| | | | | The real solution is to create a Makefile.template for xorg drivers and use that here.
* st/xorg: Convert to template makefileJakob Bornecrantz2009-06-221-24/+13
|
* st/dri: Fix typo when checking for depth formatsJakob Bornecrantz2009-06-221-1/+1
|
* i965: Fix warnings in intel_pixel_read.c.Eric Anholt2009-06-221-0/+4
|
* intel: Fix glReadPixels regression since changing context init order.Michel Dänzer2009-06-222-4/+4
| | | | | Fixes regression in dd26899ca39111e0866afed9df94bfb1618dd363 that also affected some PBO operations.
* intel: Also get the DRI2 front buffer when doing front buffer reading.Eric Anholt2009-06-194-1/+29
|
* intel: Update Mesa state before span setup in glReadPixels.Eric Anholt2009-06-193-3/+13
| | | | | We could have mapped the wrong set of draw buffers. Noticed while looking into a DRI2 glean ReadPixels issue.
* intel: Move intel_pixel_read.c to shared for use with i965.Eric Anholt2009-06-192-306/+307
|
* intel: Don't map regions with drm_intel_gem_bo_map_gtt() unless they're tiled.Eric Anholt2009-06-191-2/+4
| | | | | | | | This fixes a regression in region read performance that came in with the texture tiling changes. Ideally we'd have an access flag coming in so we could also use bo_map_gtt for writing, like we do for buffer objects. Bug #22190
* intel: Fix other metaops versus GL_COMPILE_AND_EXECUTE dlists.Eric Anholt2009-06-193-4/+4
| | | | Fixes oglconform zbfunc.c and pxtrans-cidraw.c, at least.
* intel: Fix glClear behavior versus display lists.Eric Anholt2009-06-191-1/+1
| | | | | | The CALL_DrawArrays was leaking the clear's primitives into the display list with GL_COMPILE_AND_EXECUTE. Use _mesa_DrawArrays instead, which doesn't appear to leak. Fixes piglit dlist-clear test.
* mesa: Make VBO dlist printing use the same path as other dlist printing.Eric Anholt2009-06-191-12/+12
| | | | | | I was rather confused when mesa_print_display_list didn't show any of my glBegin()..glEnd(). Nothing but print_list appears to call this function, so matching its behavior seems like a good idea.
* intel: Do not access pbo's buffer directly when attaching.Chia-I Wu2009-06-191-2/+7
| | | | | | | | pbo might be system buffer based or attached to another region. Call intel_bufferobj_buffer to make sure pbo has a buffer of its own. Signed-off-by: Chia-I Wu <[email protected]> Signed-off-by: Eric Anholt <[email protected]>
* intel: Data are copied in the wrong direction when breaking COW tie.Chia-I Wu2009-06-191-1/+1
| | | | | Signed-off-by: Chia-I Wu <[email protected]> Signed-off-by: Eric Anholt <[email protected]>
* intel: Fix migration from sys_buffer in intel_bufferobj_buffer.Chia-I Wu2009-06-191-3/+7
| | | | | | | | intel_bufferobj_subdata is called to migrate data from sys_buffer, and it expects only one of buffer or sys_buffer is non-NULL. Signed-off-by: Chia-I Wu <[email protected]> Signed-off-by: Eric Anholt <[email protected]>
* radeon: make cubemap mipmap generation workRoland Scheidegger2009-06-201-16/+13
| | | | | | need to pass target parameter to radeon_teximage/radeon_subteximage functions otherwise mipmap generation for cube maps can't work (assert/segfault in _mesa_generate_mipmap)
* demos: make cubemap work without EXT_fbo supportRoland Scheidegger2009-06-201-4/+13
| | | | | use SGIS_generate_mipmap if EXT_fbo support (for manual mipmap generation) is not available.
* intel: Fixups for 'mesa: create/destroy buffer objects via driver functions'.Michel Dänzer2009-06-193-16/+11
| | | | | | | Initialize all driver function hooks before calling _mesa_initialize_context(), and handle all buffer objects in intel_buffer_object(). Fixes assertion failure when running glxinfo.
* radeon: fix cube maps for non-mm pathRoland Scheidegger2009-06-191-2/+33
| | | | | | | drm cmd checker would refuse cube emits also fix an issue in the cs path which would calculate the register offset off by one dword. Only same testing done as original code (none except compile tested).
* st/mesa: restore some parameter checking buffer object functionsBrian Paul2009-06-191-0/+10
| | | | | These functions may be called from the VBO code (not just user GL calls) so do some parameter sanity checking.
* r200: fix cube maps for non-mm pathRoland Scheidegger2009-06-191-1/+28
| | | | drm cmd checker rightfully fell over any cube emit
* i965: initial code for loops in vertex programsBrian Paul2009-06-191-2/+38
|
* i965: asst clean-ups, etc in brw_vs_emit()Brian Paul2009-06-191-11/+10
|
* i965: asst clean-ups, var renaming in brw_wm_emit_glsl()Brian Paul2009-06-191-21/+23
|
* st/mesa: remove redundant st_buffer_object::size field and error checksBrian Paul2009-06-192-9/+0
| | | | | | Just use the gl_buffer_object::Size field. Remove unnecessary size/offset error checks. Core Mesa will have already done these checks before these functions are called.
* st/mesa: no longer special-case buffer object 0 in st_buffer_object() cast ↵Brian Paul2009-06-191-9/+2
| | | | | | | | wrapper Since commit 6629a35559ff7e3b993966f697f7c7f68e5a38d9 "mesa: create/destroy buffer objects via driver functions" this is no longer needed, and actually was causing a crash during context tear-down.
* radeons: use dp4 for position invariant vertex programsRoland Scheidegger2009-06-193-0/+6
| | | | | | | | Fixes #22181. R200 requires this since DP4 is used in hw tnl mode. R300 prefers it (should be faster due to no instruction dependencies), but both methods should be correct (when sw tcl is used though, MUL/MAD might be faster). Probably doesn't make much difference for R100 since vertex progs are executed in software anyway, but let's just keep it the same there too.
* mesa: make query-related driver fallback functions staticBrian Paul2009-06-193-30/+23
| | | | Plug them in via _mesa_init_query_object_functions().
* mesa: make buffer object-related driver fallback functions staticBrian Paul2009-06-193-73/+40
| | | | Plug them in via _mesa_init_buffer_object_functions().
* mesa: create/destroy buffer objects via driver functionsBrian Paul2009-06-191-2/+2
|
* i965simple: use u_reduced_prim() functionBrian Paul2009-06-191-16/+3
|
* draw: use u_reduced_prim() functionBrian Paul2009-06-194-28/+4
|
* softpipe: use u_reduced_prim()Brian Paul2009-06-191-15/+2
|
* gallium/util: s/boolean/unsigned/Brian Paul2009-06-191-1/+1
|
* softpipe: whitespace, reformattingBrian Paul2009-06-191-8/+5
|
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-11 10:10:16 +0000