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* nir/large_constants: more careful data copyingSergii Romantsov2019-09-181-1/+1
| | | | | | | | | | | | | | | | | | A filed of nir_variable.location may be equel to -1. That may cause copying to invalid address of list-node, making some internal fields corrupted. Patch fixes segfault during freeing context due to corrupted address of ralloc_header.destructor. v2: copy data if var is constant (Connor Abbott) CC: Caio Marcelo de Oliveira Filho <[email protected]> Fixes: b6d475356846 (nir/large_constants: De-duplicate constants) Signed-off-by: Sergii Romantsov <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111676 Reviewed-by: Connor Abbott <[email protected]> (cherry picked from commit c7b2a2fd363f57bb1ab4d7d6bad786af7e2924ef)
* vulkan: add vk_x11_strict_image_count optionLionel Landwerlin2019-09-186-1/+28
| | | | | | | | | | | | | | | | | | | This option strictly allocate the minImageCount given by the application at swapchain creation. This works around application that do not deal with the fact that the implementation allocates more images than the minimum specified. v2: Add values in default drirc (Bas) v3: specify engine name/version (Lionel) Signed-off-by: Lionel Landwerlin <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111522 Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> Cc: 19.2 <[email protected]> (cherry picked from commit 0616b7ac90cf4f86bb409d34101e3a3cceac8cbe)
* driconfig: add a new engine name/version parameterLionel Landwerlin2019-09-1814-21/+104
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Vulkan applications can register with the following structure : typedef struct VkApplicationInfo { VkStructureType sType; const void* pNext; const char* pApplicationName; uint32_t applicationVersion; const char* pEngineName; uint32_t engineVersion; uint32_t apiVersion; } VkApplicationInfo; This enables the Vulkan implementations to apply workarounds based off matching this description. Here we add a new parameter for matching the driconfig options with the following : <device driver="anv"> <application engine_name_match="MyOwnEngine.*" engine_versions="10:12,40:42"> <option name="blaaah" value="true" /> </application> </device> v2: switch engine name match to use regexps v3: Verify that the regexec returns REG_NOMATCH for match failure (Eric) v4: Add missing bit that went to the following commit (Eric) Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Cc: 19.2 <[email protected]> (cherry picked from commit 04dc6074cf7f651b720868e0ba24362b585d1b31)
* radv: store engine nameLionel Landwerlin2019-09-182-0/+16
| | | | | | | | | | | | We'll use this later for a new driconfig matching parameter. v2: Avoid leak in device creation error case (Bas) Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Cc: 19.2 <[email protected]> (cherry picked from commit 6d5f11ab345b05759c22acbcd2f79928311689e3)
* iris: Initialize ice->state.prim_mode to an invalid valueKenneth Graunke2019-09-181-0/+1
| | | | | | | | | | | | | | | | | | It was calloc'd to 0 which is PIPE_PRIM_POINTS, which means that we fail to notice an initial primitive of points being new, and fail at updating the "primitive is points or lines" field. We do not need to reset this on device loss because we're tracking the last primitive mode sent to us on the CPU via draw_vbo, not the last primitive mode sent to the GPU. Fixes several tests: - dEQP-GLES3.functional.clipping.point.wide_point_clip - dEQP-GLES3.functional.clipping.point.wide_point_clip_viewport_center - dEQP-GLES3.functional.clipping.point.wide_point_clip_viewport_corner Fixes: dcfca0af7c5 ("iris: Set XY Clipping correctly.") (cherry picked from commit c9fb704f7277b1c1303d28d35c8e145d5b55ebce)
* radv: fix allocating number of user sgprs if streamout is usedSamuel Pitoiset2019-09-181-1/+1
| | | | | | | | | | | | | streamout_buffers is assigned after that function, so the previous fix was completely wrong. This probably fix something when streamout buffers and push constants are used/inlined in the same shader. Fixes: 378e2d24143 ("radv: fix computing number of user SGPRs for streamout buffers") Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> (cherry picked from commit 8137df3a46abc6aa6ad0c7179d042e76ca2b2299) [Juan A. Suarez: fix the structure usage] Signed-off-by: Juan A. Suarez Romero <[email protected]>
* v3d: make sure we have enough space in the CL for the primitive counts packetIago Toral Quiroga2019-09-181-0/+1
| | | | | | | Fixes: 0f2d1dfe65 ("v3d: use the GPU to record primitives written to transform feedback") Reviewed-by: Eric Anholt <[email protected]> (cherry picked from commit b9a07eed004c8c53f97d6d41e6816f1998d8dd8b)
* intel/fs: Handle UNDEF in split_virtual_grfsJason Ekstrand2019-09-181-1/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the UNDEF instruction was added, we didn't do anything special in split_virtual_grfs. This mean that anything with an UNDEF wasn't getting split which causes problems for the compiler. Among other things, it makes RA harder because things are in bigger chunks. It also meant that dvec4s weren't getting split which means that they are larger than the maximum register size. Shader-db results on Kaby Lake: total instructions in shared programs: 14959202 -> 14960035 (<.01%) instructions in affected programs: 96197 -> 97030 (0.87%) helped: 140 HURT: 128 helped stats (abs) min: 1 max: 17 x̄: 1.62 x̃: 1 helped stats (rel) min: 0.09% max: 6.15% x̄: 0.65% x̃: 0.45% HURT stats (abs) min: 1 max: 825 x̄: 8.28 x̃: 1 HURT stats (rel) min: 0.13% max: 139.83% x̄: 1.70% x̃: 0.50% 95% mean confidence interval for instructions value: -2.96 9.18 95% mean confidence interval for instructions %-change: -0.56% 1.51% Inconclusive result (value mean confidence interval includes 0). total loops in shared programs: 4372 -> 4372 (0.00%) loops in affected programs: 0 -> 0 helped: 0 HURT: 0 total cycles in shared programs: 352646771 -> 352840997 (0.06%) cycles in affected programs: 218600800 -> 218795026 (0.09%) helped: 21167 HURT: 21411 helped stats (abs) min: 1 max: 2924 x̄: 36.89 x̃: 10 helped stats (rel) min: <.01% max: 41.90% x̄: 2.97% x̃: 0.98% HURT stats (abs) min: 1 max: 26027 x̄: 45.54 x̃: 10 HURT stats (rel) min: <.01% max: 324.46% x̄: 3.88% x̃: 1.06% 95% mean confidence interval for cycles value: 2.87 6.26 95% mean confidence interval for cycles %-change: 0.40% 0.55% Cycles are HURT. total spills in shared programs: 8840 -> 8953 (1.28%) spills in affected programs: 126 -> 239 (89.68%) helped: 1 HURT: 2 total fills in shared programs: 21782 -> 21914 (0.61%) fills in affected programs: 431 -> 563 (30.63%) helped: 1 HURT: 3 LOST: 0 GAINED: 5 Shader-db results on Haswell: total instructions in shared programs: 13320918 -> 13320769 (<.01%) instructions in affected programs: 40998 -> 40849 (-0.36%) helped: 146 HURT: 56 helped stats (abs) min: 1 max: 8 x̄: 2.73 x̃: 2 helped stats (rel) min: 0.16% max: 8.60% x̄: 2.52% x̃: 2.22% HURT stats (abs) min: 2 max: 23 x̄: 4.45 x̃: 4 HURT stats (rel) min: 0.21% max: 10.26% x̄: 6.83% x̃: 10.26% 95% mean confidence interval for instructions value: -1.26 -0.21 95% mean confidence interval for instructions %-change: -0.62% 0.77% Inconclusive result (%-change mean confidence interval includes 0). total loops in shared programs: 4373 -> 4373 (0.00%) loops in affected programs: 0 -> 0 helped: 0 HURT: 0 total cycles in shared programs: 374518258 -> 374384193 (-0.04%) cycles in affected programs: 231101954 -> 230967889 (-0.06%) helped: 21427 HURT: 19438 helped stats (abs) min: 1 max: 2035 x̄: 31.09 x̃: 8 helped stats (rel) min: <.01% max: 40.95% x̄: 2.42% x̃: 0.86% HURT stats (abs) min: 1 max: 20875 x̄: 27.38 x̃: 8 HURT stats (rel) min: <.01% max: 59.09% x̄: 2.49% x̃: 0.80% 95% mean confidence interval for cycles value: -4.49 -2.07 95% mean confidence interval for cycles %-change: -0.14% -0.04% Cycles are helped. total spills in shared programs: 23406 -> 23411 (0.02%) spills in affected programs: 3 -> 8 (166.67%) helped: 0 HURT: 2 total fills in shared programs: 34845 -> 34850 (0.01%) fills in affected programs: 3 -> 8 (166.67%) helped: 0 HURT: 2 LOST: 0 GAINED: 0 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111566 Fixes: f4ef34f207d1 "intel/fs: Add an UNDEF instruction to avoid..." Reviewed-by: Francisco Jerez <[email protected]> (cherry picked from commit acfa2340e60f83f927c8f4426773580d34239c18)
* add patches to be ignoredDylan Baker2019-09-181-0/+6
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* tgsi_to_nir: Translate TGSI_INTERPOLATE_COLOR as INTERP_MODE_NONEDanylo Piliaiev2019-09-181-1/+1
| | | | | | | | | | | | | | | | | Translating TGSI_INTERPOLATE_COLOR as INTERP_MODE_SMOOTH made it for drivers impossible to have flatshaded color inputs. Translate it to INTERP_MODE_NONE which drivers interpret as smooth or flat depending on flatshading state. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111467 Fixes: 770faf54 ("tgsi_to_nir: Improve interpolation modes.") Signed-off-by: Danylo Piliaiev <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Eric Anholt <[email protected]> (cherry picked from commit 175c32e9bdc8b7b9c43f605cb59cd82415075f67)
* meson: don't generate file into subdirsDylan Baker2019-09-181-1/+1
| | | | | | | | | This is unsupported by meson and may become a hard error in the future. Fixes: 5adfc8602c639827af0ba9a1059bd165a3ae49e7 ("lima/ppir: move sin/cos input scaling into NIR") Reviewed-by: Vasily Khoruzhick <[email protected]> (cherry picked from commit 52cf2d05a743a4cb2a5a8e1a35f2f0309999a839)
* gallium: Fix util_format_get_depth_onlyKenneth Graunke2019-09-181-1/+1
| | | | | | | | This is a pipe format, not a boolean. Fixes: 5849e0612cc ("gallium/auxiliary: Add util_format_get_depth_only() helper.") Reviewed-by: Tapani Pälli <[email protected]> (cherry picked from commit c6d40b5182daf1361686215d31d3c0345e0992f2)
* glsl/nir: Avoid overflow when setting max_uniform_locationCaio Marcelo de Oliveira Filho2019-09-181-1/+2
| | | | | | | | | | Don't use the UNMAPPED_UNIFORM_LOC (-1) to set the unsigned max_uniform_location. Those unmapped uniforms don't have to be accounted at this point. Fixes: 7a9e5cdfbb9 ("nir/linker: Add gl_nir_link_uniforms()") Reviewed-by: Alejandro Piñeiro <[email protected]> (cherry picked from commit 4f33f96c4517f86f6f720f745cd49f8a0754393b)
* iris: Fix constant buffer sizes for non-UBOsKenneth Graunke2019-09-181-3/+4
| | | | | | | | | | Since the system value refactor, we've accidentally only been setting cbuf->buffer_size in the UBO case, and not in the uploaded-constants case. We use cbuf->buffer_size to fill out the SURFACE_STATE entry, so it needs to be initialized in both cases. Fixes: 3b6d787e404 ("iris: move sysvals to their own constant buffer") (cherry picked from commit 077a1952cceb9b577437c9e31be094427d5c7a9a)
* nir/loop_analyze: Treat do{}while(false) loops as 0 iterationsDanylo Piliaiev2019-09-181-0/+49
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Loops like: block block_0: vec1 32 ssa_2 = load_const (0x00000020) vec1 32 ssa_3 = load_const (0x00000001) loop { vec1 32 ssa_7 = phi block_0: ssa_3, block_4: ssa_9 vec1 1 ssa_8 = ige ssa_2, ssa_7 if ssa_8 { break } else { } vec1 32 ssa_9 = iadd ssa_7, ssa_1 } Were treated as having more than 1 iteration and after unrolling produced wrong results, however such loop will exit during the first iteration if not unrolled. So we check if loop will actually loop. Fixes tests/shaders/glsl-fs-loop-while-false-02.shader_test Signed-off-by: Danylo Piliaiev <[email protected]> Reviewed-by: Timothy Arceri <[email protected]> (cherry picked from commit e71fc7f2387dc14d08b7b310c41d83aa7a84c3b4)
* Bump version for rc3mesa-19.2.0-rc3Dylan Baker2019-09-111-1/+1
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* radeonsi/gfx10: fix wave occupancy computationsMarek Olšák2019-09-104-21/+49
| | | | | | Cc: 19.2 <[email protected]> Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]> (cherry picked from commit d95afd8b9e7f9b3880813203292257bf0ed7babf)
* radeonsi/gfx10: don't call gfx10_destroy_query with compute-only contextsMarek Olšák2019-09-101-1/+1
| | | | | | | | This fixes a crash. Cc: 19.2 <[email protected]> Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]> (cherry picked from commit 28adf0d00c6b5506ed2206b950336bdc568d2247)
* virgl: Fix pipe_resource leaks under multi-sample.Lepton Wu2019-09-101-1/+3
| | | | | | | | Fixes: 900a80f9e4f ("virgl: virgl_transfer should own its virgl_resource") Signed-off-by: Lepton Wu <[email protected]> Reviewed-by: Chia-I Wu <[email protected]> (cherry picked from commit 263136fb5d2646bea718579de272729b2474d31a)
* st/nine: Properly initialize GLSL types for NIR shaders.Timur Kristóf2019-09-091-0/+5
| | | | | | | | NIR shaders use GLSL types (note: these live outside libglsl), and nine needs to properly initialize these just like the other state trackers. This fixes an assertion failure when TTN is used. Signed-off-by: Timur Kristóf <[email protected]>
* Revert "ac/nir: Lower large indirect variables to scratch"Bas Nieuwenhuizen2019-09-091-68/+0
| | | | | | | | | | | | | This reverts commit 74470baebbdacc8fd31c9912eb8c00c0cd102903. This change introduces some significant performance regressions. We are fixing those on master, but the follow up work is large enough not to backport to 19.2 . Fixes: 74470baebbd "ac/nir: Lower large indirect variables to scratch" Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111576 Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Connor Abbott <[email protected]>
* nir/dead_cf: Repair SSA if the pass makes progressJason Ekstrand2019-09-091-2/+13
| | | | | | | | | | | | | | | | | | | | | The dead_cf pass calls into the CF manipulation helpers which attempt to keep NIR's SSA form sane. However, when the only break is removed from a loop, dominance gets messed up anyway because the CF SSA clean-up code only looks at phis and doesn't consider the case of code becoming unreachable. One solution to this would be to put the loop into LCSSA form before we modify any of its contents. Another (and the approach taken by this pass) is to just run the repair_ssa pass afterwards because the CF manipulation helpers are smart enough to keep all the use/def stuff sane; they just don't always preserve dominance properties. While we're here, we clean up some bogus indentation. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111405 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111069 Cc: [email protected] Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> (cherry picked from commit c832820ce959ae7c2b4971befceae634d800330f)
* nir/repair_ssa: Insert deref casts when neededJason Ekstrand2019-09-091-2/+29
| | | | | | Cc: [email protected] Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> (cherry picked from commit 1005272a2b7c744b6ac4d846566359a8ff1b6295)
* nir/repair_ssa: Repair dominance for unreachable blocksJason Ekstrand2019-09-091-4/+8
| | | | | | | | | | | | | NIR currently assumes that unreachable blocks are trivially dominated by everything. However, when considering well-formed SSA, there is no path from any block to an unreachable block. Therefore, we can break any use-def chains where the use is in an unreachable block. This removes any dependencies on code created by uses in unreachable blocks and lets DCE do a better job of cleaning it up. Cc: [email protected] Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> (cherry picked from commit a3268599f3c9bb1d92571e15df95750a06114811)
* nir: Add a block_is_unreachable helperJason Ekstrand2019-09-092-0/+15
| | | | | | Cc: [email protected] Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> (cherry picked from commit f81a2623d82ccad6177fe1fe5b80a6398df29b6e)
* nir: Don't infinitely recurse in lower_ssa_defs_to_regs_blockJason Ekstrand2019-09-091-5/+15
| | | | | | Cc: [email protected] Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> (cherry picked from commit 517142252f0c63189293c7176efbf490b7ae95ea)
* nir: Handle complex derefs in nir_split_array_varsJason Ekstrand2019-09-091-2/+5
| | | | | | | | | We already bail and don't split the vars but we were passing a NULL to _mesa_hash_table_search which is not allowed. Fixes: f1cb3348f1 "nir/split_vars: Properly bail in the presence of ..." Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> (cherry picked from commit 37cdb7fc4465cba67b220f940404338f6ff98ee1)
* drirc: override minImageCount=2 for gfxbenchEric Engestrom2019-09-091-0/+4
| | | | | | | | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110765 Fixes: 4689e98fe884d9412b72 ("vulkan/wsi: Set X11 minImageCount to 3.") Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Tested-by: Eero Tamminen <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> (cherry picked from commit 27339fe9a74bf57b082b7ac657cdf76f3fd00f57)
* radv: add support for vk_x11_override_min_image_countEric Engestrom2019-09-091-0/+1
| | | | | | | | Cc: [email protected] Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> (cherry picked from commit 5eb7d48b5840f33e759ba0da36134883f2a44d9f)
* amd: move adaptive sync to performance section, as it is defined in xmlpoolEric Engestrom2019-09-092-5/+2
| | | | | | | | | Fixes: 3844ed8d44677588bc29 ("radv: Add adaptive_sync driconfig option and enable it by default.") Fixes: e260493f2ab2483e5a55 ("radeonsi: Enable adaptive_sync by default for radeon") Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> (cherry picked from commit 4ad99ee9616f86eff96f4840354c64a60e341a6b)
* anv: add support for vk_x11_override_min_image_countEric Engestrom2019-09-091-0/+3
| | | | | | | | Cc: [email protected] Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> (cherry picked from commit 037b5b567f75db2dd264b23a93abbc88305c7551)
* wsi: add minImageCount overrideEric Engestrom2019-09-095-3/+27
| | | | | | | | Cc: [email protected] Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> (v1) Reviewed-by: Lionel Landwerlin <[email protected]> (cherry picked from commit a72cdd00abd5f3c18df01acc60bf3b385facfdb6)
* anv: add support for driconfEric Engestrom2019-09-094-3/+19
| | | | | | | | | | No option is supported yet, this is just the boilerplate. Cc: [email protected] Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> (cherry picked from commit 4dcb1fff19383ae451f3228e55d3fc987a7ab46d)
* anv: Bump maxComputeWorkgroupSizeJason Ekstrand2019-09-091-4/+6
| | | | | | | Fixes: 9a129510f56f "anv: Bump maxComputeWorkgroupInvocations" Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111552 Reviewed-by: Lionel Landwerlin <[email protected]> (cherry picked from commit 3b1a7e5333335900293935399ce49a67562eafc7)
* nir/lower_explicit_io: Handle 1 bit loads and storesCaio Marcelo de Oliveira Filho2019-09-061-9/+24
| | | | | | | | | | | | | | | Load a 32-bit value then convert to 1-bit. Convert 1-bit to 32-bit value, then Store it. These cases started to appear when we changed Anvil to use derefs for shared memory. v2: Use `bit_size` in a couple of places we were missing. (Jason) Reassign `value` instead of `src[0]`. (Jason) Fixes: 024a46a4079 ("anv: use derefs for shared memory access") Reviewed-by: Jason Ekstrand <[email protected]> (cherry picked from commit c0c55bd84f744f9d4d498403f1eea93fafd6cb4b)
* freedreno/a2xx: ir2: fix lowering of instructions after float loweringJonathan Marek2019-09-061-3/+2
| | | | | | | | | | | | Some instructions generated by int/bool float lowering need to be lowered by opt_algebraic. Fixes: 43dbd7d6 Signed-off-by: Jonathan Marek <[email protected]> Reviewed-by: Rob Clark <[email protected]> Reviewed-by: Eric Anholt <[email protected]> (cherry picked from commit 3516a90ab4842a6610dc31514809d490bc4add87)
* intel/dri: finish proper glthreadSergii Romantsov2019-09-061-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | KWin was able to get NULL-context in the call intelUnbindContext. But a call _mesa_glthread_finish is not resistent to such case. Case can be catched with steps: 1. Create both glx and egl contexts 2. Make glx as current 3. Make egl as current 4. Reset glx context 5. Make egl as current Solution adds proper finishing of glthread-context (context will be taken from the requested dri-context for unbinding, but not from the saved current context). Piglit-test: https://gitlab.freedesktop.org/mesa/piglit/merge_requests/87 Cc: 19.1 19.2 <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110814 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111271 Fixes: dca36d5516d0 (i965: Implement threaded GL support) Signed-off-by: Sergii Romantsov <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> (cherry picked from commit 1dce75c1839f08cfa78400367019f998c258eff5)
* broadcom/v3d: Allow importing linear BOs with arbitrary offset/stride.Dave Stevenson2019-09-051-8/+23
| | | | | | | | | | | | | Equivalent of 0c1dd9dee "broadcom/vc4: Allow importing linear BOs with arbitrary offset/stride." for v3d. Allows YUV buffers with a single buffer and plane offsets to be passed in. Signed-off-by: Dave Stevenson <[email protected]> Reviewed-by: Eric Anholt <[email protected]> (cherry picked from commit 873b092e9110a0605293db7bc1c5bcb749cf9a28)
* radv: Call nir_propagate_invariant()Connor Abbott2019-09-051-0/+2
| | | | | | | | | Without this, invariant qualifiers don't do anything. Together with a fix to the game, this fixes flickering in No Man's Sky. Cc: [email protected] Reviewed-by: Samuel Pitoiset <[email protected]> (cherry picked from commit 3f5b541fc8b2aae6e71783b7a9bb8eb2ffa3a74d)
* nir: do not assume that the result of fexp2(a) is always an integralSamuel Pitoiset2019-09-041-0/+1
| | | | | | | | | | | It's only correct when 'a' is an integral greater or equal to 0. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111493 Fixes: 5544b2cbbd2 ("nir/algebraic: Use value range analysis to eliminate useless unary ops") Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ian Romanick <[email protected]> (cherry picked from commit 966a455bb912cc9fd22580c6cf9b74e27faa4491) (conflicts resolved by Dylan Baker)
* nir: Add is_not_negative helper functionDylan Baker2019-09-041-0/+6
| | | | | This was taken from 636da1243346e4e2a5aaf79bac65850884a9b859, and is needed by the next patch.
* glx: Fix SEGV due to dereferencing a NULL ptr from XCB-GLX.Hal Gentz2019-09-042-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When run in optirun, applications that linked to `libGLX.so` and then proceeded to querying Mesa for extension strings caused a SEGV in Mesa. `glXQueryExtensionsString` was calling a chain of functions that eventually led to `__glXQueryServerString`. This function would call `xcb_glx_query_server_string` then `xcb_glx_query_server_string_reply`. The latter for some unknown reason returned `NULL`. Passing this `NULL` to `xcb_glx_query_server_string_string_length` would cause a SEGV as the function tried to dereference it. The reason behind the function returning `NULL` is yet to be determined, however, simply checking that the ptr is not `NULL` resolves this. A similar check has been added to `__glXGetString` for completeness sake, although not immediately necessary. In addition to that, we stumbled into a similar problem in `AllocAndFetchScreenConfigs` which tries to access the configs to free them if `__glXQueryServerString` fails. This, of course, SEGVs, because the configs are yet to have been allocated. Simply continuing past the configs if their config ptrs are `NULL` resolves this. We also switch to `calloc` to make sure that the config ptrs are `NULL` by default, and not some uninitialized value. Cc: [email protected] Fixes: 24b8a8cfe821 "glx: implement __glXGetString, hide __glXGetStringFromServer" Fixes: cb3610e37c4c "Import the GLX client side library, formerly from xc/lib/GL/glx. Build it " Reviewed-by: Adam Jackson <[email protected]> Signed-off-by: Hal Gentz <[email protected]> (cherry picked from commit 1591d1fee5016a21477edec0d2eb6b2d24221952)
* iris: Report correct number of planes for planar imagesKenneth Graunke2019-09-041-1/+8
| | | | | | | | | | | | We were only handling the modifiers case and not counting the number of planes in actual planar images. Fixes Piglit's ext_image_dma_buf_import-export. Fixes: fc12fd05f56 ("iris: Implement pipe_screen::resource_get_param") Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111509 Reviewed-by: Jordan Justen <[email protected]> (cherry picked from commit f8887909c6683986990474b61afd6d4335a69e41)
* nir: fix memleak in error pathEric Engestrom2019-09-041-1/+3
| | | | | | | | Fixes: 2cf59861a8128a91bfdd ("nir: Add partial redundancy elimination for compares") Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Timothy Arceri <[email protected]> Reviewed-by: Ian Romanick <[email protected]> (cherry picked from commit 7659c6197f08587f57f101a88a7e477337ce363c)
* freedreno/drm-shim: fix mem leakEric Engestrom2019-09-041-3/+4
| | | | | | | Fixes: 494ecef6b42198ab6c3e ("freedreno: Add support for drm-shim.") Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Eric Anholt <[email protected]> (cherry picked from commit c4969b0a25982505dd784257d7c12f1abe8b2180)
* anv: fix format string in error messageEric Engestrom2019-09-041-1/+1
| | | | | | | Fixes: 9775894f102535a79186 ("anv: Move size check from anv_bo_cache_import() to caller (v2)") Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> (cherry picked from commit 7abf65aedc679069b794fddfa6feafa68d36d06a)
* util/os_file: fix double-close()Eric Engestrom2019-09-041-1/+0
| | | | | | | Fixes: 955c63d3643f30d7db0c ("util/os_file: resize buffer to what was actually needed") Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Tapani Pälli <[email protected]> (cherry picked from commit 1667360f7d920a35191dc67b7ee120eef95e8788)
* egl: fix deadlock in malloc error pathEric Engestrom2019-09-041-1/+3
| | | | | | | Fixes: cb0980e69aa921af7086 ("egl: move alloc & init out of _eglBuiltInDriver{DRI2,Haiku}") Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Tapani Pälli <[email protected]> (cherry picked from commit 43d470404c47d86d1fab93d1345e09375bcf4fb6)
* ttn: fix 64-bit shift on 32-bit `1`Eric Engestrom2019-09-041-1/+1
| | | | | | | | | Fixes: 4d0b2c7aaac3cf3de5af ("ttn: Update shader->info as we generate code.") Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Tapani Pälli <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Rob Clark <[email protected]> (cherry picked from commit 3afe9d798aacc0abc6d898dda3360f06517caf8e)
* vulkan/overlay: bounce image back to present layoutLionel Landwerlin2019-09-041-2/+30
| | | | | | | | | | | Once we write the overlay to an image to be presented, we must not forget to put it back into present layout. Signed-off-by: Lionel Landwerlin <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111401 Cc: <[email protected]> Reviewed-by: Tapani Pälli <[email protected]> (cherry picked from commit 320b0f66c27407008784da3606e23cb44c70ddf0)
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