| Commit message (Collapse) | Author | Age | Files | Lines |
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This assertion was added in commit f1c1ee11, but it did not notice
that the array is accessed with 'size-1' instead of 'size'. As a
result, the assertion was off by one. This caused failures in at
least glsl-orangebook-ch06-bump.
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If an GLSL shader is used that does not provide all stages and
assembly shaders are provided for the missing stages, validate the
assembly shaders.
Fixes bugzilla #30787 and piglit tests glsl-invalid-asm0[12].
NOTE: this is a candidate for the 7.9 branch.
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Pointed out by Jakob Bornecrantz.
Signed-off-by: Thomas Hellstrom <[email protected]>
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Apply Jose's suggestions for a small but measurable improvement in
isosurf.
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Signed-off-by: Thomas Hellstrom <[email protected]>
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Gets rid of annoying cursor flicker
Signed-off-by: Thomas Hellstrom <[email protected]>
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Signed-off-by: Thomas Hellstrom <[email protected]>
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Signed-off-by: Thomas Hellstrom <[email protected]>
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Signed-off-by: Thomas Hellstrom <[email protected]>
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This reverts commit 9773722c2b09d5f0615a47cecf4347859474dc56.
Looks like there are some floor/rounding issues here that need
to be better understood.
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MSVC doesn't accept more than 3 __m128i arguments.
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Avoid accumulating more and more fixed point bits.
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There was actually a large quantity of scalar code in these functions
previously. This tries to move more into intrinsics.
Introduce an sse2 mm_mullo_epi32 replacement to avoid sse4 dependency
in the new rasterization code.
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The engine is a global owned by gallivm module.
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Useful to amortize the command submission/reloc overhead (e.g. etracer
goes from 72 to 109 FPS on nv4b).
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fixes https://bugs.freedesktop.org/show_bug.cgi?id=30771
Reported-by: Kevin DeKorte
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It's now much more correct for gen6 than the old backend, with just 2
regressions I've found (one of which is common with pre-gen6 and will
be fixed by an array splitting IR pass).
This does leave the old Mesa IR backend getting used still when we
don't have GLSL IR, but the plan is to get GLSL IR input to the driver
for the ARB programs and fixed function by the next release.
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Pre-gen6, you could mix int and float just fine. Now, you get goofy
results.
Fixes:
glsl-arb-fragment-coord-conventions
glsl-fs-fragcoord
glsl-fs-if-greater
glsl-fs-if-greater-equal
glsl-fs-if-less
glsl-fs-if-less-equal
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There was code to do this for pre-gen6 already, this just enables it
for gen6 as well.
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This is a hw requirement in math args. This also is inefficient, as
we're calculating the same result 8 times, but then we've been doing
that on pre-gen6 as well. If we're doing math on uniforms, though,
we'd probably be better served by having some sort of mechanism for
precalculating those results into another uniform value to use.
Fixes 7 piglit math tests.
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This was leftover from the pre-gen6 cleanups. One tests regresses
where compute-to-MRF now occurs.
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Signed-off-by: Ian Romanick <[email protected]>
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Commit for generated file glsl_lexer.cpp follows this commit.
Reviewed-by: Ian Romanick <[email protected]>
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Reviewed-by: Ian Romanick <[email protected]>
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Add ability to set the GLSL version used by the GLcontext by setting the
environment variable INTEL_GLSL_VERSION. For example,
env INTEL_GLSL_VERSION=130 prog args
If the environment variable is missing, the GLSL versions defaults to 120.
Reviewed-by: Ian Romanick <[email protected]>
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By calling radeon_draw_buffers (which sets the necessary flags
in radeon->NewGLState) and revalidating if NewGLState is non-zero
in r200TclPrimitive. This fixes an assert in libdrm (the color-/
depthbuffer was changed but not yet validated) and and stops the
kernel cs checker from complaining about them (when they're too
small).
Thanks to Mario Kleiner for the hint to call radeon_draw_buffer
(instead of my half-broken hack).
v2: Also fix the swtcl r200 path.
Cc: Mario Kleiner <[email protected]>
Signed-off-by: Daniel Vetter <[email protected]>
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This didn't produce a statistically significant performance difference
in my demo (n=4) or nexuiz (n=3), but it still seems like a good idea
and is recommended by the HW team.
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This is progress towards enabling a compute-to-MRF pass.
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It's time to start splitting some of this up.
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While I don't know of any performance changes from this (once extra
reg available out of 128), it makes the generated asm a lot cleaner
looking.
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Having the single opcode write then read the reg meant that single
instruction opcodes had to consider their source regs to interfere
with their dest regs.
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To allow more optimizations, in particular for direct textures.
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Useful to give human legible names in other cases.
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SSE support for 32bit and 16bit unsigned arithmetic is not complete, and
can easily result in inefficient code.
In most cases signed/unsigned doesn't make a difference, such as for
integer texture coordinates.
So remove uint_coord_type and uint_coord_bld to avoid inefficient
operations to sneak in the future.
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