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* mesa: Make target_enum_to_index available outside texobj.cIan Romanick2014-02-022-3/+6
| | | | | | | | | | The next patch will use this function in another file. v2: Rename _mesa_target_enum_to_index to _mesa_tex_target_to_index. Suggested by Brian. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* mesa: make several FBO functions staticBrian Paul2014-02-022-55/+35
| | | | | | The four functions in question weren't called from any other file. Reviewed-by: Kenneth Graunke <[email protected]>
* mesa: move glGenerateMipmap() code into new genmipmap.c fileBrian Paul2014-02-027-96/+170
| | | | | | | Mipmap generation has nothing to do with FBOs. v2: update gl_genexec.py too (not api_exec.c) Acked-by: Kenneth Graunke <[email protected]>
* mesa: move glBlitFramebuffer code into new blit.c fileBrian Paul2014-02-027-478/+555
| | | | | | | Just for better organization. v2: update gl_genexec.py too (not api_exec.c) Acked-by: Kenneth Graunke <[email protected]>
* mesa: don't signal _NEW_TEXTURE in TexSubImage() functionsBrian Paul2014-02-021-3/+9
| | | | | | | | | | | glTexSubImage(), glCopyTexSubImage() and glCompressedTexSubImage() only change the texel data, not other state like texture size or format. If a driver really needs do something special it can hook into the corresponding driver functions or Map/UnmapTextureImage(). This should avoid some needless state validation effort. Reviewed-by: Marek Olšák <[email protected]>
* mesa: add some comments about mipmap generationBrian Paul2014-02-022-0/+9
| | | | Trivial.
* mesa: simplify comment in texstorage.cBrian Paul2014-02-021-3/+2
| | | | Trivial.
* mesa: formatting fixes, 78-column wrappings in dd.hBrian Paul2014-02-021-33/+56
| | | | Trivial.
* mesa: remove target param from ctx->Driver.TexParameter()Brian Paul2014-02-026-15/+14
| | | | | | Not really used anywhere. Reviewed-by: Kenneth Graunke <[email protected]>
* gallivm: add a few const qualifiersBrian Paul2014-02-022-4/+4
| | | | Trivial.
* translate: reindent translate_sse.cBrian Paul2014-02-021-472/+474
| | | | Trivial.
* mesa: make _mesa_get_proxy_target() staticBrian Paul2014-02-022-8/+5
| | | | | | Wasn't used in any other file. Reviewed-by: Kenneth Graunke <[email protected]>
* mesa: remove unused _mesa_select_tex_object() functionBrian Paul2014-02-022-27/+6
| | | | | | | The _mesa_get_current_tex_object() function is now used everywhere that _mesa_select_tex_object() was formerly used. Reviewed-by: Kenneth Graunke <[email protected]>
* swrast: use _mesa_get_current_tex_object() in swrastSetTexBuffer2()Brian Paul2014-02-021-3/+1
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* st/mesa: use _mesa_get_current_tex_object() in st_context_teximage()Brian Paul2014-02-021-2/+2
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* mesa: use _mesa_get_current_tex_object() in GetTexLevelParameteriv()Brian Paul2014-02-021-6/+3
| | | | | | And update a related comment. Reviewed-by: Kenneth Graunke <[email protected]>
* radeon: use _mesa_get_current_tex_object() in radeonSetTexBuffer2()Brian Paul2014-02-021-4/+2
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* r200: use _mesa_get_current_tex_object() in r200SetTexBuffer2()Brian Paul2014-02-021-4/+2
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* build: move ARCH_LIBS definition outside of ASM definitionPaul Seidler2014-02-011-6/+6
| | | | | | | _mesa_streaming_load_memcpy is also needed even if assembling is disabled Cc: "10.0" <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* dri: Add a useful error message if someone's packages missed libudev deps.Eric Anholt2014-02-011-0/+5
| | | | Reviewed-by: Matt Turner <[email protected]>
* dri: Also support the loader with libudev.so.0.Eric Anholt2014-02-011-0/+10
| | | | | | | | | As far as I know, this should be safe. If not, we have to decide whether to have variable lookup of the functions, or just drop support for .so.0 (which is a year and a half old it looks like) Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74127 Reviewed-by: Matt Turner <[email protected]>
* freedreno: better manage our WFI'sRob Clark2014-02-017-24/+36
| | | | | | | | Updates to non-banked registers, CP_LOAD_STATE, etc, need a WFI if there is potentially pending rendering. Track this better, and add fd_wfi() calls everywhere that might potentially need CP_WAIT_FOR_IDLE. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx: add logicopRob Clark2014-02-013-6/+27
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx: handle frag z writeRob Clark2014-02-017-25/+53
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: resync generated headersRob Clark2014-02-014-9/+39
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx: fix const confusionRob Clark2014-02-012-9/+9
| | | | | | | | | | | | Gallium can leave const buffers bound above what is used by the current shader. Which can have a couple bad effects: 1) write beyond const space assigned, which can trigger HLSQ lockup 2) double emit of immed consts, first with bound const buffer vals followed by with actual immed vals. This seems to be a sort of undefined condition. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx/compiler: compiler cleanupsRob Clark2014-02-017-145/+198
| | | | | | Drop color/pos/psize_regid, plus a few compiler and IR cleanups. Signed-off-by: Rob Clark <[email protected]>
* freedreno/compiler/a3xx: remove lowered instructionsRob Clark2014-02-011-354/+0
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: add tgsi lowering passRob Clark2014-02-014-2/+1229
| | | | | | | | | | | | | | | | Currently lowers the following instructions: DST, XPD, SCS, LRP, FRC, POW, LIT, EXP, LOG, DP4, DP3, DPH, DP2 translating these into equivalent simpler TGSI instructions. This probably should be moved to util so other drivers can use it, but just adding under freedreno for now so that I can clear out a lot of the lowering code in a3xx compiler before beginning to add new compiler. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx/compiler: add CLAMPRob Clark2014-02-011-7/+24
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx/compiler: various fixesRob Clark2014-02-011-14/+34
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: ctx should hold ref to devRob Clark2014-02-017-3/+9
| | | | | | | | The ctx should hold ref to dev to avoid problems if screen is destroyed before ctx. Doesn't really fix the egl/glx issues, but at least it prevents things from getting much worse. Signed-off-by: Rob Clark <[email protected]>
* freedreno: add prims-emitted driver queryRob Clark2014-02-011-0/+1
| | | | Signed-off-by: Rob Clark <[email protected]>
* i965: Silence unused variable 'ctx' warning.Kenneth Graunke2014-01-311-1/+0
| | | | | | Somehow I missed this before pushing the Broadwell PS state upload code. Signed-off-by: Kenneth Graunke <[email protected]>
* i965: Fix math instruction hstride assertions on Broadwell.Kenneth Graunke2014-01-311-1/+1
| | | | | | | | | | | | | | In the final revision of my gen8_generator patch, I updated the MATH instruction's assertion from (dst.hstride == 1) to check that source and destination hstride matched. Unfortunately, I didn't test this enough, and many Piglit tests fail this test. The documentation indicates that "scalar source is also supported", which we believe means <0,1,0> access mode (hstride == 0). If hstride is non-zero, then it must match the destination register. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Add (disabled) Broadwell PCI IDs.Kenneth Graunke2014-01-311-0/+20
| | | | | | | | | This puts the PCI IDs in place so it's easy to enable support. However, it doesn't actually enable support since it's very preliminary still, and a few crucial pieces (such as BLORP) are still missing. Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Eric Anholt <[email protected]>
* i965: Disable 3DSTATE_WM_HZ_OP fields.Kenneth Graunke2014-01-312-0/+10
| | | | | | | | | | | | | Eric believes this to be wrong and unnecessary, as the command is supposed to emit an implicit rectangle primitive. However, empirically the pixel pipeline is completely unreliable without it. So for now, it stays until someone comes up with a better solution. We'll need to do better than this when we implement multisampling, HiZ, or fast clears...but for now, this will do. Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Eric Anholt <[email protected]>
* i965: Update GS state for Broadwell.Kenneth Graunke2014-01-315-1/+155
| | | | | | | | | | | | | | | This is quite similar to the Gen7 code. The main changes: - 48-bit relocations - Thread count is specified as U/2-1 instead of U-1. - An extra DWord (DW9) with clip planes, URB entry output length/offsets - We need to program the "Expected Vertex Count" (VerticesIn) v2: Set the number of binding table entries so they can be prefetched (requested by Eric Anholt). v3: Add a WARN_ONCE for a missing workaround. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Update multisampling state for Broadwell.Kenneth Graunke2014-01-317-1/+135
| | | | | | | | | | | | | | | | | | | | On previous platforms, 3DSTATE_MULTISAMPLE contained the number of samples, pixel location, and the positions of each sample within a pixel for each multisampling mode (4x and 8x). It was also a non-pipelined command, presumably since changing the sample positions is fairly drastic. Broadwell improves upon this by splitting the sample positions out into a separate non-pipelined state packet, 3DSTATE_SAMPLE_PATTERN. With that removed, 3DSTATE_MULTISAMPLE becomes a pipelined state packet. Broadwell also supports 2x and 16x multisampling, in addition to the 4x and 8x supported by Gen7. This patch, however, does not implement 2x and 16x. Signed-off-by: Kenneth Graunke <[email protected]> Signed-off-by: Chad Versace <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Update 3DSTATE_{DEPTH,STENCIL,...}_BUFFER and such for Broadwell.Kenneth Graunke2014-01-314-1/+180
| | | | | | | | | | | | | | | | | | The amount of cut and paste from Gen7 is rather ugly, and should probably be cleaned up in the future. Even the Gen7 code is in need of some tidying though; many of the function parameters aren't used on platforms that use level/layer rather than tile offsets. Tidying both can be left to a future patch series. This at least gets things going. v2: Rebase on Paul's rename of NumLayers -> MaxNumLayers. v3: Shift QPitch by 2 when storing it in the packet. Bits 14:0 store bits 16:2 of the actual value. Fixes tests. v4: Add missing stencil buffer QPitch. Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Eric Anholt <[email protected]>
* i965: Update BLEND_STATE for Broadwell.Kenneth Graunke2014-01-314-1/+216
| | | | | | | | | | | v2: Allow logic ops on all surface types. The UNORM restriction was lifted with Haswell and I simply hadn't noticed. Also, add missing BRW_NEW_STATE_BASE_ADDRESS dirty bit. Both caught by Eric Anholt. v3: Fix swapped per-RT DWord pairs. Eliminates bizarre hacks. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Update SF_CLIP_VIEWPORT for Broadwell.Kenneth Graunke2014-01-314-1/+121
| | | | | | | | | | | It has additional fields to support clipping to the viewport even if guardband clipping is enabled. v2: Update for viewport array changes. v3: No, seriously, update for viewport array changes. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]> [v1]
* i965: Rework SURFACE_STATE entries for Broadwell.Kenneth Graunke2014-01-315-1/+385
| | | | | | | | | | | | | | | | | | | | | | v2: Add missing SCS setting in gen8_emit_buffer_surface_state (caught by Eric Anholt). v3: Use stored QPitch rather than recomputing it. v4: Shift QPitch by 2 when setting it in the packet; bits 14:0 store bits 16:2 of the actual value (fixes myriads of cube and array texturing tests). Also, only enable cube face bits for cubemaps (matches Chris Forbes' commit on master). Port to use offset64. v5: s/gl_format/mesa_format/g v6: Fix DW5 of renderbuffer state, which neglected to subtract irb->mt->first_level. Use vertical_alignment() rather than hardcoding 4. Use ffs for multisample counts rather than a large switch statement (all caught/suggested by Eric). Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Update SOL state for Broadwell.Kenneth Graunke2014-01-317-19/+215
| | | | | | | | | | | | | | | | | | | | Unlike on Gen7, we can directly set the offset via the state packet. We also -have- to: the kernel SOL reset code won't work anymore. v2: Fix copy and paste mistake in buffer stride setup; drop stale comment (caught by Eric Anholt). Add a perf_debug for missing MOCS setup. v3: Rebase on Paul Berry's changes to CurrentVertexProgram. v4: Fix SO Write Offset handling. We need to set bits 20 and 21 so the hardware both loads and saves the offset. There's also a restriction that 3DSTATE_SO_BUFFER can only be programmed once per buffer between primitives, so the "reset to zero" code needed reworking. Fixes most of the transform feedback Piglit tests. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]> [v2]
* i965: Update the code that disables unused shader stages for Broadwell.Kenneth Graunke2014-01-315-1/+122
| | | | | | | v2: Also disable 3DSTATE_WM_CHROMAKEY for safety. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]> [v1]
* i965: Update 3DSTATE_CLIP for Broadwell.Kenneth Graunke2014-01-312-3/+8
| | | | | | | | | | | Broadwell's winding order, polygon fill, and viewport Z test fields have moved to DWord 1 of 3DSTATE_RASTER. v2: Add a perf_debug for a future optimization and improve commit message (both suggested by Eric Anholt). Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Rework vertex uploads for Broadwell.Kenneth Graunke2014-01-317-3/+274
| | | | | | | | | | | | | | v2: Emit a dummy 3DSTATE_VF_SGVS packet when not needed. v3: Add WARN_ONCE and perf_debugs requested by Eric Anholt. v4: Program 3DSTATE_SGVS even in the no-elements case so gl_VertexID continues working. Fix 3DSTATE_VF_INSTANCING to not use an element index to access the buffers array. Some ARB_draw_indirect prep work. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Update STATE_BASE_ADDRESS for Broadwell.Kenneth Graunke2014-01-314-1/+76
| | | | | | | | | | | | | | | v2: Fix missing "change" bit on instruction state base address (caught by Haihao Xiang). v3: Add a perf_debug for missing MOCS setup, requested by Eric. v4: Fix buffer sizes. The value, specified at bit 12 and up, is actually measured in 4k pages. We need to round up to the next multiple of 4k. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]> [v3] Reviewed-by: Matt Turner <[email protected]> [v4]
* i965: Update 3DSTATE_PS, 3DSTATE_WM, and add 3DSTATE_PS_EXTRA.Kenneth Graunke2014-01-315-2/+237
| | | | | | | | | | | | | | | | v2: Fix setting of GEN8_PSX_ATTRIBUTE_ENABLE after rebases. v3: Add missing binding table entry counts. Don't worry about alpha testing or alpha to coverage when setting the "Kill Pixel" bit; those are specified in 3DSTATE_PS_BLEND (caught by Eric Anholt). Drop unused _NEW_BUFFERS. Tidy comments. v4: Rebase on Paul Berry's changes to CurrentFragmentProgram. v5: Re-enable line stippling. It doesn't crash or anything. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]> [v3]
* i965: Rework 3DSTATE_VS for Broadwell.Kenneth Graunke2014-01-315-3/+144
| | | | | | | | | | | | | | | | | | v2: Remove incorrect MOCS shifts; rename urb_entry_write_offset to urb_entry_output_offset to closer match the documentation. v3: Only emit a non-zero constant buffer read length when active. v4: Add missing binding table counts (caught by Eric). v5: Rebase on Paul Berry's changes to CurrentVertexProgram. v6: Drop bogus SBE read length/offset field code. We were programming the wrong values, and our 3DSTATE_SBE code overrides any value we put here anyway with the correct one. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]> [v4]
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