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* nv50: simplify tesla object selectionBen Skeggs2009-03-071-18/+8
| | | | | GeForce 8/9 are a bit more consistent than nv40 so far, so this was overkill before.
* nouveau: fix more breakage from pipe_reference..Ben Skeggs2009-03-071-0/+1
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* nouveau: make stateobjs start off with refcount of 1Ben Skeggs2009-03-0726-2/+45
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* Fix nv50_screen_create()Victor Stinner2009-03-071-17/+18
| | | | | Setup screen->pipe before using it (screen->constbuf = screen->pipe.buffer_create(...))
* Fix nouveau_pipe_create() / nouveau_context_init(): raise an error if the ↵Victor Stinner2009-03-072-3/+10
| | | | screen/pipe creation failed
* Add Solaris to OS'es using PROT_EXEC mmap() to get executable heap spaceAlan Coopersmith2009-03-061-1/+1
| | | | Signed-off-by: Alan Coopersmith <[email protected]>
* r300-gallium: Fix masking on vertex formats.Corbin Simpson2009-03-061-2/+2
| | | | Gah, what a simple yet terrible mistake.
* r300-gallium: Remove unknown regs.Corbin Simpson2009-03-061-11/+0
| | | | Leftovers from fglrx traces, probably.
* r300-gallium: Actually do framebuffer setup.Corbin Simpson2009-03-061-1/+6
| | | | Can't believe this wasn't wired up.
* r300-gallium: Make sure registers are inside BEGIN/END CS.Corbin Simpson2009-03-061-1/+2
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* r300-gallium: Separate out fog block.Corbin Simpson2009-03-062-9/+9
| | | | We'll never actually use fog block. (I hope.)
* glsl: call the program optimizerBrian Paul2009-03-061-0/+5
| | | | This still needs more testing bug glean and Mesa GLSL tests seem OK.
* i965: check if we run out of GRF/temp registersBrian Paul2009-03-061-1/+25
| | | | | | | Before this change we would up emitting instructions with invalid register numbers. This typically (but not always) hung the GPU. For now, just prevent emitting bad instructions to avoid hangs. Still need to do some kind of proper error recovery.
* mesa: added _mesa_read_shader() function to read shaders from filesBrian Paul2009-03-061-0/+51
| | | | Useful for debugging to override an application's shader.
* i965: bump up BRW_EU_MAX_INSNBrian Paul2009-03-061-1/+1
| | | | This is the size of the intermediate instruction buffer.
* mesa: add new program optimizer codeBrian Paul2009-03-064-0/+462
| | | | This is pretty simplistic for now, but helps with certain shaders.
* i965: commentsBrian Paul2009-03-061-0/+2
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* i965: comments and minor clean-upsBrian Paul2009-03-061-3/+43
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* i965: avoid unnecessary calls to brw_wm_is_glsl()Brian Paul2009-03-064-2/+12
| | | | | | | | | This function scans the shader to see if it has any GLSL features like conditionals and loops. Calling this during state validation is expensive. Just call it when the shader is given to the driver and save the result. There's some new/temporary assertions to be sure we don't get out of sync on this.
* r300: fix depth write regression (found by Nicolai Haehnle)Maciej Cencora2009-03-061-3/+10
| | | | Signed-off-by: Nicolai Haehnle <[email protected]>
* r300: enable EXT_fog_coord extensionMaciej Cencora2009-03-062-161/+20
| | | | | | Remove fixed function fog setup. Signed-off-by: Nicolai Haehnle <[email protected]>
* r300: route fog coord and W pos correctlyMaciej Cencora2009-03-062-42/+106
| | | | | | Also cleanup sw tcl vertex buffer setup Signed-off-by: Nicolai Haehnle <[email protected]>
* r300: rewrite and hopefully simplify RS setupMaciej Cencora2009-03-063-213/+225
| | | | | | Testing and regression fixes by Markus Amsler Signed-off-by: Nicolai Haehnle <[email protected]>
* r300: add few macros for RS setupMaciej Cencora2009-03-061-0/+6
| | | | Signed-off-by: Nicolai Haehnle <[email protected]>
* r300: silence valgrindMaciej Cencora2009-03-061-1/+1
| | | | Signed-off-by: Nicolai Haehnle <[email protected]>
* r300: Print reg address when debugging is enabledMaciej Cencora2009-03-061-4/+14
| | | | Signed-off-by: Nicolai Haehnle <[email protected]>
* fp: add some more texture, position and kill testsKeith Whitwell2009-03-064-1/+36
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* fp: new kill + position testKeith Whitwell2009-03-061-0/+9
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* fp: dont reference fragment.position.zwKeith Whitwell2009-03-061-1/+2
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* engine: also print fps data to stdoutKeith Whitwell2009-03-061-0/+22
| | | | | Useful for figuring out how much of a perf impact the glBitmap fps display has on a given driver.
* r300: don't crash on sw tcl hw if point size vertex attrib is sentMaciej Cencora2009-03-061-2/+2
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* r300-gallium: GA enhancements.Corbin Simpson2009-03-062-3/+14
| | | | Basically an errata fixup register.
* r300-gallium: Flat/smooth shading state.Corbin Simpson2009-03-066-17/+32
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* r300-gallium: Pick up a few more bits of rs_state.Corbin Simpson2009-03-065-14/+23
| | | | Including two registers that already should have been covered...huh...
* wgl: Check support for all other depth/stencil formats.José Fonseca2009-03-061-7/+18
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* wgl: Choose a supported S8Z24/Z24S8/X8Z24/Z24X8.José Fonseca2009-03-061-2/+24
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* Updated darwin config for when X11 is not in the same location as we're ↵Jeremy Huddleston2009-03-061-6/+8
| | | | installing to
* mesa: Reads must also be done with lock held.José Fonseca2009-03-061-3/+5
| | | | Otherwise two threads might think each made the refcount go zero.
* mesa: Fix typo.José Fonseca2009-03-061-1/+1
| | | | Windows threads block if one over-unlocks them.
* intel: Fix bpp setting of blits to 8bpp targets.Eric Anholt2009-03-051-0/+2
| | | | | This was causing hangs in cairogears, as we would blit to the 8bpp target (A8 texture) as 16bpp, and stomp over state objects.
* i965: fix 3DPRIMITIVE batch decode of the vertex count field.Eric Anholt2009-03-051-1/+1
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* i965: Stop dumping programs after the first all-zeroes entry.Eric Anholt2009-03-051-0/+8
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* intel: Add always_flush_batch driconf option for making small batchbuffers.Eric Anholt2009-03-056-1/+25
| | | | | This can improve debugging with INTEL_DEBUG=batch,sync by giving smaller batchbuffers.
* intel: Add always_flush_cache driconf option for debugging cache flush failure.Eric Anholt2009-03-057-2/+42
| | | | | I keep wanting to hack this knob in as a one-time thing, so it seemed useful to have all the time.
* i965: Add a note about why the _NEW_STENCIL is required in draw_buffers.Eric Anholt2009-03-051-0/+5
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* intel: Remove a gratuitous MI_FLUSH after clearing with a blit.Eric Anholt2009-03-051-1/+0
| | | | | The 3D destination shares the same cache so we don't have any trouble with the later commands needing the writes flushed inside of the same batchbuffer.
* i965: Remove dead flushing code.Eric Anholt2009-03-054-23/+0
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* st/xorg: Install to XORG_DRIVER_INSTALL_DIRJoel Bosveld2009-03-065-2/+17
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* i965: comments and formatting fixesBrian Paul2009-03-051-4/+14
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* i965: fix emit_math1() function used for scalar instructionsBrian Paul2009-03-051-9/+32
| | | | | | | | | Instructions such as RCP, RSQ, LOG must smear the result of the function across the dest register's X, Y, Z and W channels (subject to write masking). Before this change, only the X component was getting written. Among other things, this fixes cube map texture sampling in GLSL shaders (since cube lookups involve normalizing the texcoord).
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