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* i965: Fix flipped value of the not-embedded-in-if on gen6.Eric Anholt2010-12-071-1/+1
| | | | | | Fixes: glean/glsl1-! (not) operator (1, fail) glean/glsl1-! (not) operator (1, pass)
* glsl: Inherrit type of declared variable from initializerIan Romanick2010-12-071-0/+18
| | | | | | | | | | | | | Types of declared variables and their initializer must match excatly except for unsized arrays. Previously the type inherritance for unsized arrays happened implicitly in the emitted assignment. However, this assignment is never emitted for uniforms. Now that type is explicitly copied unconditionally. Fixes piglit test array-compare-04.vert (bugzilla #32035) and glsl-array-uniform-length (bugzilla #31985). NOTE: This is a candidate for the 7.9 branch.
* i965: Work around gen6 ignoring source modifiers on math instructions.Eric Anholt2010-12-073-3/+26
| | | | | | | | | | | | | | | With the change of extended math from having the arguments moved into mrfs and handed off through message passing to being directly hooked up to the EU, it looks like the piece for doing source modifiers (negate and abs) was left out. Fixes: fog-modes glean/fp1-ARB_fog_exp test glean/fp1-ARB_fog_exp2 test glean/fp1-Computed fog exp test glean/fp1-Computed fog exp2 test ext_fog_coord-modes
* i965: Add disabled debug code for dumping out the WM constant payload.Eric Anholt2010-12-071-0/+15
| | | | This can significantly ease thinking about the asm.
* i965: Correctly emit constants for aggregate types (array, matrix, struct)Ian Romanick2010-12-071-19/+61
| | | | | | | Previously the code only handled scalars and vectors. This new code is modeled somewhat after similar code in ir_to_mesa. Reviewed-by: Eric Anholt <[email protected]>
* r600g: fix userspace fence against lastest kernelJerome Glisse2010-12-072-0/+3
| | | | | | | | | | | | | R6XX GPU doesn't like to have two partial flush writting back to memory in row without a prior flush of the pipeline. Add PS_PARTIAL_FLUSH to flush all work between the CP and the ES, GS, VS, PS shaders. Thanks a lot to Alban Browaeys (prahal on irc) for investigating this issue. Signed-off-by: Alban Browaeys <[email protected]> Signed-off-by: Jerome Glisse <[email protected]>
* r600g: remove dead codeJerome Glisse2010-12-076-268/+8
| | | | Signed-off-by: Jerome Glisse <[email protected]>
* i965: Always hand the absolute value to RSQ.Eric Anholt2010-12-072-1/+6
| | | | | | | | | | gen6 builtin RSQ apparently clamps negative values to 0 instead of returning the RSQ of the absolute value like ARB_fragment_program desires and pre-gen6 apparently does. Fixes: glean/fp1-RSQ test 2 (reciprocal square root of negative value) glean/vp1-RSQ test 2 (reciprocal square root of negative value)
* glsl: Ensure that equality comparisons don't return a NULL IR treeIan Romanick2010-12-071-16/+19
| | | | | | | This fixes bugzilla #32035 and piglit test case array-compare-01 and array-compare-02. NOTE: This is a candidate for the 7.9 branch.
* i965: Handle saturates on gen6 math instructions.Eric Anholt2010-12-071-0/+2
| | | | | | We get saturate as an argument to brw_math() instead of as compile state, since that's how the pre-gen6 send instructions work. Fixes fp-ex2-sat.
* i965: Fix comment about gen6_wm_constants.Eric Anholt2010-12-071-1/+1
| | | | This is the push constant buffer, not the pull constants.
* Refresh autogenerated glcpp parser.Kenneth Graunke2010-12-071-47/+46
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* glcpp: Don't emit SPACE tokens in conditional_tokens production.Kenneth Graunke2010-12-071-1/+0
| | | | | | | | Fixes glslparsertest defined-01.vert. Reported-by: José Fonseca <[email protected]> Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Carl Worth <[email protected]>
* r300g: also revalidate the SWTCL vertex buffer after its reallocationMarek Olšák2010-12-071-0/+1
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* i965: upload WM state for _NEW_POLYGON on sandybridgeZhenyu Wang2010-12-071-1/+1
| | | | Be sure polygon stipple mode is updated. This fixes 'gamma' demo.
* r200: Silence uninitialized variable warning.Vinson Lee2010-12-071-0/+1
| | | | | | Fixes this GCC warning. r200_maos_arrays.c: In function 'r200EmitArrays': r200_maos_arrays.c:113: warning: 'emitsize' may be used uninitialized in this function
* i965: set minimum/maximum Point Width on SandybridgeXiang, Haihao2010-12-071-1/+3
| | | | It is used for point width on vertex. This fixes mesa demo spriteblast and pointblast.
* mesa: Clean up header file inclusion in viewport.h.Vinson Lee2010-12-071-1/+2
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* mesa: Clean up header file inclusion in varray.h.Vinson Lee2010-12-071-1/+5
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* mesa: Clean up header file inclusion in transformfeedback.h.Vinson Lee2010-12-071-1/+6
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* mesa: Clean up header file inclusion in texrender.h.Vinson Lee2010-12-071-1/+3
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* r300g: validate buffers only if any of bound buffers is changedMarek Olšák2010-12-077-13/+39
| | | | This prevents needless buffer validation (CS space checking).
* r300g: cache packet dwords of 3D_LOAD_VBPNTR in a command buffer if possibleMarek Olšák2010-12-073-15/+65
| | | | | | | | | It's not always possible to preprocess the content of 3D_LOAD_VBPNTR in a command buffer, because the offset to all vertex buffers (which the packet depends on) is derived from the "start" parameter of draw_arrays and the "indexBias" parameter of draw_elements, but we can at least lazily make a command buffer for the case when offset == 0, which should occur most of the time.
* u_blitter: use util_is_format_compatible in the assertMarek Olšák2010-12-071-1/+2
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* mesa: consolidate glTexImage1/2/3D() codeBrian Paul2010-12-061-294/+161
| | | | | Something similar could be done for glCopyTex[Sub]Image() and the compressed texture image functions as well.
* mesa: set gl_texture_object::_Complete=FALSE in incomplete()Brian Paul2010-12-061-27/+5
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* mesa: test for cube map completeness in glGenerateMipmap()Brian Paul2010-12-063-0/+49
| | | | | | | The texture is not cube complete if the base level images aren't of the same size and format. NOTE: This is a candidate for the 7.9 branch.
* glsl: Properly add functions during lazy built-in prototype importing.Kenneth Graunke2010-12-063-7/+25
| | | | | | | | | | | | The original lazy built-in importing patch did not add the newly created function to the symbol table, nor actually emit it into the IR stream. Adding it to the symbol table is non-trivial since importing occurs when generating some ir_call in a nested scope. A new add_global_function method, backed by new symbol_table code in the previous patch, handles this. Fixes bug #32030.
* symbol_table: Add support for adding a symbol at top-level/global scope.Kenneth Graunke2010-12-062-5/+84
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* glsl: Factor out code which emits a new function into the IR stream.Kenneth Graunke2010-12-062-18/+26
| | | | A future commit will use the newly created function in a second place.
* st/mesa: Unbind all constant buffersJakob Bornecrantz2010-12-061-2/+2
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* r600g: remove useless flush mapJerome Glisse2010-12-062-30/+1
| | | | Signed-off-by: Jerome Glisse <[email protected]>
* r600g: avoid useless shader rebuild at draw callJerome Glisse2010-12-067-47/+108
| | | | | | | | | Avoid rebuilding constant shader state at each draw call, factor out spi update that might change at each draw call. Best would be to update spi only when revealent states change (likely only flat shading & sprite point). Signed-off-by: Jerome Glisse <[email protected]>
* r600g: build fetch shader from vertex elementsJerome Glisse2010-12-0611-44/+619
| | | | | | | | | | | | Vertex elements change are less frequent than draw call, those to avoid rebuilding fetch shader to often build the fetch shader along vertex elements. This also allow to move vertex buffer setup out of draw path and make update to it less frequent. Shader update can still be improved to only update SPI regs (based on some rasterizer state like flat shading or point sprite ...). Signed-off-by: Jerome Glisse <[email protected]>
* mesa: Bump the number of bits in the register index.José Fonseca2010-12-061-1/+1
| | | | | | More than 1023 temporaries were being used for a Cinebench shader before doing temporary optimization, causing the index value to wrap around to -1024.
* st/mesa: fix mipmap generation bugBrian Paul2010-12-062-1/+8
| | | | | | | | | | | In st_finalize_texture() we were looking at the st_texture_object:: lastLevel field instead of the pipe_resource::last_level field to determine which resource to store the mipmap in. Then, in st_generate_mipmap() we need to call st_finalize_texture() to make sure the destination resource is properly allocated. These changes fix the broken piglit fbo-generatemipmap-formats test.
* mesa/llvm: use llvm-config --cppflagsBrian Paul2010-12-061-3/+2
| | | | | | | Use --cppflags instead of --cflags so that we get the -I and -D flags we want, but not compiler options like -O3. A similar change should probably be made for autoconf.
* gallium/util: minor formatting fixesBrian Paul2010-12-061-3/+3
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* mesa: add error margin to clip mask debug/check codeBrian Paul2010-12-061-2/+29
| | | | | | | | When X or Y or Z is close to W the outcome of the floating point clip test comparision may be different between the C and x86 asm paths. That's OK; don't report an error. See fd.o bug 32093
* i965: Remove INTEL_DEBUG=glsl_force now that there's no brw_wm_glsl.cEric Anholt2010-12-062-7/+0
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* i965: Nuke brw_wm_glsl.c.Eric Anholt2010-12-068-1057/+10
| | | | | | | | | | It was only used for gen6 fragment programs (not GLSL shaders) at this point, and it was clearly unsuited to the task -- missing opcodes, corrupted texturing, and assertion failures hit various applications of all sorts. It was easier to patch up the non-glsl for remaining gen6 changes than to make brw_wm_glsl.c complete. Bug #30530
* i965: Add support for the instruction compression bits on gen6.Eric Anholt2010-12-064-47/+91
| | | | | | Since the 8-wide first-quarter and 16-wide first-half have the same bit encoding, we now need to track "do you want instruction compression" in the compile state.
* i965: Align gen6 push constant size to dispatch width.Eric Anholt2010-12-061-1/+2
| | | | | | | The FS backend is fine with register level granularity. But for the brw_wm_emit.c backend, it expects pairs of regs to be used for the constants, because the whole world is pairs of regs. If an odd number got used, we went looking for interpolation in the wrong place.
* i965: Make the sampler's implied move on gen6 be a raw move.Eric Anholt2010-12-061-1/+1
| | | | We were accidentally doing a float-to-uint conversion.
* i965: Fix up gen6 samplers for their usage by brw_wm_emit.cEric Anholt2010-12-061-7/+9
| | | | | We were trying to do the implied move even when we'd already manually moved the real header in place.
* i965: Fix gen6 interpolation setup for 16-wide.Eric Anholt2010-12-061-15/+26
| | | | | | In the SF and brw_fs.cpp fixes to set up interpolation sanely on gen6, the setup for 16-wide interpolation was left behind. This brings relative sanity to that path too.
* i965: Don't smash a group of coordinates doing gen6 16-wide sampler headers.Eric Anholt2010-12-061-0/+1
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* i965: Fix up 16-wide gen6 FB writes after various refactoring.Eric Anholt2010-12-061-9/+8
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* i965: Provide delta_xy reg to gen6 non-GLSL path PINTERP.Eric Anholt2010-12-061-8/+6
| | | | Fixes many assertion failures in that path.
* i965: Move payload reg setup to compile, not lookup time.Eric Anholt2010-12-069-110/+118
| | | | | | | | Payload reg setup on gen6 depends more on the dispatch width as well as the uses_depth, computes_depth, and other flags. That's something we want to decide at compile time, not at cache lookup. As a bonus, the fragment shader program cache lookup should be cheaper now that there's less to compute for the hash key.
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