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* dri_util: set implemented version of the DRI_CORE extensionEmil Velikov2014-05-251-1/+1
| | | | | | | ... rather than the one defined in our internal interface (dri_interface.h) Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]>
* i965/fs: Don't modify ann_count if not debugging.Matt Turner2014-05-252-2/+8
| | | | | | | If we make ann_count non-zero, annotation_finalize() won't bail. Not modifying it seems to make the code more clear than would modifying annotation_finalize().
* Revert "i965/fs: Change fs_visitor::emit_lrp to use MAC for gen<6"Matt Turner2014-05-241-4/+7
| | | | | | | | | | | | | | | | | | | | | This reverts commit a6860100b87415ab510d0d210cabfeeccebc9a0a. Why this code didn't work in all circumstances is unknown and without a working Ironlake simulator (which uses a different AUB format) we'll probably never know, short of a lot of experimentation, and spending a bunch of time to try to optimize a few instructions on Ironlake is not time well spent. Moreover, for mix(vec4, vec4, vec4) using the accumulator introduces a dependence between the otherwise independent per-component calculations. Not using the accumulator, even if it means an extra instruction per component might be preferable. We don't know, we don't have data, and we don't have the necessary register on Ironlake for shader_time to tell us. Cc: "10.2" <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=77707 Acked-by: Kenneth Graunke <[email protected]>
* Revert "i965/vec4: Change vec4_visitor::emit_lrp to use MAC for gen<6"Matt Turner2014-05-241-6/+10
| | | | | | | | | | | | | | | | | | | | | | This reverts commit 2dfbbeca50b95ccdd714d9baa4411c779f6a20d9 with the comment about MAC and implicit accumulator removed. Why this code didn't work in all circumstances is unknown and without a working Ironlake simulator (which uses a different AUB format) we'll probably never know, short of a lot of experimentation, and spending a bunch of time to try to optimize a few instructions on Ironlake is not time well spent. Moreover, for mix(vec4, vec4, vec4) using the accumulator introduces a dependence between the otherwise independent per-component calculations. Not using the accumulator, even if it means an extra instruction per component might be preferable. We don't know, we don't have data, and we don't have the necessary register on Ironlake for shader_time to tell us. Cc: "10.2" <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=77703 Acked-by: Kenneth Graunke <[email protected]>
* i965: Remove useless typo'd debugging messages.Matt Turner2014-05-241-6/+0
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Move brw_land_fwd_jump() to compilation unit of its use.Matt Turner2014-05-243-23/+16
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Use next_insn_offset rather than nr_insn.Matt Turner2014-05-242-4/+4
| | | | | Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Emit 0.0:F sources with type VF instead.Matt Turner2014-05-241-0/+16
| | | | | | Number of compacted instructions: 817752 -> 827404 (1.18%) Reviewed-by: Eric Anholt <[email protected]>
* i965: Emit ARF:UD for non-present src1 on Gen6+.Matt Turner2014-05-241-2/+26
| | | | | | Enables the next commits to compact more instructions. Reviewed-by: Eric Anholt <[email protected]>
* i965: Support compacted instructions with immediate sources.Matt Turner2014-05-241-20/+63
| | | | | | | | | | Note the weirdness with src1 subregs. The compacted immediate fields are uncompacted to bits [127:96] and the high five bits of the subreg mapping maps to bits [100:96]. Number of compacted instructions: 790085 -> 817752 (3.50%) Reviewed-by: Eric Anholt <[email protected]>
* i965: Use next_offset() in instruction compaction code.Matt Turner2014-05-241-17/+3
| | | | Reviewed-by: Eric Anholt <[email protected]>
* i965: Move next_offset() to brw_eu.h for use elsewhere.Matt Turner2014-05-242-11/+12
| | | | | | | Also perform arithmetic on char* rather than void* since the latter is a GNU C extension not available in C++. Reviewed-by: Eric Anholt <[email protected]>
* i965: Rename next_ip() -> next_offset().Matt Turner2014-05-241-30/+33
| | | | | | | | | | That we were comparing its return value with offsets should have been a clue. :) Make it take a void *store in preparation for making the function useful elsewhere. Reviewed-by: Eric Anholt <[email protected]>
* i965: Print disassembly after compaction.Matt Turner2014-05-249-283/+198
| | | | Reviewed-by: Eric Anholt <[email protected]>
* i965/fs: Make patch_discard_jumps_to_fb_writes return bool.Matt Turner2014-05-243-6/+8
| | | | | | | | ... to tell us whether it emitted any code. Will be used to determine whether we need to skip an annotation for it. Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Juha-Pekka Heikkila <[email protected]>
* i965: Add annotation data structure and support code.Matt Turner2014-05-2411-9/+183
| | | | | | | | | | | | | | | | Will be used to print disassembly after jump targets are set and instructions are compacted, while still retaining higher-level IR annotations and basic block information. An array of 'struct annotation' will live along side the generated assembly. The generators will populate the array with their IR annotations, and basic block pointers if the instructions began or ended a basic block pointer. We'll then update the instruction offset when we compact instructions and then using the annotations print the disassembly. Reviewed-by: Eric Anholt <[email protected]>
* i965/fs+blorp: Remove left over dump_file arguments.Matt Turner2014-05-245-19/+15
| | | | | | | Were used by the blorp unit test programs. Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Juha-Pekka Heikkila <[email protected]>
* i965/fs: Don't hardcode DEBUG_WM in generic fs code.Matt Turner2014-05-246-27/+25
| | | | | | | Similar to Paul's commit e9fa3a944 except brw_fs_generator's debug_flag is for DEBUG_WM and DEBUG_BLORP. Reviewed-by: Eric Anholt <[email protected]>
* i965: Pass in start_offset to brw_compact_instructions().Matt Turner2014-05-248-17/+17
| | | | | | | Let's us avoid recompacting the SIMD8 instructions when we compact the SIMD16 program. Reviewed-by: Eric Anholt <[email protected]>
* i965: Delete unused brw_blorp_blit_test_compile().Matt Turner2014-05-241-11/+0
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* i965/cfg: Make DO instruction begin a basic block.Matt Turner2014-05-241-9/+12
| | | | | | | | | | | | | | | | | The DO instruction doesn't exist on Gen6+. Since before this commit, DO always ended a basic block, if it also happened to start one (e.g., a while loop inside an if statement) the block containing only the DO would actually contain no hardware instructions. Pre-Gen6's WHILE instructions jumps to the instruction following the DO, so strictly speaking we won't be modeling that properly, but I claim there is actually no functional difference. This will simplify an upcoming change where we want to mark the first hardware instruction in the loop as beginning a block, and the last instruction before the loop as ending one. Reviewed-by: Eric Anholt <[email protected]>
* darwin: Guard Core Profile usage behind a testing envvarJeremy Huddleston Sequoia2014-05-241-10/+20
| | | | Signed-off-by: Jeremy Huddleston Sequoia <[email protected]>
* darwin: Write errors in choosing the pixel format to the crash logJeremy Huddleston Sequoia2014-05-241-2/+16
| | | | Signed-off-by: Jeremy Huddleston Sequoia <[email protected]>
* nv50: count wrapped textures towards the tex_obj countJoakim Sindholt2014-05-231-0/+2
| | | | | | | But don't count their size towards the allocated memory, since that belongs to whoever created it. Reviewed-by: Ilia Mirkin <[email protected]>
* nvc0: assert that we have vertex elements stateChristoph Bumiller2014-05-231-0/+1
| | | | Reviewed-by: Ilia Mirkin <[email protected]>
* nvc0: use PRIxPTR for sizeof()Christoph Bumiller2014-05-231-1/+1
| | | | Reviewed-by: Ilia Mirkin <[email protected]>
* nv50,nvc0: allow 15,16,30 bpp display formatsChristoph Bumiller2014-05-231-4/+4
| | | | Reviewed-by: Ilia Mirkin <[email protected]>
* nv50,nvc0: handle guard band definesChristoph Bumiller2014-05-232-4/+16
| | | | | [imirkin: moved default case out of switch] Reviewed-by: Ilia Mirkin <[email protected]>
* nv50/ir/tgsi: optimize KILChristoph Bumiller2014-05-231-0/+5
| | | | | Reviewed-by: Ilia Mirkin <[email protected]> Cc: "10.2" <[email protected]>
* nv50/ir: fix lowering of predicated instructions (without defs)Christoph Bumiller2014-05-231-1/+4
| | | | | | | | Note that predicated instructions with defs are still not supported because transformation to SSA doesn't handle them yet. Reviewed-by: Ilia Mirkin <[email protected]> Cc: "10.2" <[email protected]>
* nv50/ir/opt: fix constant folding with saturate modifierChristoph Bumiller2014-05-231-1/+3
| | | | | Reviewed-by: Ilia Mirkin <[email protected]> Cc: "10.2" <[email protected]>
* nv50/ir/tgsi: TGSI_OPCODE_POW replicates its resultChristoph Bumiller2014-05-231-1/+5
| | | | | Reviewed-by: Ilia Mirkin <[email protected]> Cc: "10.2" <[email protected]>
* nv50,nvc0: set constbufs dirty on pipe context switchChristoph Bumiller2014-05-232-0/+5
| | | | | Reviewed-by: Ilia Mirkin <[email protected]> Cc: "10.2" <[email protected]>
* nv50: setup scissors on clear_render_target/depth_stencilChristoph Bumiller2014-05-231-2/+18
| | | | | | [imirkin: add logic to also clear the "regular" scissors] Reviewed-by: Ilia Mirkin <[email protected]> Cc: "10.2" <[email protected]>
* nv50,nvc0: always pull out bufctx on context destructionChristoph Bumiller2014-05-232-9/+7
| | | | | Reviewed-by: Ilia Mirkin <[email protected]> Cc: "10.2" <[email protected]>
* i965: Properly return *RESET* status in glGetGraphicsResetStatusARBPavel Popov2014-05-231-5/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The glGetGraphicsResetStatusARB from ARB_robustness extension always returns GUILTY_CONTEXT_RESET_ARB and never returns NO_ERROR for guilty context with LOSE_CONTEXT_ON_RESET_ARB strategy. This is because Mesa returns GUILTY_CONTEXT_RESET_ARB if batch_active !=0 whereas kernel driver never reset batch_active and this variable always > 0 for guilty context. The same behaviour also can be observed for batch_pending and INNOCENT_CONTEXT_RESET_ARB. But ARB_robustness spec says: If a reset status other than NO_ERROR is returned and subsequent calls return NO_ERROR, the context reset was encountered and completed. If a reset status is repeatedly returned, the context may be in the process of resetting. 8. How should the application react to a reset context event? RESOLVED: For this extension, the application is expected to query the reset status until NO_ERROR is returned. If a reset is encountered, at least one *RESET* status will be returned. Once NO_ERROR is encountered, the application can safely destroy the old context and create a new one. The main problem is the context may be in the process of resetting and in this case a reset status should be repeatedly returned. But looks like the kernel driver returns nonzero active/pending only if the context reset has already been encountered and completed. For this reason the *RESET* status cannot be repeatedly returned and should be returned only once. The reset_count and brw->reset_count variables can be used to control that glGetGraphicsResetStatusARB returns *RESET* status only once for each context. Note the i915 triggers reset_count twice which allows to return correct reset count immediately after active/pending have been incremented. v2 (idr): Trivial reformatting of comments. Signed-off-by: Pavel Popov <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Cc: "10.1 10.2" <[email protected]>
* appleglx: Improve error reporting if CGLChoosePixelFormat() didn't find any ↵Jon TURNEY2014-05-231-0/+5
| | | | | | | matching pixel formats. Signed-off-by: Jon TURNEY <[email protected]> Reviewed-by: Jeremy Huddleston Sequoia <[email protected]>
* Fix build of appleglxJon TURNEY2014-05-2322-291/+80
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Define GLX_USE_APPLEGL, as config/darwin used to, to turn on specific code to use the applegl direct renderer Convert src/glx/apple/Makefile to automake Since the applegl libGL is now built by linking libappleglx into libGL, rather than by linking selected files into a special libGL: - Remove duplicate code in apple/glxreply.c and apple/apple_glx.c. This makes apple/glxreply.c empty, so remove it - Some indirect rendering code is already guarded by !GLX_USE_APPLEGL, but we need to add those guards to indirect_glx.c, indirect_init.c (via it's generator), render2.c and vertarr.c so they don't generate anything Fix and update various includes glapi_gentable.c (which is only used on darwin), should be included in shared glapi as well, to provide _glapi_create_table_from_handle() Note that neither swrast nor indirect is supported in the APPLEGL path at the moment, which makes things more complex than they need to be. More untangling is needed to allow that v2: Correct apple/Makefile.am for srcdir != builddir Signed-off-by: Jon TURNEY <[email protected]> Reviewed-by: Jeremy Huddleston Sequoia <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* Make DRI dependencies and build depend on the targetJon TURNEY2014-05-2313-41/+88
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Don't require xcb-dri[23] etc. if we aren't building for a target with DRM, as we won't be using dri[23] - Enable a more fine-grained control of what DRI code is built, so that a libGL using direct swrast can be built on targets which don't have DRM. The HAVE_DRI automake conditional is retired in favour of a number of other conditionals: HAVE_DRI2 enables building of code using the DRI2 interface (and possibly DRI3 with HAVE_DRI3) HAVE_DRISW enables building of DRI swrast HAVE_DRICOMMON enables building of target-independent DRI code, and also enables some makefile cases where a more detailled decision is made at a lower level. HAVE_APPLEDRI enables building of an Apple-specific direct rendering interface, still which requires additional fixing up to build properly. v2: Place xfont.c and drisw_glx.c into correct categories. Update 'make check' as well Signed-off-by: Jon TURNEY <[email protected]> Reviewed-by: Jeremy Huddleston Sequoia <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* Fix build for darwinJon TURNEY2014-05-239-3/+63
| | | | | | | | | | | | | | | | | | | Fix build for darwin, when ./configured --disable-driglx-direct - darwin ld doesn't support -Bsymbolic or --version-script, so check if ld supports those options before using them - define GLX_ALIAS_UNSUPPORTED as config/darwin used to, as aliasing of non-weak symbols isn't supported - default to -with-dri-drivers=swrast v2: Use -Wl,-Bsymbolic, as before, not -Bsymbolic Test that ld --version-script works, rather than just looking for it in ld --help Don't use -Wl,--no-undefined on darwin, either Signed-off-by: Jon TURNEY <[email protected]> Reviewed-by: Jeremy Huddleston Sequoia <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* targets/egl-static: add missing line break in ldflagsEmil Velikov2014-05-231-1/+1
| | | | | | | | Accidently omitted by commit 7b7944ee1cedeaf. Cc: "10.2" <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Jon TURNEY <[email protected]>
* mesa: Fix unbinding GL_DEPTH_STENCIL_ATTACHMENTJames Legg2014-05-231-0/+6
| | | | | | | | | glFramebufferRender(..., GL_DEPTH_STENCIL_ATTACHMENT, ..., 0) only detached the depth buffer and not the stencil buffer. Bugzilla: http://bugs.freedesktop.org/show_bug.cgi?id=79115 Reviewed-by: Brian Paul <[email protected]> Cc: "10.1 10.2" <[email protected]>
* targets/osmesa: limit the amount of exported symbolsEmil Velikov2014-05-232-0/+19
| | | | | | | src/gallium/targets/osmesa/Makefile.am | 1 + src/gallium/targets/osmesa/osmesa.sym | 18 ++++++++++++++++++ 2 files changed, 19 insertions(+) create mode 100644 src/gallium/targets/osmesa/osmesa.sym
* gallivm: Disable workaround for PR12833 on LLVM 3.2+.José Fonseca2014-05-231-2/+2
| | | | Fixed upstream.
* gallivm: Support MCJIT on Windows.José Fonseca2014-05-232-5/+12
| | | | | | | It works fine, though it requires using ELF objects. With this change there is nothing preventing us to switch exclusively to MCJIT, everywhere. It's still off though.
* mesa/x86: Fix build with clang 3.4.José Fonseca2014-05-231-0/+4
| | | | | | | | It defines bit_SSE41 instead of bit_SSE4_1. Fixes https://bugs.freedesktop.org/show_bug.cgi?id=79095 Trivial.
* mesa: Move declaration to top of block.José Fonseca2014-05-231-1/+3
| | | | To fix MSVC build. Trivial.
* meta blit: Set Z texcoord during meta blit to sample the correct layerJordan Justen2014-05-231-1/+8
| | | | | | | | | | | | If the source renderbuffer has a depth > 0, then send a Z texcoord which is set to the source attachment Z offset. This fixes piglit's gl-3.2-layered-rendering-gl-layer-render with the GL_TEXTURE_2D_MULTISAMPLE_ARRAY case test on i965/gen8. Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Anuj Phogat <[email protected]> Cc: "10.2" <[email protected]>
* i965: Listen to BRW_NEW_FRAGMENT_PROGRAM for 3DSTATE_PS_BLEND.Kenneth Graunke2014-05-232-2/+3
| | | | | | | | | | | | | | brw_color_buffer_write_enabled depends on brw->fragment_program, which means we have to listen to BRW_NEW_FRAGMENT_PROGRAM. On most generations, this was only called from a function that already subscribed. However, on Broadwell, we failed to listen to the necessary event in the atom that emits 3DSTATE_PS_BLEND. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Cc: "10.2" <[email protected]>
* i965: Use WE_all for FB write header setup on Broadwell.Kenneth Graunke2014-05-231-6/+7
| | | | | | | | | | | | I forgot to disable writemasking on the OR and MOV which set the render target index and "source 0 alpha present to render target" bit. Using get_element_ud is equivalent and avoids a line-wrap. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Cc: "10.2" <[email protected]>
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