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* intel/blorp: Add swizzle support for all hardwareJason Ekstrand2018-05-092-1/+69
* intel/isl: Add a helper for inverting swizzlesJason Ekstrand2018-05-092-0/+32
* intel/isl: Add a helper for composing swizzlesJason Ekstrand2018-05-092-0/+38
* intel/isl: Add an isl_swizzle_supports_rendering helperJason Ekstrand2018-05-093-32/+71
* i965/surface_state: Use an identity swizzle pre-HaswellJason Ekstrand2018-05-091-0/+6
* blorp: Handle the RGB workaround more like other workaroundsJason Ekstrand2018-05-091-30/+30
* i965: silence unused variableLionel Landwerlin2018-05-091-1/+0
* intel: devinfo: silence coverity warningLionel Landwerlin2018-05-091-0/+1
* dri3: Only update number of back buffers in loader_dri3_get_buffersMichel Dänzer2018-05-091-8/+11
* anv: ignore pColorBlendState if all color attachments of the subpass are unusedSamuel Iglesias Gonsálvez2018-05-092-3/+13
* mesa: remove hard-coded OpenGL 3.2 compat limitTimothy Arceri2018-05-091-8/+0
* mesa: add GLSLVersionCompat constantTimothy Arceri2018-05-095-3/+10
* mesa: dont call _mesa_override_glsl_version() in _mesa_init_constants()Timothy Arceri2018-05-091-3/+0
* mesa: dont set GLSLVersion in _mesa_init_constants()Timothy Arceri2018-05-091-1/+0
* pipe-loader: Free driver_name in error pathJan Vesely2018-05-081-0/+1
* glsl: change ast_type_qualifier bitset size to work around GCC 5.4 bugBrian Paul2018-05-081-1/+7
* i965: Dump validation list on INTEL_DEBUG=bat,submit.Kenneth Graunke2018-05-081-1/+3
* i965/miptree: Remove redundant fields from intel_miptree_aux_bufferJason Ekstrand2018-05-082-37/+7
* i965: Simplify brw_emit_depthbuffer and brw_emit_depth_stencil_hizJason Ekstrand2018-05-081-81/+26
* i965: Move brw_emit_depth_stencil_hiz higher up in the fileJason Ekstrand2018-05-081-50/+40
* i965: Use ISL for emitting depth/stencil/hiz state on gen6+Jason Ekstrand2018-05-089-671/+129
* i965: Use the brw_depthbuffer atom on all gensJason Ekstrand2018-05-084-17/+4
* i965: Always set depth/stencil write enables on gen7+Jason Ekstrand2018-05-082-11/+6
* i965: Re-order depth/stencil/hiz/clear packets to match ISLJason Ekstrand2018-05-083-47/+47
* i965: Re-emit depth/stencil/hiz on BRW_NEW_AUX_STATEJason Ekstrand2018-05-081-1/+2
* intel: devinfo: fix assertion on devices with odd number of EUsLionel Landwerlin2018-05-081-5/+1
* vulkan/wsi: Only use LINEAR modifier for prime if supported.Bas Nieuwenhuizen2018-05-083-2/+5
* eg/compute: Drop reference to kernel_param bo in destructorJan Vesely2018-05-081-0/+1
* r600: Cleanup constant buffers on context destructionJan Vesely2018-05-081-1/+5
* mesa/formatquery: remove online compression check on is_resource_supportedAlejandro Piñeiro2018-05-081-2/+1
* intel/genxml: Assert that genxml field start and ends are sane.Kenneth Graunke2018-05-071-0/+7
* intel/genxml: Fix some more fake booleans in genxml.Kenneth Graunke2018-05-075-11/+11
* intel/genxml: Make assert in gen_pack_header print a message.Kenneth Graunke2018-05-071-1/+1
* i965: Don't leak blorp on Gen4-5.Kenneth Graunke2018-05-071-2/+1
* nir: Transform discard_if(true) into discardMatt Turner2018-05-071-1/+16
* eg/compute: Drop reference on code_bo in destructor.Jan Vesely2018-05-071-3/+1
* configure.ac/meson.build: Fix -latomic testNicolas Boichat2018-05-072-4/+8
* anv: remove unused field anv_queue::poolScott D Phillips2018-05-072-3/+0
* i965: Set initial kflags on BO creation.Kenneth Graunke2018-05-071-6/+11
* docs: update calendar, add news and link release notes to 18.0.3Juan A. Suarez Romero2018-05-073-7/+8
* docs: add sha256 checksums for 18.0.3Juan A. Suarez Romero2018-05-071-1/+2
* docs: add sha256 checksums for 18.0.3Juan A. Suarez Romero2018-05-071-0/+106
* intel/genxml: Fix a few invalid field widthsChris Wilson2018-05-076-28/+28
* swr/rast: Fix include for createInstructionCombiningPass with llvm-7.0.Vinson Lee2018-05-051-0/+1
* clover: Add explicit virtual destructor to argument classJan Vesely2018-05-051-0/+1
* anv/device: expose shaderInt16 support in gen8+Iago Toral Quiroga2018-05-051-1/+1
* i965/compiler: handle conversion to smaller type in the lowering pass for thatIago Toral Quiroga2018-05-052-12/+26
* intel/compiler: handle 16-bit to 64-bit conversions in BSW platformsIago Toral Quiroga2018-05-051-4/+4
* intel/genxml: recognize 0x, 0o and 0b when setting default valueCaio Marcelo de Oliveira Filho2018-05-041-1/+2
* r200: Enable NV_fog_distanceIan Romanick2018-05-041-0/+1
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