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* configure.ac: set LLVM_{C, CXX, LD}FLAGS only as neededEmil Velikov2017-02-101-5/+6
| | | | | | | | | | | | | | | | | | | | Earlier refactoring commits started setting the above regardless if LLVM is used or not. Move them to the respective section to restore the original functionality. Since we require the preprocessor flags (includes in particular) for the header version parsing keep those as-is. They are not used outside of configure.ac thus should not cause any side-effects. As-is adding the C/CXXFLAGS can lead to build issues on when cross-compiling. Cc: Ilia Mirkin <[email protected]> Cc: Tomasz Figa <[email protected]> Cc: "17.0" <[email protected]> Reported-by: Ilia Mirkin <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Tobias Droste <[email protected]>
* Revert "configure.ac: Create correct LLVM_VERSION_INT with minor >= 10"Emil Velikov2017-02-101-5/+1
| | | | | | | | | | | As stated in [1] by the LLVM devs, the new versioning scheme will not deploy any minor version (i.e. it will always be zero). As such the patch should not be needed. This reverts commit 0e9a5be7e74fa2a9bd2a634ef60822bd6600ca1d. [1] http://blog.llvm.org/2016/12/llvms-new-versioning-scheme.html Reviewed-by: Tobias Droste <[email protected]>
* configure.ac: don't use == with testEmil Velikov2017-02-101-2/+2
| | | | | | | | | | Although it works, it's not the correct thing to do. v2: Rebase v3: Rebase Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Tobias Droste <[email protected]> (v1)
* configure.ac: remove unused LLVM variablesEmil Velikov2017-02-101-5/+0
| | | | | | | | LLVM_BINDIR is completely unused while others such as LLVM_LIBDIR are used only internally. In the latter case there's no need to AC_SUBST it. Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Tobias Droste <[email protected]>
* configure.ac: Only define HAVE_LLVM if LLVM is usedTobias Droste2017-02-101-8/+11
| | | | | | | | | | | Make sure that HAVE_LLVM compiler define is only set if LLVM is actually used. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99010 Cc: "17.0" <[email protected]> Signed-off-by: Tobias Droste <[email protected]> v2 [Emil] fold within the existing conditional Reviewed-by: Emil Velikov <[email protected]>
* configure.ac: Rework MESA_LLVM and LLVM detectionTobias Droste2017-02-101-12/+15
| | | | | | | | | | | | | | | | | | Set FOUND_LLVM only when LLVM is present (checking for exact version/etc is deferred) and use enable-gallium-llvm to indicate the global LLVM status. Renaming the latter is not appropriate for stable patches, so we'll address it with a later commit. Loosely based on work by Tobias. v2: Check FOUND_LLVM if enable_gallium_llvm is set. Cc: Dave Airlie <[email protected]> Cc: "17.0" <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Tobias Droste <[email protected]>
* configure.ac: move enable-gallium-llvm dependency with-gallium-driversEmil Velikov2017-02-101-4/+1
| | | | | | | | | | | | | | | | | | | ... to where it's applicable. Since we effectively made --enable-gallium-llvm mean --enable-llvm with earlier commits, we need to move the requirement to guard the compnents added for the LLVM draw. Otherwise we'll error (as below) when building RADV w/o gallium drivers. configure: error: --enable-gallium-llvm is required when building radv v2: Don't remove but move the dependency (Tobias). Cc: Dave Airlie <[email protected]> Cc: "17.0" <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Tobias Droste <[email protected]>
* configure.ac: Mandate --enable-gallium-llvm when checking LLVM versionEmil Velikov2017-02-101-6/+6
| | | | | | | | | | | | | | | | | With this change we effectively require --enable-gallium-llvm when building RADV. This should be perfectly safe since the gallium radeonsi driver already explicitly requires it. The "gallium" part in --enable-gallium-llvm is about to be removed soon (not in stable), but until then make sure that things can build. To reflect the requirement (as opposed to check previously) we rename llvm_check_version_for to llvm_require_version Cc: Dave Airlie <[email protected]> Cc: "17.0" <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Tobias Droste <[email protected]>
* configure.ac: Rename the gallium_require_llvm helperEmil Velikov2017-02-101-11/+8
| | | | | | | | | | | | | | Drop the gallium prefix since we're about it use it throughout the configure. Note we do want to check for enable_gallium_llvm check since (as explicitly requested) the toggle should mean --enable-llvm. Latter of which to be resolved with later patches. Cc: Dave Airlie <[email protected]> Cc: "17.0" <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Tobias Droste <[email protected]>
* configure.ac: Don't check LLVM version in require_llvmTobias Droste2017-02-101-3/+1
| | | | | | | | | | | | | | | | | This is actually not needed because the version is checked later. Around line 2380 if test "x$enable_gallium_llvm" == "xyes"; then llvm_check_version_for $LLVM_REQUIRED_GALLIUM "gallium" llvm_add_default_components "gallium" fi Cc: "17.0" <[email protected]> Cc: Tobias Droste <[email protected]> Signed-off-by: Tobias Droste <[email protected]> Reviewed-by: Emil Velikov <[email protected]> (v1) v2: [Emil Velikov: rebase/respin series order] Signed-off-by: Emil Velikov <[email protected]>
* configure.ac: move AC_ARG_ENABLE([gallium-llvm] hunk further upEmil Velikov2017-02-101-18/+18
| | | | | | | | | | | With next commits we'll require --enable-gallium-llvm (en route to a greater good later on) for RADV. The latter is required to ensure that as otherwise we'll fail to build. Cc: Dave Airlie <[email protected]> Cc: "17.0" <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Tobias Droste <[email protected]>
* configure.ac: remove unused AC_SUBST([MESA_LLVM])Emil Velikov2017-02-101-1/+0
| | | | | Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Tobias Droste <[email protected]>
* loader: unconditionally include unistd.h and stdlib.hNicolai Hähnle2017-02-101-2/+2
| | | | | | | | | | | | | | | | | Otherwise we would fail with "implicit declaration of function" geteuid and getenv respectively. To trigger (re)move the libdrm.pc file and use the following: $ ./autogen.sh --disable-egl --disable-gbm --disable-dri \ --with-dri-drivers=swrast --with-gallium-drivers=swrast $ make Cc: Vinson Lee <[email protected]> Fixes: 3f462050c ("loader: Add an environment variable to override driver name choice. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99701 v2: [Emil: handle stdlib.h add commit message] Signed-off-by: Emil Velikov <[email protected]>
* intel/blorp: do not return const data by get_px_size_sa()Emil Velikov2017-02-101-1/+1
| | | | | | | | | | | | | Not much point in the const qualifier since we provide a copy to the user. Resolves the following -Wignored-qualifiers warning. src/intel/blorp/blorp_blit.c:1857:8: warning: 'const' type qualifier on return type has no effect [-Wignored-qualifiers] v2: keep const qualifier of local variable. Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* gallium/radeon: use staging for texture read mappings from GTT WCMarek Olšák2017-02-101-4/+5
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: ignore the level parameter in buffer_transfer_mapMarek Olšák2017-02-101-5/+4
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: fix performance of buffer readbacksMarek Olšák2017-02-101-8/+9
| | | | | | | | | | | | | | | We want cached GTT for all non-persistent read mappings. Set level = 0 on purpose. Use dma_copy, because resource_copy_region causes a failure in the PBO read of piglit/getteximage-luminance. If Rocket League used the READ flag, it should get cached GTT. v2: mask out UNSYNCHRONIZED Cc: 13.0 17.0 <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: align vertex buffer descriptor list size for optimal prefetchMarek Olšák2017-02-104-2/+7
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: align shader binaries to CP DMA alignment for optimal prefetchMarek Olšák2017-02-101-1/+2
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: move CP_DMA_ALIGNMENT definitionMarek Olšák2017-02-102-10/+10
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: remove SI_CONTEXT_FLUSH_AND_INV_FRAMEBUFFERMarek Olšák2017-02-103-6/+6
| | | | | | not necessary Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: remove separate CB/DB_META flush flagsMarek Olšák2017-02-103-17/+8
| | | | | | not used separately Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: reduce the number of FMASK input coordinatesMarek Olšák2017-02-101-7/+3
| | | | | | | | | Before: image_load v3, v[0:3] ... After: image_load v3, v[0:1] ... Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: write shader asm annotated with wave info into GPU hang reportsMarek Olšák2017-02-103-3/+252
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Note that the disassembly is written twice - first the unmodified compiler output and then the wave-annotated output only if there are waves executing the shader. Sample output from a real GPU hang most likely caused by image_sample: The number of active waves = 28 Pixel Shader - annotated disassembly: s_mov_b64 s[6:7], exec ; BE86017E [PC=0x10f3e3800, off=0, size=4] s_wqm_b64 exec, exec ; BEFE077E [PC=0x10f3e3804, off=4, size=4] ... image_sample v[7:9], v[0:1], s[12:19], s[20:23] dmask:0x7 ; F0800700 00A30700 [PC=0x10f3e3a94, off=660, size=8] s_buffer_load_dword s20, s[0:3], 0x50 ; C0220500 00000050 [PC=0x10f3e3a9c, off=668, size=8] s_load_dwordx4 s[24:27], s[4:5], 0x170 ; C00A0602 00000170 [PC=0x10f3e3aa4, off=676, size=8] s_load_dwordx8 s[12:19], s[4:5], 0x140 ; C00E0302 00000140 [PC=0x10f3e3aac, off=684, size=8] s_buffer_load_dword s11, s[0:3], 0x5c ; C02202C0 0000005C [PC=0x10f3e3ab4, off=692, size=8] s_buffer_load_dword s21, s[0:3], 0x54 ; C0220540 00000054 [PC=0x10f3e3abc, off=700, size=8] s_buffer_load_dword s22, s[0:3], 0x58 ; C0220580 00000058 [PC=0x10f3e3ac4, off=708, size=8] s_waitcnt vmcnt(0) ; BF8C0F70 [PC=0x10f3e3acc, off=716, size=4] ^ SE0 SH0 CU1 SIMD1 WAVE0 EXEC=aaaaaaa555aaaaaa INST32=BF8C0F70 ^ SE0 SH0 CU1 SIMD2 WAVE0 EXEC=aaaa85555555552a INST32=BF8C0F70 ^ SE0 SH0 CU1 SIMD3 WAVE0 EXEC=000000000000000a INST32=BF8C0F70 ^ SE0 SH0 CU6 SIMD1 WAVE0 EXEC=25a5a5aa82aaaaaa INST32=BF8C0F70 ^ SE0 SH0 CU6 SIMD3 WAVE0 EXEC=50aaaa8fffa55555 INST32=BF8C0F70 ^ SE0 SH0 CU7 SIMD0 WAVE0 EXEC=5554aaaaaaa1a555 INST32=BF8C0F70 ^ SE0 SH0 CU7 SIMD0 WAVE1 EXEC=aaaa5555ffffffff INST32=BF8C0F70 ^ SE0 SH0 CU7 SIMD1 WAVE0 EXEC=555557aaaaaaaaa5 INST32=BF8C0F70 ^ SE0 SH0 CU7 SIMD3 WAVE0 EXEC=5555aaaaaaaaaa85 INST32=BF8C0F70 ^ SE1 SH0 CU3 SIMD1 WAVE0 EXEC=aaaaaaaaaaaaaaaa INST32=BF8C0F70 ^ SE1 SH0 CU4 SIMD0 WAVE0 EXEC=aaaaaaaa5a5a5a5a INST32=BF8C0F70 ^ SE1 SH0 CU4 SIMD1 WAVE0 EXEC=aaaaaaa5a5a5a4a5 INST32=BF8C0F70 ^ SE1 SH0 CU4 SIMD2 WAVE0 EXEC=5555555000000000 INST32=BF8C0F70 ^ SE1 SH0 CU4 SIMD3 WAVE0 EXEC=aa555554155aaaaa INST32=BF8C0F70 ^ SE1 SH0 CU5 SIMD0 WAVE0 EXEC=55ffff55555555aa INST32=BF8C0F70 ^ SE1 SH0 CU5 SIMD1 WAVE0 EXEC=555555555aaaaaaa INST32=BF8C0F70 ^ SE1 SH0 CU5 SIMD2 WAVE0 EXEC=a0aaaaaaa8555555 INST32=BF8C0F70 ^ SE1 SH0 CU5 SIMD3 WAVE0 EXEC=8aaaaaaaaaaaa555 INST32=BF8C0F70 ^ SE1 SH0 CU6 SIMD0 WAVE0 EXEC=000000002aaaaaaa INST32=BF8C0F70 ^ SE2 SH0 CU1 SIMD0 WAVE0 EXEC=5aaaa5400aaaa15a INST32=BF8C0F70 ^ SE2 SH0 CU1 SIMD1 WAVE0 EXEC=00aaaaaaaa5555aa INST32=BF8C0F70 ^ SE2 SH0 CU1 SIMD2 WAVE0 EXEC=aa00005555554555 INST32=BF8C0F70 ^ SE2 SH0 CU1 SIMD3 WAVE0 EXEC=aaaaaaa000000000 INST32=BF8C0F70 ^ SE3 SH0 CU4 SIMD0 WAVE0 EXEC=5555aaaaaaaaaaaa INST32=BF8C0F70 ^ SE3 SH0 CU4 SIMD2 WAVE0 EXEC=ffaaaaaaaaaa5555 INST32=BF8C0F70 ^ SE3 SH0 CU4 SIMD3 WAVE0 EXEC=aaaa55555555aa00 INST32=BF8C0F70 ^ SE3 SH0 CU5 SIMD0 WAVE0 EXEC=00aaaaaaaaaaaa5a INST32=BF8C0F70 ^ SE3 SH0 CU5 SIMD1 WAVE0 EXEC=5a555555005555ff INST32=BF8C0F70 v_mul_f32_e32 v7, s6, v7 ; 0A0E0E06 [PC=0x10f3e3ad0, off=720, size=4] ... Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: write wave information into GPU hang reportsMarek Olšák2017-02-101-0/+20
| | | | | | | | UMR is our new debugging tool. It must have +s set for Mesa to use it without root privileges: sudo chmod +s .../umr Reviewed-by: Nicolai Hähnle <[email protected]>
* tgsi-dump: dump label if instruction has oneMarc-André Lureau2017-02-101-11/+13
| | | | | | | | | | | | | | The instruction has an associated label when Instruction.Label == 1, as can be seen in ureg_emit_label() or tgsi_build_full_instruction(). This fixes dump generating extra :0 labels on conditionals, and virgl parsing more than the expected tokens and eventually reaching "Illegal command buffer" (when parsing more than a safety margin of 10 we currently have). Signed-off-by: Marc-André Lureau <[email protected]> Cc: "13.0 17.0" <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* tgsi: remove ureg_label_insnMarc-André Lureau2017-02-102-38/+0
| | | | | | | Unused since commit 2897cb3dba9287011f9c43cd2f214100952370c0. Signed-off-by: Marc-André Lureau <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: handle queue submission with no cs but semaphoresDave Airlie2017-02-091-2/+20
| | | | | | | | | It's legal to submit just semaphores with no command streams, this patch fixes this case by emitting the empty cs, it also handles the fence emission for this case better. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* util/disk_cache: error check asprintf()Timothy Arceri2017-02-101-5/+7
| | | | | | | Fixes: f3d911463e8 "util/disk_cache: stop using ralloc_asprintf() unnecessarily" Reviewed-by: Emil Velikov <[email protected]> Reviewed-by: Eric Engestrom <[email protected]>
* docs: add shader cache environment variablesTimothy Arceri2017-02-101-0/+11
| | | | | Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* nvc0/ir: fix ubo max clamp, reset file indexIlia Mirkin2017-02-091-1/+3
| | | | | | | | | | | We just increased the max UBO, so we should also increase the clamp that we do for robustness. Similarly, as we're including the fileIndex in the new indirect value, we should reset fileIndex to 0 so that it is not added in a second time. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> Cc: [email protected]
* nv50/ir: always return 0 when trying to read thread id along unit dimIlia Mirkin2017-02-094-5/+17
| | | | | | | | | | | | | Many many many compute shaders only define a 1- or 2-dimensional block, but then continue to use system values that take the full 3d into account (like gl_LocalInvocationIndex, etc). So for the special case that a dimension is exactly 1, we know that the thread id along that axis will always be 0, so return it as such and allow constant folding to fix things up. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Pierre Moreau <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* nvc0/ir: fix robustness guarantees for constbuf loads on kepler+ computeIlia Mirkin2017-02-091-25/+22
| | | | | | | | | | | | | Kepler and up unfortunately only support up to 8 constbufs. We work around this by loading from constbufs as if they were storage buffers. However we were not consistently applying limits to loads from these buffers. Make sure to do the same thing we do for storage buffers. Fixes GL45-CTS.robust_buffer_access_behavior.uniform_buffer Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> Cc: [email protected]
* nvc0: increase number of ubo binding pointsIlia Mirkin2017-02-091-3/+2
| | | | | | | | | | | | | Apparently GL 4.5 requires 14 of these (there's a "*" in the spec, but it's unclear what it refers to). We need to expose an extra binding point for the "program parameters", which means this must be 15. Remove the last vestige of the "use c14 for immediates" idea. Fixes GL45-CTS.shading_language_420pack.binding_uniform_block_array Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> Cc: [email protected]
* configure: add blurb about what the LIBDRM_*_REQUIRED stuff meansIlia Mirkin2017-02-091-1/+8
| | | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* nvc0: expose int64Ilia Mirkin2017-02-093-3/+3
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0/ir: make it possible to have the flags def in def0Ilia Mirkin2017-02-095-12/+15
| | | | | | | There's all kinds of logic that doesn't like there being holes in defs or srcs lists. Avoid them. This also fixes the sched logic for maxwell. Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0/ir: add support for 64-bit shift lowering on SM20/SM30Ilia Mirkin2017-02-091-6/+62
| | | | | | | Unfortunately there is no SHF.L/SHF.R instruction pre-SM35. So we have to do a bit more work to get the job done. Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0/ir: add support for all the new int64 tgsi opcodesIlia Mirkin2017-02-096-5/+302
| | | | | | | | | | | | A few thoughts: - Some of that LegalizeSSA logic should really live much earlier and be subject to the likes of DCE and other useful passes - Some of the "lowering" done in from_tgsi should be done later so that proper optimization might be done. However this all works and the above can be improved upon later. Signed-off-by: Ilia Mirkin <[email protected]>
* nv50/ir: Split 64-bit integer MAD/MUL operationsPierre Moreau2017-02-091-0/+116
| | | | | | | Hardware does not support 64-bit integers MAD and MUL operations, so we need to transform them in 32-bit operations. Signed-off-by: Pierre Moreau <[email protected]>
* nvc0/ir: add a "high" subop for shifts, emit shf.l/shf.r for 64-bitIlia Mirkin2017-02-093-3/+74
| | | | | | Note that this is not available for SM20/SM30. Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0/ir: fix SET and SLCT emissionIlia Mirkin2017-02-092-0/+6
| | | | | | | | We were never emitting a .X flag for consuming condition code on SET, and weren't emitting a signed type for SLCT comparison. Discovered while working on int64 logic. Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0/ir: add support for emitting partial min/max ops for int64Ilia Mirkin2017-02-094-1/+14
| | | | | | | | | | These operations allow you to compute min/max on arbitrary-width integers, 32 bits at a time. Note that the low/med ops implicitly set the condition code, and the med/high ops implicitly consume it. Signed-off-by: Ilia Mirkin <[email protected]>
* gallium: add separate PIPE_CAP_INT64_DIVMODIlia Mirkin2017-02-0918-0/+21
| | | | | | | | | | | Nouveau does not currently have logic to implement this as a library function. Even though such a library could be written, there's no big advantage to do it that way for now given that int64 is a very uncommon use-case. Allow a driver to expose INT64 without supporting division and modulo operations. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* docs: improve the list of gl implementationsEric Engestrom2017-02-091-2/+3
| | | | | Suggested-by: Emil Velikov <[email protected]> Signed-off-by: Eric Engestrom <[email protected]>
* docs: improve the list of implemented APIsEric Engestrom2017-02-091-1/+4
| | | | | Suggested-by: Emil Velikov <[email protected]> Signed-off-by: Eric Engestrom <[email protected]>
* glsl: Allow compatibility shaders with MESA_GL_VERSION_OVERRIDE=...Matt Turner2017-02-094-4/+14
| | | | | | | | | | | | | | | | | | Previously if you used MESA_GL_VERSION_OVERRIDE=3.3COMPAT, Mesa exposed an OpenGL 3.3 compatibility profile context (with various unimplemented features and bugs), but still refused to compile shaders with #version 330 compatibility This patch simply adds a small bit of plumbing to let that through. Of course the same caveats apply: compatibility profile is still not supported (and will not be supported), so there are no guarantees that anything will work. Tested-by: Dylan Baker <[email protected]> Reviewed-by: Anuj Phogat <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* docs: reword sentence that my brain can't parseEric Engestrom2017-02-091-2/+2
| | | | | Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Elie Tournier <[email protected]>
* docs: https all the links \o/Eric Engestrom2017-02-0934-128/+128
| | | | | | | | | Most of them already redirected to https anyway, so we might as well avoid the redirection and the security implications by linking directly to the right protocol. Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* docs: fix gallium wiki link in relnotesEric Engestrom2017-02-093-3/+3
| | | | | Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Brian Paul <[email protected]>
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