| Commit message (Collapse) | Author | Age | Files | Lines |
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Reviewed-by: Jakob Bornecrantz <[email protected]>
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Just to keep drivers working.
Reviewed-by: Jakob Bornecrantz <[email protected]>
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Reviewed-by: Jakob Bornecrantz <[email protected]>
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Lots of code (deleted by this patch) tried to make type == result->type,
but not all cases did. Don't pretend; just use result->type.
Signed-off-by: Kenneth Graunke <[email protected]>
Reviewed-by: Eric Anholt <[email protected]>
Reviewed-by: Ian Romanick <[email protected]>
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We do this OUT_BATCH-style in brw_draw_upload.c.
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Things definitely remaining todo: switch statements, clip distances.
On 965, we also need real integers in the VS, and implementations of
some things like isinf/isnan.
Reviewed-by: Brian Paul <[email protected]>
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Reviewed-by: Brian Paul <[email protected]>
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Reviewed-by: Brian Paul <[email protected]>
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Tested with piglit arb_color_buffer_float-clear.
Reviewed-by: Brian Paul <[email protected]>
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Tested with piglit arb_color_buffer_float-drawpixels.
Reviewed-by: Brian Paul <[email protected]>
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For 1 and 2-channel formats the hardware only supports rendering to R
and RG. To do I and L render targets we just call them R and
everything works out. For A, we would need to rewrite the CC to do
the alpha channel's blending on color instead, and send the fragment
alpha down the red channel. For LA, there doesn't seem to be any
hope, because we can't do independent color/alpha blending while
treating the LA surface as RG.
Reviewed-by: Brian Paul <[email protected]>
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The blitter only does up 32bpp at a time, so we handle it by mangling
coordinates and calling the surface 32bpp.
Fixes ARB_texture_rg/fbo-generatemipmap-formats-float with ARB_texture_float.
Reviewed-by: Brian Paul <[email protected]>
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Of these, intel will be using I and L initially, and A once we rewrite
fragment shaders and the CC for rendering to it as R.
Reviewed-by: Brian Paul <[email protected]>
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Reviewed-by: Brian Paul <[email protected]>
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This covers X_FLOAT16 -> X_FLOAT32, and X -> RGBA_FLOAT32.
Reviewed-by: Brian Paul <[email protected]>
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Reviewed-by: Brian Paul <[email protected]>
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Fixes ARB_texture_float/fbo-alphatest-formats.
Reviewed-by: Brian Paul <[email protected]>
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reinstate b7617346dcff50a66a10c61b95c33682cf629c9e after the
rework in 6067a2a67f9a7aab2aee051469bea8af03747a95.
Signed-off-by: Alex Deucher <[email protected]>
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Keep track of when the caches are dirty, and only flush them when
the framebuffer state is set and when the context is flushed.
Signed-off-by: Dave Airlie <[email protected]>
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This fixes piglit's draw-instanced-divisor test for softpipe on both
the generic and SSE paths. This is temporary until we have the
correct per-array max_index information.
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Based on Cédric's r6xx/r7xx patch.
Signed-off-by: Alex Deucher <[email protected]>
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Signed-off-by: Cedric Cano <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Based on Cedric's r6xx/r7xx patch.
Signed-off-by: Alex Deucher <[email protected]>
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Signed-off-by: Cedric Cano <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Signed-off-by: Brian Paul <[email protected]>
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Check for signed type and enable SNORM.
Signed-off-by: Dave Airlie <[email protected]>
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Also fix up the help string for both r300 and r600.
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Such as:
- GL_ARB_half_float_pixel
- GL_ARB_vertex_array_object
- GL_APPLE_vertex_array_object
- GL_EXT_gpu_program_parameters
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Fill in the swaps for the formats to fix warnings.
Signed-off-by: Dave Airlie <[email protected]>
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this needs revisiting, we really don't want to be flushing all 32 of these,
but currently we don't flush any of them, and it seems to have caused a regression
as reported on irc with doom3 on evergreen.
Signed-off-by: Dave Airlie <[email protected]>
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Writes within ELSE blocks were being ignored which prevented us from
discovering all possible writers for some register values.
Fixes piglit glsl-fs-raytrace-bug27060
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Reviewed-by: Kenneth Graunke <[email protected]>
Signed-off-by: Ian Romanick <[email protected]>
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just makes the code more consistent.
Signed-off-by: Dave Airlie <[email protected]>
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really at these sort of sizes these are pointless inlines.
Signed-off-by: Dave Airlie <[email protected]>
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These really didn't have much difference, and totally not inline material.
Signed-off-by: Dave Airlie <[email protected]>
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Merging the flushes that are left doesn't seem to give a significant
performance improvement
Signed-off-by: Dave Airlie <[email protected]>
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This just avoids reemitting resources that haven't changed.
Signed-off-by: Dave Airlie <[email protected]>
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This gets me from 2200 to 1978 dwords for a gears frame.
This is due to us having some 32-dwords blocks in the SPI, that we only
modify the first dwords off.
v2: fix dirty reg count from Bas Nieuwenhuizen
Signed-off-by: Dave Airlie <[email protected]>
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This is a first step to decreasing the CPU usage, by decreasing how much
stuff we pass to the GPU and hence to the kernel CS checker.
This adds a check to see if the values we need to write are actually dirty,
and avoids writing if they are. However certain register need to always
be written so we add a new flag to say which ones should be always written
if used. (Note this could probably be done cleaner with a larger refactoring,
since I think the CONST_BUFFER_SIZE_PS/VS and CONST_CACHE_PS/VS might
be better off as a special state).
It also moves the need_bo to be a flags on the register now.
With this, a frame of gears goes from emitting 3k dwords to emitting 2k dwords,
and I'm sure it could get a lot smaller.
v2: fix some evergreen dirty bits.
Original patch from: Bas Nieuwenhuizen, I NIHed nearly the same thing
before seeing his patch on the list, oops.
Reviewed-by: Bas Nieuwenhuizen
Signed-off-by: Dave Airlie <[email protected]>
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Most of the newer portions of the code use OUT_BATCH style. I prefer
this style because it offers a clear distinction between a) hardware
messages/structures with a mandatory format, and b) data structures for
our own internal use that we can format however we want.
Signed-off-by: Kenneth Graunke <[email protected]>
Reviewed-by: Eric Anholt <[email protected]>
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Since we never enable the GS on Sandybridge, there's no need to allocate
it any URB space.
Furthermore, the previous calculation was incorrect: it neglected to
multiply by nr_vs_entries, instead comparing whether twice the size of
a single VS URB entry was bigger than the entire URB space. It also
neglected to take into account that vs_size is in units of 128 byte
blocks, while urb_size is in bytes.
Despite the above problems, the calculations resulted in an acceptable
programming of the URB in most cases, at least on GT2.
Signed-off-by: Kenneth Graunke <[email protected]>
Reviewed-by: Eric Anholt <[email protected]>
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The expression
x = y, 5, 3;
will generate
0:7(9): warning: left-hand operand of comma expression has no effect
The warning is only emitted for the left-hand operands, becuase the
right-most operand is the result of the expression. This could be
used in an assignment, etc.
Reviewed-by: Eric Anholt <[email protected]>
Reviewed-by: Kenneth Graunke <[email protected]>
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And fix a couple logic errors in the put_*_generic() functions.
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Fixes warnings in fbo-storage-formats.
Reviewed-by: Brian Paul <[email protected]>
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