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* dri/common: use sysconfdir when looking for drircMarcin Ślusarz2015-09-193-2/+14
| | | | | | | | Useful when locally installed mesa has more quirks than the system one. Signed-off-by: Marcin Ślusarz <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* freedreno/ir3: use nir two-sided-color loweringRob Clark2015-09-181-21/+3
| | | | | | | | With this, we completely switch over to nir lowering passes instead of tgsi_lowering. So one step closer to supporting direct glsl or spirv to nir support for freedreno a3xx/a4xx. Signed-off-by: Rob Clark <[email protected]>
* nir: add two-sided-color lowering passRob Clark2015-09-183-0/+211
| | | | | Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* nir/build: add nir_vec() helperRob Clark2015-09-183-31/+20
| | | | | Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Connor Abbott <[email protected]>
* freedreno/ir3: lower txp/clamp in NIRRob Clark2015-09-181-26/+30
| | | | Signed-off-by: Rob Clark <[email protected]>
* nir/lower_tex: add support to clamp texture coordsRob Clark2015-09-182-1/+103
| | | | | | | | | | | | | | Some hardware needs to clamp texture coordinates to [0.0, 1.0] in the shader to emulate GL_CLAMP. This is added to lower_tex_proj since, in the case of projected coords, the clamping needs to happen *after* projection. v2: comments/suggestions from Ilia and Eric, use txs to get texture size and clamp RECT textures to their dimensions rather than [0.0, 1.0] to avoid having to lower RECT textures to 2D. Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* nir/lower_tex: support for lowering RECT texturesRob Clark2015-09-182-3/+63
| | | | | | | | v2: comments/suggestions from Ilia and Eric, split out get_texture_size() helper so we can use it in the next commit for clamping RECT textures. Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* nir/lower_tex: support projector lowering per sampler typeRob Clark2015-09-183-10/+34
| | | | | | | | | | | | Some hardware, such as adreno a3xx, supports txp on some but not all sampler types. In this case we want more fine grained control over which texture projectors get lowered. v2: split out nir_lower_tex_options struct to make it easier to add the additional parameters coming in the following patches Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* nir/lower_tex: split out project_src() helperRob Clark2015-09-181-69/+77
| | | | | | | Split this out to reduce noise in later patches. Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* nir: rename nir_lower_tex_projectorRob Clark2015-09-184-8/+8
| | | | | | | | | | Since the following patches will add additional tex-lowering related functionality, which doesn't make sense to split out into a separate pass (as they would require duplication of the projector lowering logic), let's give this pass a more generic name. Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/vec4: Change types as needed to propagate source modifiers using ↵Alejandro Piñeiro2015-09-191-2/+28
| | | | | | | | | | | | | | | | | | | | | | current instruction SEL and MOV instructions, as long as they don't have source modifiers, are just copying bits around. So those kind of instruction could be propagated even if there are type mismatches. This is needed because NIR generates integer SEL and MOV instructions whenever it doesn't know what else to generate. This commit adds support for copy propagation using current instruction as reference. Equivalent to commit 472ef9 but for vec4. v2: include check for saturate, as Jason Ekstrand suggested v3: check that the dst.type and the src type are the same, in order to solve (among others) the following deqp regression with v2: dEQP-GLES3.functional.shaders.operator.unary_operator.minus.lowp_uint_vertex Reviewed-by: Jason Ekstrand <[email protected]>
* i965/fs: Fix comparison between signed and unsigned integer expressionsIago Toral Quiroga2015-09-181-2/+2
| | | | | | | brw_fs_visitor.cpp: In member function 'void fs_visitor::emit_urb_writes()': brw_fs_visitor.cpp:977:58: warning: comparison between signed and unsigned integer expressions [-Wsign-compare] Reviewed-by: Tapani Pälli <[email protected]>
* mesa: fix errors when reading depth with glReadPixelsTapani Pälli2015-09-182-1/+7
| | | | | | | | | | | | | | | | | | | | | | | OpenGL ES 3.0 spec 3.7.2 "Transfer of Pixel Rectangles" specifies DEPTH_COMPONENT, UNSIGNED_INT as a valid couple, validation for internal format is checked by is_float_depth(). Fix regression caused by 81d2fd91a90e5b2fd9fd74792a7a7c329f0e4d29 in: ES3-CTS.gtf.GL3Tests.packed_pixels.packed_pixels Test uses GL_DEPTH_COMPONENT, UNSIGNED_INT only when GL_NV_read_depth extension is present. v2: change check in _mesa_error_check_format_and_type to be explicit for ES 2.0+, desktop OpenGL does not allow this behaviour + uses this function for both glReadPixels and glDrawPixels validation. (No Piglit regressions seen with v2.) Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Anuj Phogat <[email protected]> Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]> [v1] Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92009 Cc: "10.6 11.0" <[email protected]>
* nir/builder: fix c++11 compiler warningRob Clark2015-09-171-1/+1
| | | | | | | | | | | Fixes: In file included from nir/nir_lower_samplers.cpp:27:0: nir/nir_builder.h: In function 'nir_ssa_def* nir_channel(nir_builder*, nir_ssa_def*, int)': nir/nir_builder.h:222:37: warning: narrowing conversion of 'c' from 'int' to 'unsigned int' inside { } is ill-formed in C++11 [-Wnarrowing] unsigned swizzle[4] = {c, c, c, c}; Signed-off-by: Rob Clark <[email protected]>
* nir: really actually fix comment this timeRob Clark2015-09-171-1/+1
| | | | Signed-off-by: Rob Clark <[email protected]>
* nir/print: print variable namesRob Clark2015-09-171-0/+30
| | | | | Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* nir: some comment fixupsRob Clark2015-09-171-5/+5
| | | | | Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* freedreno/ir3: add --gpu arg to cmdline compilerRob Clark2015-09-171-1/+10
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a4xx: wire up ucp supportRob Clark2015-09-171-0/+1
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: add support for ucpRob Clark2015-09-174-13/+80
| | | | | | | | | Use nir_lower_clip pass for adding the VS/FS instructions to handle user-clip-planes and CLIPDIST. Wire up support for load_user_clip_plane intrinsic to fetch ucp[plane] values as driver-params (passed as const's to the shader). Signed-off-by: Rob Clark <[email protected]>
* nir: add lowering stage for user-clip-planes / clipdistRob Clark2015-09-173-0/+344
| | | | | | | | | | | | | | | The vertex shader lowering adds calculation for CLIPDIST, if needed (ie. user-clip-planes), and the frag shader lowering adds conditional kills based on CLIPDIST value (which should be treated as a normal interpolated varying by the driver). Note that this won't quite do the right thing in the face of MSAA plus user-clip-planes, since all the samples would be killed or not (rather than potentially only a portion of them). But it's better than no UCP support at all for drivers that don't have this in hw. Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* nir: add sysval for user-clip-planesRob Clark2015-09-171-13/+14
| | | | | | | | For lowering user-clip-planes, we need a way to pass the enabled/used user-clip-planes in to shader. Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* freedreno/ir3: convert from tgsi semantic/index to varying-slotRob Clark2015-09-177-193/+234
| | | | Signed-off-by: Rob Clark <[email protected]>
* glsl: add SYSTEM_VALUE_VERTEX_CNTRob Clark2015-09-172-0/+7
| | | | | | | | | Used internally in freedreno/ir3 to calc stream-out position. Seems like a generic enough way to implement stream-out (using str instrs), plus it avoids compiler warnings by sneaking in a non-enum value in switch statements. Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: switch to shader_enums.h interp constantsRob Clark2015-09-174-41/+20
| | | | | | A small step towards un-TGSI'ifying ir3. Signed-off-by: Rob Clark <[email protected]>
* nv50,nvc0: flush texture cache in presence of coherent bufsIlia Mirkin2015-09-172-0/+39
| | | | | | | | This fixes the newly-added arb_texture_buffer_object-bufferstorage piglit test. Signed-off-by: Ilia Mirkin <[email protected]> Cc: "11.0" <[email protected]>
* nv50,nvc0: detect underlying resource changes and update ticIlia Mirkin2015-09-172-0/+43
| | | | | | | | | | | | | When updating texture buffers, we might end up replacing the whole buffer. Check that the tic address matches the resource address, and if not, update the tic and reupload it. This fixes: arb_direct_state_access-texture-buffer arb_texture_buffer_object-data-sync Signed-off-by: Ilia Mirkin <[email protected]> Cc: "11.0" <[email protected]>
* vc4: Try to pair up instructions when only one of them has PM bitBoyan Ding2015-09-171-47/+76
| | | | | | | | | | | | | Instructions with difference in PM field can actually be paired up if the one without PM doesn't do packing/unpacking and non-NOP packing/unpacking operations from PM instruction aren't added to the other without PM. total instructions in shared programs: 48209 -> 47460 (-1.55%) instructions in affected programs: 11688 -> 10939 (-6.41%) Signed-off-by: Boyan Ding <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965/vec4: Use nir_move_vec_src_uses_to_destJason Ekstrand2015-09-171-0/+3
| | | | | | | | | | | | | | | | | | | The idea here is not that it gives register coalescing a little bit of a helping hand. It doesn't actually fix the coalescing problems, but it seems to help a good bit. Shader-db results for vec4 programs on Haswell: total instructions in shared programs: 1746280 -> 1683959 (-3.57%) instructions in affected programs: 1259166 -> 1196845 (-4.95%) helped: 11363 HURT: 148 v2 (Jason Ekstrand): - Run nir_move_vec_src_uses_to_dest after going out of SSA - New shader-db numbers Reviewed-by: Eduardo Lima Mitev <[email protected]>
* nir: Add a pass to rewrite uses of vecN sources to the vecN destinationJason Ekstrand2015-09-173-0/+199
| | | | | | | v2 (Jason Ekstrand): - Handle non-SSA sources and destinations Reviewed-by: Eduardo Lima Mitev <[email protected]>
* nir: Add comments to nir_index_instrs and nir_index_ssa_defsJason Ekstrand2015-09-171-0/+8
| | | | | | | The provided indices have the very nice property that if A dominates B then A->index <= B->index. We should document that somewhere. Reviewed-by: Kenneth Graunke <[email protected]>
* nir: Add a generic instruction indexJason Ekstrand2015-09-172-0/+22
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* mesa: Fix texture compression on big-endian systemsUlrich Weigand2015-09-174-7/+14
| | | | | | | | | | | | | | | | | | | | | | | Various pieces of code to create compressed textures will first generate an uncompressed RGBA texture into a temporary buffer, and then read from that buffer while creating the final compressed texture in the requested format. The code reading from the temporary buffer assumes the buffer is formatted as an array of bytes in RGBA order. However, the buffer is filled using a _mesa_texstore call with MESA_FORMAT_R8G8B8A8_UNORM format -- this is defined as an array of *integers* holding the RGBA values in packed format (least-significant to most-significant). This means incorrect bytes are accessed on big-endian systems. This patch fixes this by using the MESA_FORMAT_A8B8G8R8_UNORM format instead on big-endian systems when filling the buffer. This fixes about 100 piglit test case failures on s390x for me. Signed-off-by: Ulrich Weigand <[email protected]> Tested-by: Oded Gabbay <[email protected]> Cc: "10.6" "11.0" <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* st/xa: Use PIPE_FORMAT_R8_UNORM when availableThomas Hellstrom2015-09-172-34/+34
| | | | | | | | | | | | XA has been using L8_UNORM for a8 and yuv component surfaces. This commit instead makes XA prefer R8_UNORM since it's assumed to have a higher availability. Also neither of these formats are suitable as destination formats using destination alpha blending, so reject those operations. Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* mesa: return initial value for VALIDATE_STATUS if pipe not boundTapani Pälli2015-09-171-1/+2
| | | | | | | | | | | | | | | | | | From OpenGL 4.5 Core spec (7.13): "If pipeline is a name that has been generated (without subsequent deletion) by GenProgramPipelines, but refers to a program pipeline object that has not been previously bound, the GL first creates a new state vector in the same manner as when BindProgramPipeline creates a new program pipeline object." I interpret this as "If GetProgramPipelineiv gets called without a bound (but valid) pipeline object, the state should reflect initial state of a new pipeline object." This is also expected behaviour by ES31-CTS.sepshaderobjs.PipelineApi conformance test. Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Marta Lofstedt <[email protected]>
* mesa: return initial value for PROGRAM_SEPARABLE when not linkedTapani Pälli2015-09-171-1/+2
| | | | | | | | | | | | | | | | | From OpenGL ES 3.1 spec (7.12): "Most properties set within program objects are specified not to take effect until the next call to LinkProgram or ProgramBinary. Some properties further require a successful call to either of these commands before taking effect. GetProgramiv returns the properties currently in effect for program, which may differ from the properties set within program since the most recent call to LinkProgram or ProgramBinary, which have not yet taken effect. If there has been no such call putting changes to pname into effect, initial values are returned." Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Marta Lofstedt <[email protected]>
* mesa: enable query of PROGRAM_PIPELINE_BINDING for ES 3.1Tapani Pälli2015-09-171-3/+3
| | | | | | | Specified in OpenGL ES 3.1 spec, Table 23.32: Program Object State. Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Marta Lofstedt <[email protected]>
* nir: support indirect indexing samplers in struct arraysTimothy Arceri2015-09-171-76/+88
| | | | | | | | | | | | | | | | As a bonus we get indirect support for arrays of arrays for free. V5: couple of small clean-ups suggested by Jason. V4: fix struct member location caclulation, use nir_ssa_def rather than nir_src for the indirect as suggested by Jason V3: Use nir_instr_rewrite_src() with empty src rather then clearing the use_link list directly for the old indirects as suggested by Jason V2: Fixed validation error in debug build Reviewed-by: Jason Ekstrand <[email protected]>
* glsl: add helper for calculating offsets for struct membersTimothy2015-09-172-0/+34
| | | | | | V2: update comments Reviewed-by: Jason Ekstrand <[email protected]>
* glsl: make variables privateTimothy Arceri2015-09-171-11/+11
| | | | Reviewed-by: Jason Ekstrand <[email protected]>
* glsl: store uniform slot id in var location fieldTimothy Arceri2015-09-173-3/+24
| | | | | | | | | | | | | | This will allow us to access the uniform later on without resorting to building a name string and looking it up in UniformHash. V3: remove line wrap change from this patch V2: store slot number for all non-UBO uniforms to make code more consitent, renamed explicit_binding to explicit_location and added comment about what it does. Store the location at every shader stage. Updated data.location comments in ir/nir.h. Reviewed-by: Jason Ekstrand <[email protected]>
* glsl: assign hidden uniforms their slot id earlierTimothy Arceri2015-09-171-49/+41
| | | | | | | | | | | | This is required so that the next patch can safely assign the slot id to the var. The ids are now assigned in the order we want before allocating storage so there is no need to sort the storage array and move things around. V2: rename variable to make code easier to follow as suggested by Jason Reviewed-by: Jason Ekstrand <[email protected]>
* glsl: order indices for samplers inside a struct arrayTimothy Arceri2015-09-172-18/+103
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This allows the correct offset to be easily calculated for indirect indexing when a struct array contains multiple samplers, or any crazy nesting. The indices for the folling struct will now look like this: Sampler index: 0 Name: s[0].tex Sampler index: 1 Name: s[1].tex Sampler index: 2 Name: s[0].si.tex Sampler index: 3 Name: s[1].si.tex Sampler index: 4 Name: s[0].si.tex2 Sampler index: 5 Name: s[1].si.tex2 Before this change it looked like this: Sampler index: 0 Name: s[0].tex Sampler index: 3 Name: s[1].tex Sampler index: 1 Name: s[0].si.tex Sampler index: 4 Name: s[1].si.tex Sampler index: 2 Name: s[0].si.tex2 Sampler index: 5 Name: s[1].si.tex2 struct S_inner { sampler2D tex; sampler2D tex2; }; struct S { sampler2D tex; S_inner si; }; uniform S s[2]; V3: Update comments with suggestions from Jason V2: rename struct array counter to have better name Reviewed-by: Jason Ekstrand <[email protected]>
* Revert "mesa/extensions: restrict GL_OES_EGL_image to GLES"Dave Airlie2015-09-171-1/+2
| | | | | | | | | | | | | This reverts commit 48961fa3ba37999a6f8fd812458b735e39604a95. glamor/Xwayland use this, the spec saying something when it was written, and the fact that the comment says Mesa relies on it hasn't changed. I also don't have a copy of this patch in my mail archive, which seems wierd, did it get posted to mesa-dev? Signed-off-by: Dave Airlie <[email protected]>
* vc4: Only build in simulator mode if we find pkg-config for it.Eric Anholt2015-09-161-5/+2
| | | | This will let other developers build it x86 for build-testing purposes.
* freedreno/a3xx: use NUM_USER_CLIP_PLANES helper instead of magic numberIlia Mirkin2015-09-161-1/+2
| | | | | | Use the helper from the newly-updated generated header file. Signed-off-by: Ilia Mirkin <[email protected]>
* freedreno/a3xx: fix blending of L8 formatIlia Mirkin2015-09-161-0/+2
| | | | | | | | Even though luminance formats don't have alpha, we still want the alpha output to go to the blender. This fixes the luminance blending tests. Signed-off-by: Ilia Mirkin <[email protected]> Cc: "11.0" <[email protected]>
* freedreno/a3xx: add support for dual-source blendingIlia Mirkin2015-09-168-6/+33
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* vc4: convert from tgsi semantic/index to varying-slotEric Anholt2015-09-167-147/+106
| | | | | | | | | (originally part of previous patch, split out to separate patch by Rob) v2: squash in some fixes from Eric v3: Another fix from Eric for point coords. Signed-off-by: Rob Clark <[email protected]>
* gallium/ttn: Convert to using VARYING_SLOT_* / FRAG_RESULT_*.Eric Anholt2015-09-166-47/+239
| | | | | | | | | | | | | | | This avoids exceeding the size of the .index bitfield since it got truncated, and should make our NIR look more like the NIR that the rest of the NIR developers are working on. v2: split out vc4 updates, first patch uses varying_slot_to_tgsi_semantic() helper, and second patch does the actual conversion. v3: add frag_result_to_tgsi_semantic() helper and don't try to map frag_results to semantic name/index as if they were varying_slot's v4: use VERT_ATTRIB_ for VS inputs v5: Fix vc4 build. Signed-off-by: Rob Clark <[email protected]>
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