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gallium_va_encpackedheader01
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Files
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*
ilo: add ilo_state_ps to ilo_shader_cso
Chia-I Wu
2015-06-15
13
-481
/
+160
*
ilo: add ilo_state_{vs,hs,ds,gs} to ilo_shader_cso
Chia-I Wu
2015-06-15
15
-499
/
+363
*
ilo: embed ilo_state_sbe in ilo_shader
Chia-I Wu
2015-06-15
11
-254
/
+169
*
ilo: embed ilo_state_vf in ilo_ve_state
Chia-I Wu
2015-06-15
12
-330
/
+146
*
ilo: embed ilo_state_urb in ilo_state_vector
Chia-I Wu
2015-06-15
9
-350
/
+185
*
ilo: embed ilo_state_sol in ilo_shader
Chia-I Wu
2015-06-15
8
-151
/
+154
*
ilo: embed ilo_state_cc in ilo_blend_state
Chia-I Wu
2015-06-15
13
-979
/
+462
*
ilo: embed ilo_state_raster in ilo_rasterizer_state
Chia-I Wu
2015-06-15
12
-1186
/
+457
*
ilo: embed ilo_state_viewport in ilo_viewport_state
Chia-I Wu
2015-06-15
12
-369
/
+142
*
ilo: replace ilo_sampler_cso with ilo_state_sampler
Chia-I Wu
2015-06-15
6
-590
/
+258
*
ilo: replace ilo_view_surface with ilo_state_surface
Chia-I Wu
2015-06-15
9
-1035
/
+205
*
ilo: replace ilo_zs_surface with ilo_state_zs
Chia-I Wu
2015-06-15
8
-479
/
+105
*
ilo: add ilo_state_ps
Chia-I Wu
2015-06-15
3
-0
/
+848
*
ilo: add ilo_state_{vs,hs,ds,gs}
Chia-I Wu
2015-06-15
3
-0
/
+919
*
ilo: add ilo_state_sbe
Chia-I Wu
2015-06-15
3
-0
/
+455
*
ilo: add ilo_state_vf
Chia-I Wu
2015-06-15
3
-0
/
+637
*
ilo: add ilo_state_urb
Chia-I Wu
2015-06-15
3
-0
/
+874
*
ilo: add ilo_state_sol
Chia-I Wu
2015-06-15
3
-0
/
+448
*
ilo: add ilo_state_cc
Chia-I Wu
2015-06-15
3
-0
/
+1091
*
ilo: add ilo_state_raster
Chia-I Wu
2015-06-15
3
-0
/
+1262
*
ilo: add ilo_state_viewport
Chia-I Wu
2015-06-14
3
-0
/
+512
*
ilo: add ilo_state_sampler
Chia-I Wu
2015-06-14
3
-0
/
+847
*
ilo: add ilo_state_surface
Chia-I Wu
2015-06-14
3
-0
/
+1297
*
ilo: add ilo_state_zs
Chia-I Wu
2015-06-14
3
-0
/
+822
*
ilo: update genhw headers
Chia-I Wu
2015-06-14
11
-282
/
+298
*
ilo: add ilo_image_disable_aux()
Chia-I Wu
2015-06-14
3
-8
/
+28
*
ilo: add array_size and level_count to ilo_image
Chia-I Wu
2015-06-14
2
-0
/
+6
*
ilo: add pipe_texture_target to ilo_image
Chia-I Wu
2015-06-14
6
-23
/
+18
*
ilo: fix "Render Cache Read Write Mode"
Chia-I Wu
2015-06-14
5
-28
/
+12
*
ilo: avoid resource owning in core
Chia-I Wu
2015-06-14
7
-142
/
+27
*
ilo: assert core objects are zero-initialized
Chia-I Wu
2015-06-14
6
-2
/
+29
*
radeon/llvm: Handle LLVM backend rename from R600 to AMDGPU
Tom Stellard
2015-06-12
2
-5
/
+16
*
gallivm: Only build lp_profile() body when PROFILE is defined
Tom Stellard
2015-06-12
1
-1
/
+1
*
glsl: fix compile error message
Timothy Arceri
2015-06-13
1
-1
/
+1
*
i965/gen8+: Add aux buffer alignment assertions
Ben Widawsky
2015-06-12
1
-0
/
+22
*
i965/gen9: Set HALIGN_16 for all aux buffers
Ben Widawsky
2015-06-12
1
-3
/
+19
*
i965/gen8: Correct HALIGN for AUX surfaces
Ben Widawsky
2015-06-12
3
-7
/
+22
*
i965: Extract tiling from fast clear decision
Ben Widawsky
2015-06-12
2
-16
/
+30
*
i965/gen9: Only allow Y-Tiled MCS buffers
Ben Widawsky
2015-06-12
1
-0
/
+2
*
i965: Consolidate certain miptree params to flags
Ben Widawsky
2015-06-12
9
-75
/
+77
*
glsl: enforce restriction on AoA interface blocks in GLSL ES 3.10
Timothy Arceri
2015-06-13
1
-0
/
+11
*
glsl: enforce fragment shader input restrictions in GLSL ES 3.10
Timothy Arceri
2015-06-13
1
-0
/
+45
*
glsl: enforce output variable rules for GLSL ES 3.10
Timothy Arceri
2015-06-13
1
-0
/
+49
*
i965/nir: Support barrier intrinsic function
Jordan Justen
2015-06-12
1
-0
/
+4
*
i965/fs: Implement support for ir_barrier
Jordan Justen
2015-06-12
5
-0
/
+45
*
i965: Add brw_barrier to emit a Gateway Barrier SEND
Jordan Justen
2015-06-12
2
-0
/
+32
*
i965: Add brw_WAIT to emit wait instruction
Jordan Justen
2015-06-12
2
-0
/
+23
*
i965: Add notification register
Jordan Justen
2015-06-12
1
-0
/
+16
*
i965: Disassemble Gateway SEND messages
Jordan Justen
2015-06-12
1
-0
/
+16
*
i965/inst: Add gateway_notify and gateway_subfuncid fields
Jordan Justen
2015-06-12
1
-3
/
+11
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