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* freedreno: fix missing lockingRob Clark2020-04-041-0/+2
* freedreno/a6xx: add some compute loggingRob Clark2020-04-042-2/+21
* freedreno/ir3/cf: use ssa-usesRob Clark2020-04-041-25/+23
* freedreno/ir3: add a pass to collect SSA usesRob Clark2020-04-042-0/+37
* freedreno/ir3/cf: skip array load/storeRob Clark2020-04-041-0/+5
* freedreno/ir3: fixup cat3 32b vs 16bRob Clark2020-04-041-33/+15
* freedreno/ir3/cf: handle widening tooRob Clark2020-04-041-6/+32
* nir: fix definition of imadsh_mix16 for vectorsRob Clark2020-04-041-3/+3
* aco: use MUBUF to load subdword SSBODaniel Schürmann2020-04-031-2/+2
* aco: implement 8bit/16bit store_ssboDaniel Schürmann2020-04-031-8/+31
* aco: implement 8bit/16bit load_bufferDaniel Schürmann2020-04-031-12/+100
* aco: implement storagePushConstant8 & storagePushConstant16Daniel Schürmann2020-04-031-4/+22
* aco: implement vec2/3/4 with subdword operandsDaniel Schürmann2020-04-031-6/+30
* aco: prepare helper functions for subdword handlingDaniel Schürmann2020-04-031-10/+46
* aco: add byte_align_scalar() & trim_subdword_vector() helper functionsDaniel Schürmann2020-04-031-0/+76
* aco: add missing conversion operations for small bitsizesDaniel Schürmann2020-04-032-14/+190
* aco: don't vectorize 8/16bit load/store_ssboDaniel Schürmann2020-04-031-2/+7
* aco: don't assume split_vector(create_vector) has the same number of elements...Daniel Schürmann2020-04-031-1/+2
* aco: don't propagate SGPRs into subdword PSEUDO instructionsDaniel Schürmann2020-04-031-2/+6
* aco: lower subdword shuffles correctly.Daniel Schürmann2020-04-031-70/+124
* aco: add builder function for subdword copy()Daniel Schürmann2020-04-031-5/+15
* aco: small refactoring of shuffle code loweringDaniel Schürmann2020-04-031-41/+48
* aco: align subdword registers during RA when necessaryDaniel Schürmann2020-04-031-0/+24
* aco: adapt register allocation for subdword registersDaniel Schürmann2020-04-031-8/+47
* aco: create helper function to collect variables from register areaDaniel Schürmann2020-04-031-24/+35
* aco: add notion of subdword registers to register allocatorDaniel Schürmann2020-04-031-24/+75
* aco: remove unnecessary reg_file.fill() operation in get_reg_create_vector()Daniel Schürmann2020-04-031-6/+5
* aco: fix Temp and assignment of renamed operands during RADaniel Schürmann2020-04-031-1/+2
* aco: print subdword registersDaniel Schürmann2020-04-031-14/+19
* aco: validate RA of subdword assignmentsDaniel Schürmann2020-04-031-21/+22
* aco: validate uninitialized operandsDaniel Schürmann2020-04-031-0/+2
* aco: validate register alignment of subdword operands and definitionsDaniel Schürmann2020-04-031-0/+8
* aco: validate p_create_vector with subdword elements properlyDaniel Schürmann2020-04-031-2/+3
* aco: refactor regClass setup for subdword VGPRsDaniel Schürmann2020-04-032-92/+35
* aco: add emission support for register-allocated sdwa selsRhys Perry2020-04-032-5/+27
* aco: add sub-dword regclassesDaniel Schürmann2020-04-032-1/+37
* aco: print and validate opselRhys Perry2020-04-032-2/+18
* aco: add SDWA_instructionRhys Perry2020-04-035-7/+207
* aco: add comparison operators for PhysRegDaniel Schürmann2020-04-031-0/+3
* aco: make PhysReg in units of bytesRhys Perry2020-04-036-38/+40
* nir: fix unpack_64_4x16 in lower_alu_to_scalar()Daniel Schürmann2020-04-031-0/+1
* drm-shim: stub libdrm's use of realpath()Lionel Landwerlin2020-04-031-0/+22
* drm-shim: return device platform as specifiedLionel Landwerlin2020-04-037-4/+30
* spirv: Rewrite CFG constructionJason Ekstrand2020-04-032-294/+503
* spirv: Add a parent field to vtn_cf_nodeJason Ekstrand2020-04-032-10/+21
* spirv: Make vtn_function a vtn_cf_nodeJason Ekstrand2020-04-033-6/+11
* spirv: Make vtn_case a vtn_cf_nodeJason Ekstrand2020-04-032-8/+15
* spirv: Add cast and loop helpers for vtn_cf_nodeJason Ekstrand2020-04-032-5/+21
* spirv: Add a vtn_block() helperJason Ekstrand2020-04-031-20/+16
* intel/nir: Enable load/store vectorizationJason Ekstrand2020-04-031-11/+55
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