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* docs: update news, calendar, and link release notes for 20.0.1Dylan Baker2020-03-063-15/+9
| | | | | | | Also fix a couple of dates that are wrong. Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4075> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4075>
* docs: Add sha256sums for 20.0.1Dylan Baker2020-03-061-1/+1
| | | | Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4075>
* docs: add relnotes for 20.0.1Dylan Baker2020-03-061-0/+172
| | | | Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4075>
* docs: update releasing to cover updated post_version.pyDylan Baker2020-03-051-6/+5
| | | | | | | Reviewed-by: Eric Engestrom <[email protected]> Reviewed-by: Juan A. Suarez <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2505> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2505>
* bin/post_version.py: Make the git commit as well.Dylan Baker2020-03-052-0/+10
| | | | | | Reviewed-by: Eric Engestrom <[email protected]> Reviewed-by: Juan A. Suarez <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2505>
* bin/post_version.py: Pretty print the htmlDylan Baker2020-03-051-3/+3
| | | | | | Reviewed-by: Eric Engestrom <[email protected]> Reviewed-by: Juan A. Suarez <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2505>
* bin/post_version.py: Update the release calendar as wellDylan Baker2020-03-052-0/+190
| | | | | | Acked-by: Eric Engestrom <[email protected]> Reviewed-by: Juan A. Suarez <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2505>
* docs: Update release notes with current processDylan Baker2020-03-051-214/+20
| | | | | | | | | There's a lot of stuff here that's out of date, update it to something more modern. Reviewed-by: Eric Engestrom <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4066> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4066>
* docs/submittingpatches: Fix confusing typo + missing pronounDylan Baker2020-03-051-1/+2
| | | | | Reviewed-by: Eric Engestrom <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4066>
* gitlab-ci: add a job that runs Fossilize on RADV/Polaris10Samuel Pitoiset2020-03-053-2/+22
| | | | | | | | | | | | | | RADV_FORCE_FAMILY forces creating a null device that allows RADV to be instanced without AMDGPU. The Fossilize database only contains pipelines from the Sascha Vulkan triangle demos at the moment. I will add more once this is merged. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3960> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3960>
* gitlab-ci: enable building the test image for VK unconditionallySamuel Pitoiset2020-03-051-15/+2
| | | | | | | | | | | | | | It was diabled because RADV is the only driver that tests Vulkan and running CTS on my personal machine and without recovery is not safe enough for CI (too long and too unstable). Now that we are going to test Fossilize with RADV, it's needed to build the test image for VK unconditionally. As RADV now supports creating NULL devices, the fossilize jobs can run everywhere. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3960>
* gitlab-ci: add Fossilize support to detect compiler regressionsSamuel Pitoiset2020-03-055-0/+163
| | | | | | | | | Fossilize is equivalent to vkpipeline-db but it's definitely more robust. This is based on the CI traces system. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Alexandros Frantzis <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3960>
* gitlab-ci: build Fossilize in the test image for VKSamuel Pitoiset2020-03-053-1/+19
| | | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3960>
* aco: only reserve sgprs for vcc if it's usedRhys Perry2020-03-053-7/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pipeline-db (Vega): Totals: SGPRS: 5186302 -> 5075616 (-2.13 %) VGPRS: 3704580 -> 3704580 (0.00 %) Spilled SGPRs: 144859 -> 144859 (0.00 %) Spilled VGPRs: 0 -> 0 (0.00 %) Scratch size: 4124 -> 4124 (0.00 %) dwords per thread Code Size: 247315944 -> 247315944 (0.00 %) bytes LDS: 1311 -> 1311 (0.00 %) blocks Max Waves: 674560 -> 674562 (0.00 %) Totals from affected shaders: SGPRS: 536992 -> 426306 (-20.61 %) VGPRS: 356404 -> 356404 (0.00 %) Spilled SGPRs: 0 -> 0 (0.00 %) Spilled VGPRs: 0 -> 0 (0.00 %) Scratch size: 0 -> 0 (0.00 %) dwords per thread Code Size: 8498748 -> 8498748 (0.00 %) bytes LDS: 8 -> 8 (0.00 %) blocks Max Waves: 113832 -> 113834 (0.00 %) There are some small code size changes in a few RotTR shaders and a small increase in max_waves in two Detroit: Become Human shaders. Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3906> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3906>
* aco: improve control flow handling in GFX6-9 NOP passRhys Perry2020-03-051-8/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fixes Detroit: Become Human hang. Also affects World of Warships. pipeline-db (Tahiti): Totals from affected shaders: SGPRS: 0 -> 0 (0.00 %) VGPRS: 0 -> 0 (0.00 %) Spilled SGPRs: 0 -> 0 (0.00 %) Spilled VGPRs: 0 -> 0 (0.00 %) Scratch size: 0 -> 0 (0.00 %) dwords per thread Code Size: 0 -> 0 (0.00 %) bytes LDS: 0 -> 0 (0.00 %) blocks Max Waves: 0 -> 0 (0.00 %) pipeline-db (Polaris): Totals from affected shaders: SGPRS: 17168 -> 17168 (0.00 %) VGPRS: 11296 -> 11296 (0.00 %) Spilled SGPRs: 1870 -> 1870 (0.00 %) Spilled VGPRs: 0 -> 0 (0.00 %) Scratch size: 0 -> 0 (0.00 %) dwords per thread Code Size: 1472628 -> 1473292 (0.05 %) bytes LDS: 0 -> 0 (0.00 %) blocks Max Waves: 628 -> 628 (0.00 %) pipeline-db (Vega): Totals from affected shaders: SGPRS: 17168 -> 17168 (0.00 %) VGPRS: 11296 -> 11296 (0.00 %) Spilled SGPRs: 1870 -> 1870 (0.00 %) Spilled VGPRs: 0 -> 0 (0.00 %) Scratch size: 0 -> 0 (0.00 %) dwords per thread Code Size: 1409716 -> 1410380 (0.05 %) bytes LDS: 0 -> 0 (0.00 %) blocks Max Waves: 0 -> 0 (0.00 %) Max Waves is lower than it should be because of a null winsys bug. Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4004> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4004>
* aco: consider non-hazard writes in handle_raw_hazard_internalRhys Perry2020-03-051-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I think this helps GFX6 in particular because code like this is common: s_add_i32 s4, 0x60, s3 s_mov_b32 s5, 0 s_load_dwordx4 s[4:7], s[4:5], 0x0 s_buffer_load_dword s4, s[4:7], 0xcc pipeline-db (Tahiti): Totals from affected shaders: SGPRS: 1923878 -> 1923878 (0.00 %) VGPRS: 1528964 -> 1528964 (0.00 %) Spilled SGPRs: 476 -> 476 (0.00 %) Spilled VGPRs: 0 -> 0 (0.00 %) Scratch size: 0 -> 0 (0.00 %) dwords per thread Code Size: 88723604 -> 88528880 (-0.22 %) bytes LDS: 241 -> 241 (0.00 %) blocks Max Waves: 145402 -> 145402 (0.00 %) pipeline-db (Polaris): Totals from affected shaders: SGPRS: 428128 -> 428128 (0.00 %) VGPRS: 353092 -> 353092 (0.00 %) Spilled SGPRs: 119251 -> 119251 (0.00 %) Spilled VGPRs: 0 -> 0 (0.00 %) Scratch size: 0 -> 0 (0.00 %) dwords per thread Code Size: 57580468 -> 57563964 (-0.03 %) bytes LDS: 0 -> 0 (0.00 %) blocks Max Waves: 11631 -> 11631 (0.00 %) piepline-db (Vega): Totals from affected shaders: SGPRS: 425016 -> 425016 (0.00 %) VGPRS: 349588 -> 349588 (0.00 %) Spilled SGPRs: 117835 -> 117835 (0.00 %) Spilled VGPRs: 0 -> 0 (0.00 %) Scratch size: 0 -> 0 (0.00 %) dwords per thread Code Size: 54890792 -> 54874432 (-0.03 %) bytes LDS: 0 -> 0 (0.00 %) blocks Max Waves: 54 -> 54 (0.00 %) Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4004>
* aco: improve get_wait_states()Rhys Perry2020-03-051-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pipeline-db (Tahiti): Totals from affected shaders: SGPRS: 21208 -> 21208 (0.00 %) VGPRS: 22388 -> 22388 (0.00 %) Spilled SGPRs: 0 -> 0 (0.00 %) Spilled VGPRs: 0 -> 0 (0.00 %) Scratch size: 0 -> 0 (0.00 %) dwords per thread Code Size: 3278596 -> 3277004 (-0.05 %) bytes LDS: 19 -> 19 (0.00 %) blocks Max Waves: 238 -> 238 (0.00 %) pipeline-db (Polaris): Totals from affected shaders: SGPRS: 64 -> 64 (0.00 %) VGPRS: 96 -> 96 (0.00 %) Spilled SGPRs: 0 -> 0 (0.00 %) Spilled VGPRs: 0 -> 0 (0.00 %) Scratch size: 0 -> 0 (0.00 %) dwords per thread Code Size: 5200 -> 5192 (-0.15 %) bytes LDS: 0 -> 0 (0.00 %) blocks Max Waves: 10 -> 10 (0.00 %) pipeline-db (Vega): Totals from affected shaders: SGPRS: 0 -> 0 (0.00 %) VGPRS: 0 -> 0 (0.00 %) Spilled SGPRs: 0 -> 0 (0.00 %) Spilled VGPRs: 0 -> 0 (0.00 %) Scratch size: 0 -> 0 (0.00 %) dwords per thread Code Size: 0 -> 0 (0.00 %) bytes LDS: 0 -> 0 (0.00 %) blocks Max Waves: 0 -> 0 (0.00 %) Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4004>
* aco: add new NOP insertion pass for GFX6-9Rhys Perry2020-03-052-318/+438
| | | | | | | | | | | This new pass is more similar to the GFX10 pass and should be able to handle control flow better. No pipeline-db changes. Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4004>
* iris: Enable HiZ and stencil CCS for blorp blit destinationsJason Ekstrand2020-03-051-36/+25
| | | | | | | | | Now that blorp blits write to depth and stencil as depth and stencil, we can leave HiZ and stencil CCS enabled for blorp blit destinations. Reviewed-by: Nanley Chery <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3717> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3717>
* iris: Enable CCS for copies from HiZ+CCS depth buffersJason Ekstrand2020-03-051-8/+12
| | | | | | | | | Ever since b274469daae, BLORP is able to sample from whatever the sampler supports. In c0c899cf7892, we added HiZ support for copies from HiZ compressed depth buffers but forgot HiZ+CCS. Reviewed-by: Nanley Chery <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3717>
* anv: Enable HiZ for VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMALJason Ekstrand2020-03-051-8/+19
| | | | | Reviewed-by: Nanley Chery <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3717>
* blorp: Write to depth/stencil images as depth/stencil when possibleJason Ekstrand2020-03-053-18/+77
| | | | | | | | | | | | | | | On Gen4 and G45 and earlier, we have to handle weird offsetting to write to depth and stencil due to a lack of proper depth mipmapping support in hardware. On Gen6, we have to deal with strange HiZ and stencil layouts. Prior to Gen9, we also had to do crazy things for stencil writes because we didn't support GL_ARB_shader_stencil_export and friends in hardware. However, starting with Gen7 for depth and Gen9 for stencil, we can easily write out with the "right" hardware. This allows us to leave HiZ and other compression enabled for blorp_blit() and blorp_copy() operations. Reviewed-by: Nanley Chery <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3717>
* iris: Allow HiZ on blit sourcesJason Ekstrand2020-03-051-1/+1
| | | | | | | | | | Ever since 95cc5438ebf, BLORP has been able to read from HiZ-compressed depth buffers as long as the sampler supports HiZ. This just makes iris stop doing the unneeded resolve. Closes: #2583 Reviewed-by: Nanley Chery <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3717>
* isl: Set 3DSTATE_DEPTH_BUFFER::Depth correctly for 3D surfacesJason Ekstrand2020-03-051-1/+19
| | | | | | Cc: [email protected] Reviewed-by: Nanley Chery <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3717>
* docs: Update stable process around using fixes: and gitlabDylan Baker2020-03-051-28/+30
| | | | | | | | | | | | | | | | | Currently the docs still recommend using [email protected], which is pretty awful. We really don't want a second mailing list and it's mostly full of junk because of CC: tags anyway. This changes the preferred actions to be: 1) use a fixes: tag ahead of time 2) use a Cc tag ahead of time if fixes isn't appropriate 3) Use a gitlab MR against the staging/ branch for post-merge/backport nominations Reviewed-by: Timothy Arceri <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3056> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3056>
* turnip: fix tile->slot calculationJonathan Marek2020-03-051-1/+5
| | | | | | | | | Fixes HW binning cases when the horizontal number of tiles isn't divisible by the horizontal number of pipes (only happens with more than 32 tiles). Signed-off-by: Jonathan Marek <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3142> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3142>
* turnip: improve binning pipe layout configJonathan Marek2020-03-051-15/+10
| | | | | | | | | | | The old code looks the same as GL driver, but we get things like pipe_count = {32, 1}, which seems bad. This uses similar logic as for tiles which produces a balanced pipe_count width/height. Signed-off-by: Jonathan Marek <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3142>
* Revert "spirv: Use a simpler and more correct implementaiton of tanh()"Kristian H. Kristensen2020-03-051-14/+13
| | | | | | | | | | This reverts commit da1c49171d0df185545cfbbd600e287f7c6160fa. The reduced formula has precision problems on fp16 around 0. Bring back the old formula, but make sure to keep the clamping. Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4054> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4054>
* Revert "glsl: Use a simpler formula for tanh"Kristian H. Kristensen2020-03-051-10/+8
| | | | | | | | | This reverts commit 9807f502eb7a023be619a14119388b2a43271b0e. The simplified formula doesn't pass the tanh dEQP tests when we lower to fp16 math. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4054>
* pan/bi: Add bi_print_shaderAlyssa Rosenzweig2020-03-052-0/+8
| | | | | | | | | | Woot! That's the last of it! IR printing is now complete* *until the IR gets updated when new shiny things are added. Signed-off-by: Alyssa Rosenzweig <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
* pan/bi: Add bi_print_blockAlyssa Rosenzweig2020-03-052-0/+31
| | | | | | | Almost there... Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
* pan/bi: Add bi_print_clauseAlyssa Rosenzweig2020-03-052-0/+44
| | | | | | | Again for post-sched purposes. Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
* pan/bi: Add bi_print_bundle for printing bi_bundleAlyssa Rosenzweig2020-03-052-0/+15
| | | | | | | Post-schedule, nops are significnat here. Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
* pan/bi: Add bi_instruction printingAlyssa Rosenzweig2020-03-052-0/+229
| | | | | | | | | | So we can debug the IR in memory before code emit has happened. We'd like to have a complete dump of the IR -- neglecting this with Midgard was one of those mistakes I've regretted so let's get this right for the first time around. Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
* pan/bi: Move bi_interp_mode_name to bi_printAlyssa Rosenzweig2020-03-053-13/+14
| | | | | | | Instead of open-coding it in the middle of the disassembler. Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
* pan/bi: Add BIR manipulation routines to bir.cAlyssa Rosenzweig2020-03-054-0/+70
| | | | | | | New file. Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
* pan/bi: Move some print routines out of the disasmAlyssa Rosenzweig2020-03-056-120/+167
| | | | | | | | These are generally useful for debug of the compiler IR even prior to code emit; let's share these. Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
* pan/bi: Add IR iteration macrosAlyssa Rosenzweig2020-03-051-0/+59
| | | | | | | Copypaste from Midgard, for the most part. Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
* pan/bi: Add quirks systemAlyssa Rosenzweig2020-03-056-3/+69
| | | | | | | | | Modeled after the Midgard system. Already we know of two compiler-visible differences between G52 and G71, so let's keep track so we can eventually port the compiler to other Bifrost systems. Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
* pan/bi: Add high-latency property for classesAlyssa Rosenzweig2020-03-052-11/+15
| | | | | | | | This is required to know how to schedule legally, and also influences some issues relating to RA. Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
* pan/bi: Add CSEL conditionAlyssa Rosenzweig2020-03-051-0/+4
| | | | | | | Along with src_types, this is enough to represent CSEL. Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
* pan/bi: Add bi_branch dataAlyssa Rosenzweig2020-03-051-0/+32
| | | | | | | For BI_BRANCH, of course. Meshes well with the cfg. Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
* pan/bi: Extract bifrost_branch structureAlyssa Rosenzweig2020-03-051-0/+16
| | | | | | | | It's in the disassembler as bitfields, let's extract to a proper structure so we can see what's there. Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
* pan/bi: Add pred/successors to build CFGAlyssa Rosenzweig2020-03-051-0/+4
| | | | | | | We'll want this for analysis passes or something, probably. Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
* pan/bi: Add constants to bi_clauseAlyssa Rosenzweig2020-03-051-0/+4
| | | | | | | Scheduling will have to pay attention to this. Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
* pan/bi: Add EXTRACT, MAKE_VEC synthetic opsAlyssa Rosenzweig2020-03-051-1/+4
| | | | | | | | These allow translating between the vector I/O and scalar ALUs, facilitated by an RA dance to ensured contiguous registers are used. Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
* pan/bi: Add source type for conversionsAlyssa Rosenzweig2020-03-051-0/+3
| | | | | | | We should now be able to unambiguously represent conversions. Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
* pan/bi: Add swizzlesAlyssa Rosenzweig2020-03-052-1/+13
| | | | | | | | Requires a new field on bifrost_instruction, as well as a new class property and a new class for the dedicated swizzle ops. Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
* pan/bi: Clarify special op schedulingAlyssa Rosenzweig2020-03-052-1/+5
| | | | | | | They're encoded on ADD but eat the full cycle. Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
* pan/bi: Add clause header fields to bi_clauseAlyssa Rosenzweig2020-03-051-0/+19
| | | | | | | | These will be filled out during scheduling (and possibly RA), to be used when emitting code. Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-12 23:07:48 +0000