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* ac/nir: implement nir_op_pack_{us}norm_2x16Marek Olšák2019-07-232-7/+14
| | | | Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]>
* mesa/st: rewrite src var when lowering tex_src_planePierre-Eric Pelloux-Prayer2019-07-231-2/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | The assign_extra_samplers() adds the needed extra samplers but they need to be used in the nir_tex_instr. Otherwise the plane information is simply lost and all nir_tex_instr use the same sampler. Here's an example of the bug: NIR before st_nir_lower_tex_src_plane: vec1 32 ssa_8 = load_const (0x00000000 /* 0.000000 */) vec4 32 ssa_9 = tex ssa_0 (texture_deref), ssa_0 (sampler_deref), ssa_5 (coord), ssa_8 (plane) vec1 32 ssa_10 = load_const (0x00000001 /* 0.000000 */) vec4 32 ssa_11 = tex ssa_0 (texture_deref), ssa_0 (sampler_deref), ssa_5 (coord), ssa_10 (plane) After: vec4 32 ssa_9 = tex ssa_0 (texture_deref), ssa_0 (sampler_deref), ssa_5 (coord) vec4 32 ssa_11 = tex ssa_0 (texture_deref), ssa_0 (sampler_deref), ssa_5 (coord) This fixes the following piglit test for radeonsi + NIR: - ext_image_dma_buf_import-sample_nv12 - ext_image_dma_buf_import-sample_yuv420 - ext_image_dma_buf_import-sample_yvu420 Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* u_blitter: add a msaa parameter to util_blitter_clearPierre-Eric Pelloux-Prayer2019-07-238-13/+22
| | | | | | | Fixes: ea5b7de138b ("radeonsi: make gl_SampleMaskIn = 0x1 when MSAA is disabled") Tested-by: Michel Dänzer <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* u_blitter: enable msaa when dst num samples is > 1Pierre-Eric Pelloux-Prayer2019-07-231-6/+12
| | | | | | | | | | | Commit ea5b7de138b broke some piglit tests on radeonsi (Bonaire hardware). This commit fixes half of the regression by enabling msaa if the dest surface has more than 1 sample (instead of hardcoding it to false). Fixes: ea5b7de138b ("radeonsi: make gl_SampleMaskIn = 0x1 when MSAA is disabled") Tested-by: Michel Dänzer <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* nir/gather_info: Look for uses of helper invocationsJason Ekstrand2019-07-232-0/+27
| | | | | | | | | The one obvious omission here is gl_HelperInvocation itself. However, the spec doesn't require that we generate then when gl_HelperInvocation is used, it merely mandates that we report them if they are there. Reviewed-by: Alyssa Rosenzweig <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* nir/gather_info: Move setting uses_64bit out of the switchJason Ekstrand2019-07-231-5/+6
| | | | | | | | | Otherwise, as we add things to the switch, we're going to forget and add some 64-bit op at some point in the future and it'll stop getting flagged. There's no reason why we can't do the check for derivatives. Reviewed-by: Alyssa Rosenzweig <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* nir: Add a nir_tex_instr_has_implicit_derivatives helperJason Ekstrand2019-07-232-11/+14
| | | | | Reviewed-by: Alyssa Rosenzweig <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* nir: Move nir_alu_instr_is_comparison to the ALU sectionJason Ekstrand2019-07-231-23/+23
| | | | | Reviewed-by: Alyssa Rosenzweig <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* intel/genxml: Add new test for subgroups.Rafael Antognolli2019-07-232-0/+44
| | | | | | | | Make sure that a <group> tag within another <group> tag work just fine. v2: rename 'halfbyte' to 'byte' to match the size (Lionel). Reviewed-by: Lionel Landwerlin <[email protected]>
* intel/genxml: Add basic infra for encoding/decoding unit tests.Rafael Antognolli2019-07-234-0/+147
| | | | | | | | Adding option to print quiet. v2: Add license header. Reviewed-by: Lionel Landwerlin <[email protected]>
* intel/gen_decoder: Decode <group> inside <group>.Rafael Antognolli2019-07-232-37/+93
| | | | | | | | | | Now we can decode a <group> tag inside another <group> tag, and properly print its indices and content. v2: Use push/pop stack to fields, groups and iters (Lionel). v3: Add assert(iter->level < DECODE_MAX_ARRAY_DEPTH) (Lionel). Reviewed-by: Lionel Landwerlin <[email protected]>
* intel/gen_decoder: Add the concept of array "levels".Rafael Antognolli2019-07-232-9/+19
| | | | | | | We currently only support one level, which is the basic level of a <group> tag. Reviewed-by: Lionel Landwerlin <[email protected]>
* intel/gen_decoder: Add array field.Rafael Antognolli2019-07-232-3/+21
| | | | | | | | | | We currently use the group->next pointer to iterate through the <group> tags. This change them to be a type of field, so we can descend into them while iterating, and then go back to the original position. Will be useful when we want to decode <group>'s inside <group>'s, and when there are more <field>'s after a <group> tag. Reviewed-by: Lionel Landwerlin <[email protected]>
* intel/gen_decoder: Rename internally "group" to "array".Rafael Antognolli2019-07-232-25/+30
| | | | | | | | | | | | | A gen_group (group in most of the code) can be of several types: - instruction - struct - register - group (?!?) The <group> tag actually represents an array of elements. So at least in our code, lets call it an array to avoid confusion with gen_group. Reviewed-by: Lionel Landwerlin <[email protected]>
* intel/gen_decoder: Add gen_spec_load_filename() function.Rafael Antognolli2019-07-232-12/+21
| | | | | | | | | | Refactor the code from gen_spec_load_from_path() into a separate function, that can be used with a xml file that doesn't fit the genX.xml filename format. Will be used soon for implementing unit tests for gen_decoder. Reviewed-by: Lionel Landwerlin <[email protected]>
* intel/gen_decoder: Fix parsing of small genxml file.Rafael Antognolli2019-07-231-2/+6
| | | | | | | | | | | When using gen_spec_load_from path, only abort decoding if the read length is 0. Previously, we were aborting if finding an EOF, even if something was read from the file. Also only kill the decoded file if no commands or structs were found, and print a message in such case. Reviewed-by: Lionel Landwerlin <[email protected]>
* kmsro: Extend to include mxsfb-drmGuido Günther2019-07-233-0/+3
| | | | | | | | | This allows using the LCDIF display controllers (with the mxsfb drm modesetting driver) along with the Etnaviv render-only drivers. LCDIF is found on i.MX SoCs. Signed-off-by: Guido Günther <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* anv: Implement VK_KHR_imageless_framebufferSagar Ghuge2019-07-236-34/+68
| | | | | | | | | | | | | | | | | v2: Pass pointer instead of struct instance (Lionel) v3: 1) Fix small nits (Jason) 2) Add way to detect anv_framebuffer don't have attachments (Jason) 3) Get rid of unncessary pNext chain walk (Jason) 4) Keep framebuffer instance in anv_cmd_state (Jason) v4: 1) Dump attachments from cmd_buffer (Jason) v5: 1) Fix condition check and add assertion (Lionel) Signed-off-by: Sagar Ghuge <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* panfrost/midgard: Allocate registers once (per-screen)Alyssa Rosenzweig2019-07-237-19/+86
| | | | | | | This should save a lot of per-compile time by using the RA the way it's actually supposed to be used. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* anv: fix use of comma operatorLionel Landwerlin2019-07-231-1/+1
| | | | | | | | | | | | | This doesn't fix any bug at the moment because the next statement is 'true' which happens to be APIMODE_D3D, but if that changes it could. The fixes tags is as far I could go but the error predates it (2016 is probably far enough). Signed-off-by: Lionel Landwerlin <[email protected]> Fixes: 8db6f2e6ebb9 ("anv/pipeline: Roll genX_pipeline_util.h into genX_pipeline.c") Reviewed-by: Eric Engestrom <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* nir: use | instead of || operatorAndrii Simiklit2019-07-231-1/+1
| | | | | | | | | | | warning: use of logical '||' with constant operand note: use '|' for a bitwise operation Fixes: 758fdce9fee ("nir: Add some generic helpers for writing lowering passes") Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> Signed-off-by: Andrii Simiklit <[email protected]>
* panfrost: Fix T6XX SupportArnaud Patard2019-07-231-1/+9
| | | | | | | | | | | | | | | | | While testing kmscube with mesa master, it turns out that kmscube is not working anymore. After bisecting, commit 5a7688fdecd76c7d9cd87f6f6c93eb32870a2146 is the culprit. A short trial and error session allowed to find the removed bit of code making kmscube working again. This patch adds it back. Fixes: 5a7688fde ("panfrost: Use 64-bit descriptors globally") v2: Add comment pointing out this is magic. [Alyssa, trivial] Signed-off-by: Arnaud Patard <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Use correct definition for is_t6xxAlyssa Rosenzweig2019-07-231-1/+1
| | | | | | | Rather than anything "early Midgard", limit us specifically to T6XX, as certain workarounds only apply to genuine T6XX, not T7XX. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* nir: don't return voidEric Engestrom2019-07-231-1/+2
| | | | | | Fixes: 14531d676b11999123c0 ("nir: make nir_const_value scalar") Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Karol Herbst <[email protected]>
* util: fix asprintf() fallbackEric Engestrom2019-07-231-6/+5
| | | | | | Fixes: 9607d499dcdd09160b13 ("util: add asprintf() wrapper for MSVC") Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]>
* st/mesa: Try re-importing resource if necessary in st_vdpau_map_surfaceMichel Dänzer2019-07-231-6/+18
| | | | | | | | | | | | | | This can be the case if the resource was obtained from st_vdpau_output/video_surface_gallium. st_vdpau_output/video_surface_dma_buf do a similar dance internally. v2: * Pass PIPE_HANDLE_USAGE_FRAMEBUFFER_WRITE instead of 0 for usage. Bugzilla: https://bugs.freedesktop.org/111099 Acked-by: Pierre-Eric Pelloux-Prayer <[email protected]> # v1 Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: Allow PIPE_TEXTURE_2D_ARRAY in si_texture_from_handleMichel Dänzer2019-07-231-2/+3
| | | | | | | Needed for the following st/mesa fix. Acked-by: Pierre-Eric Pelloux-Prayer <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* panfrost: Fake CAPs for dEQP-GLES31Alyssa Rosenzweig2019-07-231-2/+14
| | | | | | | | | | | We still have some big ticket items left on GLES 3.0, but it's often helpful to be able to access higher dEQP levels for debugging features that just don't quite match a particular API. Plus, this opens up a whole slew of new features to poke at if boredom overtakes, ahem. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* nvc0/ir: Fix assert accessing null pointerMark Menzynski2019-07-231-1/+1
| | | | | | | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111007 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111167 Signed-off-by: Mark Menzynski <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]> Reviewed-by: Tobias Klausmann<[email protected]>
* radv/gfx10: enable CLEAR_stateSamuel Pitoiset2019-07-231-2/+1
| | | | | | | It actually works. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* docs: update calendar, add news item and link release notes for 19.1.3Juan A. Suarez Romero2019-07-233-7/+8
| | | | Signed-off-by: Juan A. Suarez Romero <[email protected]>
* docs: add sha256 checksums for 19.1.3Juan A. Suarez Romero2019-07-231-1/+1
| | | | | Signed-off-by: Juan A. Suarez Romero <[email protected]> (cherry picked from commit 33e57d0ace83e4f5deab0211474cd84607878024)
* docs: add release notes for 19.1.3Juan A. Suarez Romero2019-07-231-0/+191
| | | | | Signed-off-by: Juan A. Suarez Romero <[email protected]> (cherry picked from commit 09a1b2bdbab20635888b3b226bd1e9a8e31a75ec)
* lima/ppir: fix branch codegen register encodeErico Nunes2019-07-231-2/+2
| | | | | | | | | | | The branch instruction has 6 bits per register operand which allows it to specify a component in the register. Fix codegen so that it outputs the right component, otherwise it always outputs the x component. Signed-off-by: Erico Nunes <[email protected]> Reviewed-by: Vasily Khoruzhick <[email protected]> Reviewed-by: Qiang Yu <[email protected]>
* lima/ppir: fix debug logs in regallocErico Nunes2019-07-231-2/+2
| | | | | | | | The macros already prepend "ppir: ", remove them from the actual strings so it doesn't appear duplicated. Signed-off-by: Erico Nunes <[email protected]> Reviewed-by: Qiang Yu <[email protected]>
* lima/ppir: fix alignment on regalloc spilling loadsErico Nunes2019-07-231-1/+1
| | | | | | | | | | | The spilling code spills entire vec4 registers regardless of the components used by the spilled uses. The inserted stores code force the 4 components, but these loads were using a variable number of components, causing bugs on loading the spilled registers. Signed-off-by: Erico Nunes <[email protected]> Reviewed-by: Qiang Yu <[email protected]>
* radv: fix dumping disassembly with RADV_DEBUG=shadersSamuel Pitoiset2019-07-231-1/+2
| | | | | | Fixes: a20a9d0c5e7 ("radv: dont store disasm string unless keep_shader_info flag set") Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* st/nir: use asprintf() wrapper to fix MSVC issuesEric Engestrom2019-07-231-0/+1
| | | | | | Fixes: 856e84083eee9b22408a ("mesa/st: add sampler uniforms") Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* util: add asprintf() wrapper for MSVCEric Engestrom2019-07-231-0/+12
| | | | | | Fixes: 856e84083eee9b22408a ("mesa/st: add sampler uniforms") Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* gallium: remove boolean from state tracker APIsIlia Mirkin2019-07-2222-170/+168
| | | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* gallium: switch boolean -> bool at the interface definitionsIlia Mirkin2019-07-22161-770/+770
| | | | | | | | | | | | | | | | | | This is a relatively minimal change to adjust all the gallium interfaces to use bool instead of boolean. I tried to avoid making unrelated changes inside of drivers to flip boolean -> bool to reduce the risk of regressions (the compiler will much more easily allow "dirty" values inside a char-based boolean than a C99 _Bool). This has been build-tested on amd64 with: Gallium drivers: nouveau r300 r600 radeonsi freedreno swrast etnaviv v3d vc4 i915 svga virgl swr panfrost iris lima kmsro Gallium st: mesa xa xvmc xvmc vdpau va Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Acked-by: Alyssa Rosenzweig <[email protected]>
* st/nir: fix arb fragment stage conversionDave Airlie2019-07-231-1/+1
| | | | | | | | | | | The comment even justifies the wrongness wrongly. We should be translating to pipe values properly here or else fragment maps to tess ctrl. Fixes: 3d7611e9a6c ("st/nir: use NIR for asm programs") Reviewed-by: Timothy Arceri <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: fix warning: ‘ret’ may be used uninitializedMarek Olšák2019-07-221-1/+1
| | | | Reviewed-by: Dave Airlie <[email protected]>
* tgsi: fix warning: ‘interp’ may be used uninitializedMarek Olšák2019-07-221-0/+1
| | | | Reviewed-by: Dave Airlie <[email protected]>
* gallivm: fix warning: ‘op’ may be used uninitializedMarek Olšák2019-07-221-0/+3
| | | | Reviewed-by: Dave Airlie <[email protected]>
* iris: Support storage images that have matching typed formats for readsKenneth Graunke2019-07-221-3/+2
| | | | | Even if we don't directly support typed reads on a format, we can often translate them to a reasonable matching format. Advertise those too.
* iris: Stop advertising MSAA storage images by mistakeKenneth Graunke2019-07-221-1/+1
| | | | | | | | | | | | | | | | | | st_extensions.c sets const->MaxImageSamples (GL_MAX_IMAGE_SAMPLES) by looping over [16, 15, .. 1x] MSAA modes, and RGBA/BGRA/ARGB/ABGR 8888 color formats, calling pipe->is_format_supported() for each, with the usage set to PIPE_BIND_SHADER_IMAGE. If any are supported, it selects that number of samples. We were checking if sample_count <= 1, which meant that we were getting a value of 1x MSAA, rather than the expected 0x (feature doesn't exist). But, only on Icelake because Gen11 adds support for typed read messages for R8G8B8A8_UNORM. The lack of typed read messages for these formats was tricking the check on Gen9 to say no correctly. This caused some Icelake conformance failures, because we don't implement this feature. Just check for sample_count == 0 instead.
* egl: Only expose 565 pbuffer configs if X can export them as DRI3 imagesKenneth Graunke2019-07-221-37/+79
| | | | | | | | | | | | | | | | | | | Glamor in xorg-server 1.20 cannot expose 16bpp pixmaps when running in the usual 24bpp mode. This meant our 565 pbuffer configs would ultimately fail to create a backing pixmap, leading to crashes. To hack around this, make a 16bpp pixmap and try and export it. If it works, expose the configs. Otherwise, just skip them. This also disables them on DRI2. These configs were only added to pass conformance requirements, and I doubt anybody cares about testing out 565 pbuffer visuals on DRI2-only drivers. v2: Don't leak the fds (caught by Eric Anholt) v3: Don't free(fds), it's not malloc'd Fixes: dacb11a585f ("egl: Add a 565 pbuffer-only EGL config under X11.") Reviewed-by: Eric Anholt <[email protected]>
* egl: Make the 565 pbuffer-only config single buffered.Kenneth Graunke2019-07-221-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In commit dacb11a585face5ca179c34cfc588a71a425c1e0, Eric found the first matching 565 pbuffer config, and stopped. Our double-buffered configs come first in the list, so we added that, making a pbuffer-only config that claimed to be double buffered. This doesn't make sense, since pixmaps/pbuffers are fundamentally not double buffered. When using that config, every call to eglCreatePbufferSurface would fail with EGL_BAD_MATCH. The call chain looks like this: - eglCreatePbufferSurface - dri3_create_pbuffer_surface - dri3_create_surface - dri2_get_dri_config which eventually does: const bool double_buffer = surface_type == EGL_WINDOW_BIT; and then fails to find a matching config, because it ends up looking for a single-buffered config - and there aren't any. To fix this, make the 565 pbuffer config single-buffered. This fixes at least 51 dEQP-EGL.* tests. Fixes: dacb11a585f ("egl: Add a 565 pbuffer-only EGL config under X11.") Reviewed-by: Eric Engestrom <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* egl: Quiet warning about front buffer rendering for pixmaps/pbuffersKenneth Graunke2019-07-221-3/+5
| | | | | | | | | | pbuffer configs cause a million of these warnings to trigger, but when using pixmaps or buffers, there is only one surface, so this warning doesn't make much sense. Retain it for window surfaces for now. Fixes: dacb11a585f ("egl: Add a 565 pbuffer-only EGL config under X11.") Reviewed-by: Eric Engestrom <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
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