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* nir/loop_analyze: Pass nir_const_values directly to helpersJason Ekstrand2019-07-101-13/+10
* nir/loop_analyze: Properly handle swizzles in loop conditionsJason Ekstrand2019-07-101-140/+149
* nir/loop_analyze: Refactor detection of limit varsJason Ekstrand2019-07-101-54/+51
* nir: Add some helpers for chasing SSA values properlyJason Ekstrand2019-07-101-0/+80
* nir/loop_analyze: Bail if we encounter swizzlesJason Ekstrand2019-07-101-0/+22
* nir/loop_analyze: Use new eval_const_* helpers in test_iterationsJason Ekstrand2019-07-101-6/+4
* nir/loop_analyze: Handle bit sizes correctly in calculate_iterationsJason Ekstrand2019-07-101-27/+48
* nir/loop_analyze: Fix phi-of-identical-alu detectionJason Ekstrand2019-07-101-26/+29
* nir/instr_set: Expose nir_instrs_equal()Jason Ekstrand2019-07-102-59/+62
* nir/builder: Use nir_const_value_for_* for constructing immediatesJason Ekstrand2019-07-101-102/+50
* nir: Refactor nir_src_as_* constant functionsJason Ekstrand2019-07-102-101/+28
* nir: Add more helpers for working with const valuesJason Ekstrand2019-07-102-0/+135
* virgl: remove virgl_transfer_queue_listsChia-I Wu2019-07-092-36/+13
* virgl: simplify virgl_transfer_queue_extendChia-I Wu2019-07-091-34/+5
* virgl: remove transfer after transfer_writeChia-I Wu2019-07-091-2/+1
* virgl: improve virgl_transfer_queue_is_queuedChia-I Wu2019-07-091-30/+21
* virgl: fix transfers_intersect for mipmapsChia-I Wu2019-07-091-7/+2
* virgl: fix some false positives in transfers_overlapChia-I Wu2019-07-091-27/+86
* radeonsi/gfx10: enable primitive binning by defaultMarek Olšák2019-07-091-5/+7
* radeonsi/gfx10: implement primitive binningMarek Olšák2019-07-092-8/+127
* radeonsi: simplify primitive binning enablementMarek Olšák2019-07-091-4/+4
* radeonsi: set primitive binning tunables for dGPUsMarek Olšák2019-07-091-6/+11
* radeonsi: set FLUSH_ON_BINNING_TRANSITION when neededMarek Olšák2019-07-093-3/+15
* radeonsi/gfx10: use the new scan converter when binning is disabledMarek Olšák2019-07-093-4/+38
* radeonsi/gfx9: fix an oversight in primitive binning codeMarek Olšák2019-07-091-1/+1
* radeonsi: use BREAK_BATCH instead of FLUSH_DFSM when CB_TARGET_MASK changesMarek Olšák2019-07-091-2/+2
* radeonsi/gfx10: don't expose unimplemented PIPE_CAP_QUERY_SO_OVERFLOWMarek Olšák2019-07-091-1/+3
* radeonsi/gfx10: launch 2 compute waves per CU before going onto the next CUMarek Olšák2019-07-091-2/+9
* radeonsi/gfx10: set more registers and fieldsMarek Olšák2019-07-092-4/+26
* radeonsi/gfx10: enable LATE_ALLOC_GSMarek Olšák2019-07-091-6/+23
* radeonsi/gfx10: set HS/GS/CS.WGP_MODEMarek Olšák2019-07-092-0/+4
* radeonsi/gfx10: set GE_PC_ALLOCMarek Olšák2019-07-091-0/+11
* radeonsi/gfx10: enable 1D texturesMarek Olšák2019-07-095-11/+15
* radeonsi/gfx10: enable image stores with DCCMarek Olšák2019-07-094-11/+10
* radeonsi/gfx10: no need to invalidate L2 for framebuffer -> texture coherencyMarek Olšák2019-07-091-2/+8
* radeonsi/gfx10: support pixel shaders without exportsMarek Olšák2019-07-091-1/+8
* radeonsi/gfx10: enable vertex shaders without param space allocationMarek Olšák2019-07-091-2/+7
* radeonsi: update DCC settings from PALMarek Olšák2019-07-091-9/+4
* radeonsi: reorder shader IO indices for better IO space usage for tess and GSMarek Olšák2019-07-091-18/+22
* radeonsi: decrease maximum supported GENERIC varying index from 42 to 31Marek Olšák2019-07-091-1/+1
* radeonsi: cosmetic cleanup in si_shader_io_get_unique_indexMarek Olšák2019-07-091-2/+2
* radeonsi: fix and clean up shader_type passingMarek Olšák2019-07-097-60/+71
* radeonsi: enable RB+ for pixel shaders with no/non-contiguous color outputsMarek Olšák2019-07-091-1/+14
* radeonsi: don't set READ_ONLY for const_uploader to fix bindless texture hangsMarek Olšák2019-07-091-3/+1
* gallium: Add util_format_is_unorm8 checkAlyssa Rosenzweig2019-07-091-1/+16
* nir: Add Panfrost-specific blending intrinsicAlyssa Rosenzweig2019-07-091-0/+16
* radeonsi: Expose support for 10-bit VP9 decodePratik Vishwakarma2019-07-091-0/+5
* nir: Add nir_imm_vec4_16Alyssa Rosenzweig2019-07-091-0/+14
* nvc0: remove nvc0_program.tp.input_patch_sizeKarol Herbst2019-07-093-6/+0
* radv: Add a common member in the union to make things more clear.Bas Nieuwenhuizen2019-07-094-50/+53
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