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* radv: drop tess offchip layout for tcs.Dave Airlie2018-03-164-38/+90
| | | | | | | This removes the last TCS specific user sgpr. Reviewed-by: Samuel Pitoiset <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: drop tcs_out_offsetsDave Airlie2018-03-162-20/+29
| | | | | | | Move all calculations to shader generation. Reviewed-by: Samuel Pitoiset <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: drop tcs_out_layoutDave Airlie2018-03-162-15/+15
| | | | | | | Move all calculations to shader generation. Reviewed-by: Samuel Pitoiset <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv/tess: drop tcs_in_layout setting completely.Dave Airlie2018-03-163-15/+24
| | | | | | | Inline all calcs at shader creation. Reviewed-by: Samuel Pitoiset <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: drop ls_out_layout const.Dave Airlie2018-03-163-37/+4
| | | | | | | We can precalculate input_vertex_size at compile time. Reviewed-by: Samuel Pitoiset <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv/shader_info: start gathering tess output info (v2)Dave Airlie2018-03-162-2/+52
| | | | | | | | | | | | | | | | | | This gathers the ls outputs written by the vertex shader, and the tcs outputs, these are needed to calculate certain tcs parameters. These have to be separate for combined gfx9 shaders. This is a bit pessimistic compared to the nir pass, as we don't work out the individual slots for tcs outputs, but I actually thing it should be fine to just mark the whole thing used here. v2: move to radv, handle clip dist (Samuel), handle compacts and patchs properly. Reviewed-by: Samuel Pitoiset <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: migrate unique index info shader info (v2)Dave Airlie2018-03-162-22/+21
| | | | | | | | | | This just moves this function to an inline so the shader_info pass can use it. v2: use inline (Samuel) Reviewed-by: Samuel Pitoiset <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* Revert "mesa: do not trigger _NEW_TEXTURE_STATE in glActiveTexture()"Samuel Pitoiset2018-03-151-0/+13
| | | | | | | | | | | | | | | | This reverts commit f314a532fdc7af8381586144d2631d9968331f05. This appears to introduce some blinking textures in UT2004. Not sure exactly what's the root cause because we don't have much information about the issue. Anyway, this was just a micro optimization that actually breaks, at least, one app almost one year later. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105436 Cc: <[email protected]> Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* anv: silence unused variable warningLionel Landwerlin2018-03-151-7/+0
| | | | | | Fixes: 59b0ea0c748 ("anv: Stop returning VK_ERROR_INCOMPATIBLE_DRIVER") Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Rafael Antognolli <[email protected]>
* i965: silence unused function warningLionel Landwerlin2018-03-151-1/+1
| | | | | | | | | | [123/227] Compiling C object 'src/mesa/drivers/dri/i965/libi965_gen110@sta/genX_blorp_exec.c.o'. ../src/mesa/drivers/dri/i965/genX_blorp_exec.c:99:1: warning: ‘blorp_get_surface_base_address’ defined but not used [-Wunused-function] blorp_get_surface_base_address(struct blorp_batch *batch) ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Rafael Antognolli <[email protected]>
* anv: silence unused function warning on gen11Lionel Landwerlin2018-03-152-1/+3
| | | | | | | | | | [84/227] Compiling C object 'src/intel/vulkan/libanv_gen110@sta/genX_blorp_exec.c.o'. ../src/intel/vulkan/genX_blorp_exec.c:68:1: warning: ‘blorp_get_surface_base_address’ defined but not used [-Wunused-function] blorp_get_surface_base_address(struct blorp_batch *batch) ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Rafael Antognolli <[email protected]>
* meson: fix pipe-loaders after omx changesDylan Baker2018-03-151-3/+4
| | | | | | | | | | | | with_gallium_omx used to be a boolean, but now it's a string. That means it needs to be compared to 'disabled' instead of false. CC: Rob Clark <[email protected]> Fixes: 34e852d5b50772199797ea839fc8d6b3805633ff ("meson: Re-add auto option for omx") Signed-off-by: Dylan Baker <[email protected]> Tested-by: Rob Clark <[email protected] Reviewed-by: Eric Engestrom <[email protected]>
* meson: require amdgpu >= 2.4.91Dylan Baker2018-03-151-1/+1
| | | | | | the meson equivalent of f8773edb0a0cf5ff885cd3494717323983eedeed Reviewed-by: Marek Olšák <[email protected]>
* configure.ac: require libdrm_amdgpu 2.4.91Marek Olšák2018-03-151-9/+1
| | | | | | Since 2.4.90 is problematic, just ask for the next version. Reviewed-by: Emil Velikov <[email protected]>
* configure.ac: blacklist libdrm 2.4.90Marek Olšák2018-03-151-0/+8
| | | | | Cc: 18.0 17.3 17.2 <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* radv: dump LLVM IR when a hang is detectedSamuel Pitoiset2018-03-151-0/+1
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: record LLVM IR when debugging shadersSamuel Pitoiset2018-03-153-0/+12
| | | | | | | | If AMD_shader_info or RADV_TRACE_FILE is used we might need to keep trace of LLVM IR. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: add dump_shader to the NIR compiler optionsSamuel Pitoiset2018-03-154-22/+19
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: pass the NIR compiler options to ac_compile_llvm_module()Samuel Pitoiset2018-03-151-5/+7
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: print some information when RADV_TRACE_FILE is setSamuel Pitoiset2018-03-153-1/+9
| | | | | | | | Just to be sure all options are enabled when trying to generate a hang report. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: only display options that are enabledSamuel Pitoiset2018-03-151-12/+16
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* mailmap: Use Eric Engestrom's personal email addressEric Engestrom2018-03-151-0/+2
| | | | Signed-off-by: Eric Engestrom <[email protected]>
* spirv/radv: add AMD_gcn_shader capability, remove current extensionsAlejandro Piñeiro2018-03-154-10/+3
| | | | | | | | | | | | | | | | | | | | | | So now, during spirv_to_nir, it uses the capability instead of the extension. Note that we are really doing here is treating SPV_AMD_gcn_shader as other supported extensions. SPV_AMD_gcn_shader is not the first SPV extension supported. For example, the capability draw_parameters infers if the extension SPV_KHR_shader_draw_parameters is supported or not. This could be seen as counter-intuitive, and that it would be easier to define which extensions are supported, and based our checks on that, but we need to take into account that some capabilities are optional from core, and others came from new extensions. Also this commit would make the implementation of ARB_spirv_extensions easier. v2: AMD_gcn_shader capability renamed to gcn_shader (Daniel Schürmann) Reviewed-by: Daniel Schürmann <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* spirv: update arguments for vtn_nir_alu_op_for_spirv_opcode()Samuel Iglesias Gonsálvez2018-03-153-15/+15
| | | | | | | | | | | We don't need anymore the source and destination's data type, just their bitsize. v2: - Use glsl_get_bit_size () instead (Jason). Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* spirv: fix the translation of SPIR-V conversion opcodes to NIRSamuel Iglesias Gonsálvez2018-03-151-3/+37
| | | | | | | | | There are some SPIRV opcodes (like UConvert and SConvert) have some expectations of the output that doesn't depend on the operands data type. Generalize the solution of all of them. Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* vbo: Correctly handle source arrays in vbo_split_copy.Mathias Fröhlich2018-03-151-3/+5
| | | | | | | | | | | | The original approach did optimize away a bit too many fields. Restablish the pointer into the original array and correctly feed that one. Reviewed-by: Brian Paul <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105471 Fixes: 64d2a20480547d5897fd9d7b8fd306f2625138cb mesa: Make gl_vertex_array contain pointers to first order VAO members. Signed-off-by: Mathias Fröhlich <[email protected]>
* sched.h needs to be imported on Darwin/OSX targets.Apple SWE2018-03-141-0/+4
| | | | | | | | sched_yield is used but the include reference on Darwin is missing. This patch conditionally guards on Darwin/OSX to import sched.h first. Reviewed-by: Jeremy Huddleston Sequoia <[email protected]> Reviewed-by: Bruce Cherniak <[email protected]>
* Add processor topology calculation implementation for Darwin/OSX targets.Apple SWE2018-03-141-1/+55
| | | | | | | | | | | | The implementation for bootstrapping SWR on Darwin targets is based on the Linux version. Instead of reading the output of /proc/cpuinfo, sysctlbyname is used to determine the physical identifiers, processor identifiers, core counts and thread-processor affinities. With this patch, it is possible to use SWR as an alternate renderer on OSX to softpipe and llvmpipe. Reviewed-by: Jeremy Huddleston Sequoia <[email protected]> Reviewed-by: Bruce Cherniak <[email protected]>
* virgl: resize resource bo allocation if we need to.Dave Airlie2018-03-152-4/+12
| | | | | | | This fixes an illegal command buffer on the host seen with piglit arb_internalformat_query2-max-dimensions Signed-off-by: Dave Airlie <[email protected]>
* nv50,nvc0: Support BGRX1010102 and RGBX1010102 for sampling.Mario Kleiner2018-03-141-0/+2
| | | | | | | | | | | | | | | | | | | | | Add them as usable for textures, so they can be used by Wayland drm in 10 bpc mode and for X11 compositing under GLX and EGL. We need these formats to be supported at least for sampling, otherwise GLX_texture_from_pixmap and the equivalent EGL image extension won't work with X11 drawables of depth 30 and just display an all black window. Do not expose these formats as renderable, and thereby not as a fbconfig/EGLConfig/Visual, as NVidia hw does not support 10 bpc unorm formats without alpha channel. Tested under X11 + GLX/EGL + DRI2/DRI3 for compositing, and under Wayland+Weston drm backend with a Tesla and Pascal gpu. Signed-off-by: Mario Kleiner <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* util: Use set_foreach instead of rolling our ownThomas Helland2018-03-141-6/+2
| | | | | | This follows the same pattern as in the hash_table. Reviewed-by: Jason Ekstrand <jason.ekstrand at intel.com>
* glsl: Use hash table cloning in copy propagationThomas Helland2018-03-142-31/+15
| | | | | | | | | | Walking the whole hash table, inserting entries by hashing them first is just a really bad idea. We can simply memcpy the whole thing. V2: Remove leftover creation of acp in two places Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* util: Implement a hash table cloning functionThomas Helland2018-03-142-0/+24
| | | | | | | V2: Don't rzalloc; we are about to rewrite the whole thing (Vladislav) Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* st/mesa: Factorize duplicate code in st_BlitFramebuffer()Guillaume Charifi2018-03-141-50/+26
| | | | Signed-off-by: Marek Olšák <[email protected]>
* autotools: add -I/src/egl to tizoniaDylan Baker2018-03-141-0/+1
| | | | | | | | | | | | | | | | | | | This fixes the following build breakage: make[5]: Entering directory '/mnt/sdc1/Gits/mesa/src/gallium/state_trackers/omx/tizonia' CC h264dprc.lo In file included from h264dprc.c:45:0: ../../../../../src/egl/drivers/dri2/egl_dri2.h:47:10: fatal error: wayland/wayland-egl/wayland-egl-backend.h: No such file or directory #include "wayland/wayland-egl/wayland-egl-backend.h" ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ compilation terminated. meson got the same fix in 7598dedfde49391564cdb3d355e7bd98e1880782. Signed-off-by: Dylan Baker <[email protected]> Acked-by: Emil Velikov <[email protected]>
* Revert "Add processor topology calculation implementation for Darwin/OSX ↵Dylan Baker2018-03-141-55/+0
| | | | | | | | | | | | | targets." This reverts commit de0d10db93d85de79c7b4451c4851ace2976f8f4. This breaks the build on at least Linux, probably other non-apple platforms. Signed-off-by: Dylan Baker <[email protected]> Reviewed-by: Adam Jackson <[email protected]> Reviewed-by: Daniel Stone <[email protected]>
* Revert "sched.h needs to be imported on Darwin/OSX targets."Dylan Baker2018-03-141-4/+0
| | | | | | | | | | | This reverts commit 9dc5063262d0a5130cf0723a33079f3fd17560c3. This breaks the build on at least Linux, probably other non-apple platforms. Signed-off-by: Dylan Baker <[email protected]> Reviewed-by: Adam Jackson <[email protected]> Reviewed-by: Daniel Stone <[email protected]>
* compiler: int8/uint8 supportKarol Herbst2018-03-1416-0/+128
| | | | | | | | | | OpenCL kernels also have int8/uint8. v2: remove changes in nir_search as Jason posted a patch for that Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Rob Clark <[email protected]> Signed-off-by: Karol Herbst <[email protected]>
* radv: Fix CmdCopyImage between uncompressed and compressed imagesAlex Smith2018-03-141-6/+17
| | | | | | | | | | | | | | | | | From the spec: "When copying between compressed and uncompressed formats the extent members represent the texel dimensions of the source image and not the destination." However, as per 7b890a36, we must still use the destination image type when clamping the extent so that we copy the correct number of layers for 2D to 3D copies. Fixes: 7b890a36 "radv: Fix vkCmdCopyImage for 2d slices into 3d Images" Cc: <[email protected]> Signed-off-by: Alex Smith <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: fix vkGetDeviceQueue2() when create flags don't matchSamuel Pitoiset2018-03-142-2/+22
| | | | | | | | This fixes CTS: dEQP-VK.api.device_init.create_device_queue2_unmatched_flags Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* spirv: Handle doubles when multiplying a mat by a scalarNeil Roberts2018-03-141-3/+3
| | | | | | | | | | The code to handle mat multiplication by a scalar tries to pick either imul or fmul depending on whether the matrix is float or integer. However it was doing this by checking whether the base type is float. This was making it choose the int path for doubles (and presumably float16s). Reviewed-by: Jason Ekstrand <[email protected]>
* anv/entrypoints: VkGetDeviceProcAddr returns NULL for core instance commandsIago Toral Quiroga2018-03-141-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | af5f2322d0c64 addressed this for extension commands, but the spec mandates this behavior also for core API commands. From the Vulkan spec, Table 2. vkGetDeviceProcAddr behavior: device pname return ---------------------------------------------------------- (..) device core device-level command fp (...) See that it specifically states "device-level". Since the vk.xml file doesn't state if core commands are instance or device level, we identify device level commands as the ones that take a VkDevice, VkQueue or VkCommandBuffer as their first parameter. Fixes test failures in new work-in-progress CTS tests. Also see the public issue: https://github.com/KhronosGroup/Vulkan-LoaderAndValidationLayers/issues/2323 v2: - Include reference to github issue (Emil) - Rebased on top of Vulkan 1.1 changes. v3: - Remove the not in the condition and switch the then/else cases (Jason) Reviewed-by: Emil Velikov <[email protected]> (v1) Reviewed-by: Jason Ekstrand <[email protected]>
* anv/entrypoints: dispatches to VkQueue are device-levelIago Toral Quiroga2018-03-141-2/+7
| | | | | | | | v2: - Add trampoline functions (Jason) - Add an assertion for unhandled trampoline cases Reviewed-by: Jason Ekstrand <[email protected]>
* radv: drop assert on bindingDescriptorCount > 0Dave Airlie2018-03-141-1/+0
| | | | | | | | | | | The spec is pretty clear that this can be 0, and that it operates as a reserved binding. Fixes: dEQP-VK.binding_model.descriptor_update.empty_descriptor.uniform_buffer Reviewed-by: Samuel Pitoiset <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* sched.h needs to be imported on Darwin/OSX targets.Apple SWE2018-03-131-0/+4
| | | | | | | | sched_yield is used but the include reference on Darwin is missing. This patch conditionally guards on Darwin/OSX to import sched.h first. Reviewed-by: Jeremy Huddleston Sequoia <[email protected]> Signed-off-by: Jeremy Huddleston Sequoia <[email protected]>
* Add processor topology calculation implementation for Darwin/OSX targets.Apple SWE2018-03-131-0/+55
| | | | | | | | | | | | The implementation for bootstrapping SWR on Darwin targets is based on the Linux version. Instead of reading the output of /proc/cpuinfo, sysctlbyname is used to determine the physical identifiers, processor identifiers, core counts and thread-processor affinities. With this patch, it is possible to use SWR as an alternate renderer on OSX to softpipe and llvmpipe. Reviewed-by: Jeremy Huddleston Sequoia <[email protected]> Signed-off-by: Jeremy Huddleston Sequoia <[email protected]>
* r600: fix abs for op3 sourcesRoland Scheidegger2018-03-141-54/+56
| | | | | | | | | | | | | | | | | | | If a src was referencing the same temp as the dst, the per-component copy code didn't work. e.g. cndge r0.xy, r0.xx, |r2|, r3 got expanded into mov r12.x, |r2| cndge r0.x, r0.x, r12, r3 mov r12.y, |r2| cndge r0.y, r0.x, r12, r3 hence for the second cndge r0.x was mistakenly the previous cndge result. Fix this by doing all the movs first, so there's no bogus alu.last in between. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=102905 Tested-by: <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: mark all tess output for an indirect access.Dave Airlie2018-03-141-8/+13
| | | | | | | | | | | If a shader does a tcs store with an indirect access, we were only marking the first spot as used. For indirect access we always now mark all slots used by the variable. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105464 Fixes: 94f9591995 (radv/ac: add support for TCS/TES inputs/outputs.) Signed-off-by: Dave Airlie <[email protected]>
* ac/nir: pass the nir variable through tcs loading.Dave Airlie2018-03-144-22/+15
| | | | | | | | | | | | I was going to have to add another parameter to this monster, so we should just pass the nir_variable in, I can't find any reason this would be a bad idea. This needed for the next fix. Fixes: 94f9591995 (radv/ac: add support for TCS/TES inputs/outputs.) Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: get correct offset into LDS for indexed vars.Dave Airlie2018-03-141-1/+1
| | | | | | | | | | | | This seems more correct to me, since if we have an array of floats they'll be vec4 aligned, and if we do af[2], we want the const index to increase by 2 slots in the non compact case. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105464 Fixes: 94f9591995 (radv/ac: add support for TCS/TES inputs/outputs.) Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
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