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* radeonsi: fix an unused-variable warning in a release buildMarek Olšák2017-03-301-3/+1
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* vdpau: fix a maybe-uninitialized warningMarek Olšák2017-03-301-1/+1
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* softpipe: fix a maybe-uninitialized warningMarek Olšák2017-03-301-1/+1
| | | | | | /home/marek/dev/mesa-main/src/gallium/drivers/softpipe/sp_compute.c:178: warning: 'grid_size' may be used uninitialized in this function [-Wmaybe-uninitialized]
* gallivm: fix a maybe-uninitialized warningMarek Olšák2017-03-301-1/+1
| | | | | | | /home/marek/dev/mesa-main/src/gallium/auxiliary/gallivm/lp_bld_sample_soa.c:3598: warning: 'level' may be used uninitialized in this function [-Wmaybe-uninitialized] out1 = lp_build_cmp(&leveli_bld, PIPE_FUNC_GREATER, level, last_level); ^
* gallium/radeon: s/dcc_disable/disable_dcc/Marek Olšák2017-03-304-9/+9
| | | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Tested-by: Edmondo Tommasina <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* radeonsi: handle incompatible DCC formats in resource_copy_regionMarek Olšák2017-03-301-0/+5
| | | | | | | Required because of later commits. Reviewed-by: Nicolai Hähnle <[email protected]> Tested-by: Edmondo Tommasina <[email protected]>
* radeonsi: remove a workaround for inexact *8_SNORM blitsMarek Olšák2017-03-301-3/+1
| | | | | | | | All tests pass on Fiji now. This prevents DCC disablement due to incompatible DCC formats due to the fallback. Reviewed-by: Nicolai Hähnle <[email protected]> Tested-by: Edmondo Tommasina <[email protected]>
* gallium/radeon: add and use a new helper vi_dcc_enabledMarek Olšák2017-03-305-14/+16
| | | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Tested-by: Edmondo Tommasina <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* gallium/radeon: formalize that r600_query_hw_add_result doesn't need a contextMarek Olšák2017-03-303-8/+9
| | | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Tested-by: Edmondo Tommasina <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* radeonsi: don't make a copy of pipe_index_buffer in draw_vboMarek Olšák2017-03-301-32/+27
| | | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Tested-by: Edmondo Tommasina <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* gallium/util: use const in u_index_modify helpersMarek Olšák2017-03-302-6/+6
| | | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Tested-by: Edmondo Tommasina <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* winsys/amdgpu: remove AMDGPU_INFO_NUM_EVICTIONSSamuel Pitoiset2017-03-301-4/+0
| | | | | | | | This is now exposed with libdrm_amdgpu 2.4.76. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: add Vega10 PCI IDsMarek Olšák2017-03-301-0/+8
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeon/uvd: set correct vega10 db pitch alignmentBoyuan Zhang2017-03-301-4/+12
| | | | | | | | Create new function to get correct alignment based on Asics, and change the corresponding decode message buffer and dpb buffer size calculations Signed-off-by: Boyuan Zhang <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeon/vce: add vce support for firmware 53.19.4Leo Liu2017-03-301-0/+6
| | | | | | | v2: squashed with other similar commits Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeon/vce: adapt gfx9 surface to vceLeo Liu2017-03-302-15/+51
| | | | | | Signed-off-by: Leo Liu <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]>
* winsys/surface: add height pitch for gfx9Leo Liu2017-03-302-0/+2
| | | | | Signed-off-by: Leo Liu <[email protected]> Acked-by: Alex Deucher <[email protected]>
* radeon/uvd: clear message buffer when reuseLeo Liu2017-03-301-1/+2
| | | | | | | | As required by firmware Signed-off-by: Leo Liu <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeon/uvd: adapt gfx9 surface to uvdLeo Liu2017-03-306-56/+106
| | | | | | Signed-off-by: Leo Liu <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeon/uvd: add uvd soc15 registerLeo Liu2017-03-302-4/+27
| | | | | | Signed-off-by: Leo Liu <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeonsi/gfx9: disable features that don't workMarek Olšák2017-03-304-5/+15
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: only allow GL 3.1Marek Olšák2017-03-301-0/+5
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: add linear address computations for texture transfersMarek Olšák2017-03-301-20/+53
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: don't generate LS and ES statesMarek Olšák2017-03-301-24/+46
| | | | | | these shaders don't exist on GFX9 Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: SPI_SHADER_USER_DATA changesMarek Olšák2017-03-301-11/+34
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* winsys/amdgpu: set/get BO tiling flags for GFX9Marek Olšák2017-03-301-2/+4
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: handle pitch and offset overrides for texture_from_handleMarek Olšák2017-03-301-11/+18
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: set/validate GFX9 BO metadataMarek Olšák2017-03-302-1/+24
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: add radeon_surf.gfx9.surf_offsetMarek Olšák2017-03-305-1/+7
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: don't write mipmap level offsets to BO metadataMarek Olšák2017-03-301-3/+6
| | | | | | GFX9 doesn't have (usable) mipmap offsets. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: flush CB & DB caches with an EOP TS eventMarek Olšák2017-03-301-23/+84
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: use ACQUIRE_MEMMarek Olšák2017-03-301-6/+17
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: only use CE RAM for most-used descriptorsMarek Olšák2017-03-302-5/+23
| | | | | | because the CE RAM size decreased to 4 KB. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: emit FLUSH_DFSM where requiredMarek Olšák2017-03-302-0/+18
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: emit BREAK_BATCH in emit_framebuffer_stateMarek Olšák2017-03-301-0/+5
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: fix MIP0_WIDTH & MIP0_HEIGHT for compressed texture blitsMarek Olšák2017-03-306-10/+26
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: fix textureSize/imageSize for 1D texturesMarek Olšák2017-03-301-25/+32
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: add a workaround for 1D depth texturesMarek Olšák2017-03-304-30/+86
| | | | | | The same workaround is used by Vulkan. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: enable clamping for Z UNORM formats promoted to Z32FMarek Olšák2017-03-301-1/+11
| | | | | | so that shaders don't have to do it. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: image descriptor changes in mutable fieldsMarek Olšák2017-03-303-23/+73
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: FMASK image descriptor changesMarek Olšák2017-03-301-21/+48
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: image descriptor changes in immutable fieldsMarek Olšák2017-03-303-5/+60
| | | | | | | The border color swizzle logic was copied from Vulkan. It doesn't make any sense to me, but it passes all piglits except the stencil ones. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: DB changesMarek Olšák2017-03-302-94/+176
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: CB changesMarek Olšák2017-03-302-52/+125
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: do DCC clears on non-mipmapped textures onlyMarek Olšák2017-03-302-4/+17
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: update can_sample_z/s flagsMarek Olšák2017-03-301-2/+7
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: pass correct parameters to buffer_get_handleMarek Olšák2017-03-301-6/+14
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: update si_set_optimal_micro_tile_modeMarek Olšák2017-03-301-6/+38
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: don't check array_mode for allowing TC-compatible HTILEMarek Olšák2017-03-301-1/+2
| | | | | | GFX9 supports this with all modes except linear. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: update HTILE/CMASK/FMASK allocatorsMarek Olšák2017-03-301-1/+15
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-29 19:26:48 +0000