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* i965/fs: Dynamically set up the WM binding table offsets.Eric Anholt2013-10-153-43/+35
| | | | Reviewed-by: Paul Berry <[email protected]>
* i965: Make a brw_stage_prog_data for storing the SURF_INDEX information.Eric Anholt2013-10-1519-115/+161
| | | | | | | | | | | It would be nice to be able to pack our binding table so that programs that use 1 render target don't upload an extra BRW_MAX_DRAW_BUFFERS - 1 binding table entries. To do that, we need the compiled program to have information on where its surfaces go. v2: Rename size to size_bytes to be more explicit. Reviewed-by: Paul Berry <[email protected]>
* i965: Always have the struct gl_program * in the backend visitor.Eric Anholt2013-10-154-14/+15
| | | | | | | vec4 already had it, so put it in the FS, too. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* i965: Drop a couple of unused defines.Eric Anholt2013-10-151-3/+0
| | | | | Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* i965: Remove dead arguments from prog_data_compare.Eric Anholt2013-10-158-17/+8
| | | | | Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* build: remove forced -fno-rttiAlexander von Gluck IV2013-10-143-10/+0
| | | | | | | | | | | | | | | | | | | | | | | | * As discussed on the mailing list, forced no-rtti breaks C++ public API's such as the Haiku C++ libGL.so * -fno-rtti *can* be still set however instead of blindly forcing -fno-rtti, we can rely on the llvm-config --cppflags output. If the system llvm is built without rtti (default), the no-rtti flag will be present in llvm-config --cppflags (which we pick up on) If llvm is built with rtti (REQUIRES_RTTI=1), then -fno-rtti is removed from llvm-config --cppflags. * We could selectively add / remove rtti from various components, however mixing rtti and non-rtti code is tricky and could introduce missing symbols. * This needs impact tested. Reviewed-by: Francisco Jerez <[email protected]>
* configure.ac: Don't check for awk, grep, nm.Matt Turner2013-10-141-12/+0
| | | | Not used since d53901c6.
* configure.ac: Don't check for cross compiling.Matt Turner2013-10-141-2/+0
| | | | Dead since c845140a.
* i965: Don't copy prop source mods into instructions that can't take them.Matt Turner2013-10-144-0/+26
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* mesa: Add missing switch break in invalidate_framebuffer_storage()Constantin Baranov2013-10-141-0/+1
| | | | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=70411 Cc: "9.2" <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* st/vdpau: add format conversions for GetBitsYCbCrGrigori Goronzy2013-10-131-8/+117
| | | | | | | | Add simple plain C routines for NV12<->YV12 and YUYV<->UYVY conversions. The NV12->YV12 conversion is commonly used, for instance by VLC. Reviewed-by: Christian König <[email protected]>
* radeon: use staging for mapping linear texturesGrigori Goronzy2013-10-131-0/+6
| | | | | | | | Textures that likely reside in VRAM, are mapped for reading and don't require direct mapping should be staged into GTT, to avoid bad performance. This fixes readback performance of VDPAU surfaces. Reviewed-by: Marek Olšák <[email protected]>
* radeon/uvd: use PIPE_BIND_LINEAR for video surfacesGrigori Goronzy2013-10-132-7/+7
| | | | | | | This new bind flag forces linear storage, but does not have other side effects like R600_RESOURCE_FLAG_TRANSFER. Reviewed-by: Christian König <[email protected]>
* radeonsi: Allow Sinking pass to move preloaded const/res/samplVincent Lejeune2013-10-132-5/+28
| | | | | This fixes a crash in Unigine Heaven 3.0, and probably in some others apps.
* radeonsi: pass alpha_ref value to PS in the user sgprVadim Girlin2013-10-133-25/+29
| | | | | | | | | | | | Currently it's hardcoded in the shader, so every change requires compilation of the shader variant, killing the performance in Serious Sam 3 and probably other apps. This patch passes alpha_ref in the user sgpr and removes it from the shader key. Signed-off-by: Vadim Girlin <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* r600g: fix tgsi_op2_s with trans-only instructionsVadim Girlin2013-10-131-5/+31
| | | | | | | | | | | | | | | | | | This fixes the issue when dst and src is the same reg and operation on one channel overwrites the source for other channels, e.g.: UMUL TEMP[2].xyz, TEMP[0].xyzz, TEMP[2].xxxx In this example the result of the operation on channel x is written in TEMP[2].x and then used as a second source operand for channels y and z instead of original value in TEMP[2].x. This patch stores the results in temp reg and moves them to dst after performing operation on all channels. Fixes https://bugs.freedesktop.org/show_bug.cgi?id=70327 Signed-off-by: Vadim Girlin <[email protected]>
* i965: Merge intel_context.h into brw_context.h.Kenneth Graunke2013-10-132-172/+120
| | | | | | | | v2: Keep the random 32-bit only version of memcpy, since Ian says I can't delete it without data proving it isn't useful. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Delete our copy of likely/unlikely macros.Kenneth Graunke2013-10-131-10/+0
| | | | | | | | brw_context.h includes imports.h which includes compiler.h which already defines these. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* mesa: Move U_FIXED/S_FIXED macros from i965 to macros.h.Kenneth Graunke2013-10-133-39/+22
| | | | | | | | | | | | | | | | | These make it easy to convert a floating point value to a fixed point numbers. The second parameter is the number of bits used for the fractional part of the number. It looks like core Mesa has similar functions already, but none that allows an arbitrary number of fractional bits. The more generic version is probably useful to everyone. r600g apparently has an identical copy of the S_FIXED macro, but doesn't include this file. I'm not sure what to do about that, so I'm just going to leave it for now. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* mesa: Move ROUND_DOWN_TO() macro from i915/i965 to macros.h.Kenneth Graunke2013-10-132-13/+12
| | | | | | | | | | This seems generally useful, so it may as well live in core Mesa. In fact, the comment for ALIGN() in macros.h actually says to "see also" ROUND_DOWN_TO, which...was in a driver somewhere. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Move need_workaround_flush = true to intel_batchbuffer_init.Kenneth Graunke2013-10-132-2/+2
| | | | | | | | intel_batchbuffer_init() sets up initial batchbuffer state; it seems like a reasonable place to initialize this flag. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Move DriverFlag initialization to brw_init_state().Kenneth Graunke2013-10-132-4/+5
| | | | | | | | Configuring which dirty flags we want sounds like a job for brw_init_state(). Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Merge intelInitContext into brwCreateContext.Kenneth Graunke2013-10-132-83/+43
| | | | | | | The split here was completely arbitrary. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Move viewport driver hook setup to brw_init_driver_functions.Kenneth Graunke2013-10-131-12/+12
| | | | | Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Make brwInitFunctions take brw_context rather than intel_screen.Kenneth Graunke2013-10-131-6/+6
| | | | | | | | | | | | It actually just wants generation checking, and brw->gen is the usual way of doing that. In the future, we'll also want to check brw->hw_ctx, which isn't available from the screen. While we're changing the function signature, convert from camel case to our usual naming conventions. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Merge intelInitFunctions() and brwInitFunctions().Kenneth Graunke2013-10-131-10/+3
| | | | | | | They do exactly the same thing. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Merge intel_context.c into brw_context.c.Kenneth Graunke2013-10-133-730/+685
| | | | | | | | | | | There's no point in having two files for context functions. This patch moves the code from intel_context.c into brw_context.c unmodified (other than whitespace fixes). Right now, this looks silly; future patches will merge functions and tidy things up. Signed-off-by: Kenneth Graunke <[email protected]>
* i965: Move memset of TextureFormatSupported to brw_init_surface_formats.Kenneth Graunke2013-10-132-3/+2
| | | | | | | | brw_init_surface_formats already sets entries in TextureFormatsSupported to true; it may as well take care of initializing it to false too. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Remove has_aa_line_parameters.Kenneth Graunke2013-10-133-3/+5
| | | | | | | | This flag is only used in one place, and is only set on one platform. Just check for original Gen4 in the relevant function. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Move state setup from brwCreateContext to brw_init_state().Kenneth Graunke2013-10-132-8/+8
| | | | | | | This seems like a better place for it, and helps clean up brwCreateContext (which is full of a lot of random stuff). Signed-off-by: Kenneth Graunke <[email protected]>
* i965: Remove the brw_context::emit_state_always flag.Kenneth Graunke2013-10-133-5/+2
| | | | | | | | This was always set to false, and is only used for debugging. To enable it, simply change the if (0) block and recompile. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Move hardware feature flags to brw_device_info.Kenneth Graunke2013-10-133-4/+18
| | | | | Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Move device quirks to brw_device_info.Kenneth Graunke2013-10-133-8/+27
| | | | | Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Move hardware limits to brw_device_info.Kenneth Graunke2013-10-133-83/+117
| | | | | | | | | Since each kind of device has its own brw_device_info structure, we can simply store the URB and thread limits there. This eliminates all the large if-ladders, and simplifies the context initialization code quite a bit. Signed-off-by: Kenneth Graunke <[email protected]>
* i965: Replace some intel_screen fields with brw_device_info references.Kenneth Graunke2013-10-134-62/+22
| | | | | Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Delete the INTEL_SEPARATE_STENCIL override.Kenneth Graunke2013-10-131-27/+0
| | | | | | | | | This option was useful during initial development, but it's been ages since I've heard of anyone using it. Plus, Gen7+ mandates separate stencil, so it was really only useful on Sandybridge anyway. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Add a new brw_device_info structure.Kenneth Graunke2013-10-136-0/+150
| | | | | | | | | | | | | | | The idea is that struct brw_device_info should store statically-known information about hardware features. Using the new family name in the PCI ID table, we can easily grab the right structure. This is basically the equivalent of intel_device_info in the kernel. This patch also makes the new structure available from intel_screen, but nothing uses it. Right now, it looks very redundant with existing fields, but that will change. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Add the family name to the PCI ID table.Kenneth Graunke2013-10-133-95/+95
| | | | | | | | I removed this a while ago, since we never used it, but I'm finally resurrecting the idea in the next commits. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Remove #define name from PCI ID table.Kenneth Graunke2013-10-133-95/+95
| | | | | | | | | | Nothing uses the #define name, and it's not terribly useful - the numerical ID serves the same purpose. The only thing we could really do with it is generate slightly prettier preprocessed code. But who looks at that? Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Pull most driconf option handling into a centralized function.Kenneth Graunke2013-10-132-47/+61
| | | | | | | | | | | | | Using a helper function clarifies the context initialization code. I would've liked to completely centralize it, but moving the optionCache code from intelInitExtensions into here would've required setting flags in the context, which seems like a waste. v2: Rebase for the introduction of disable_derivative_optimization. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Move a bunch of code from intelInitContext to brwCreateContext.Kenneth Graunke2013-10-132-50/+44
| | | | | | | | | | | | Now that intelInitContext isn't shared between i915 and i965, the split is fairly arbitrary. This patch moves a bunch of the basic context creation and generation checking code up to the top-level function (and slightly earlier). More will follow. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Update the comment about viewport hacks.Kenneth Graunke2013-10-131-1/+7
| | | | | | | It wasn't clear that this was necessary for EGL, or why. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Pull out INTEL_DEBUG handling into new intel_debug.[ch] files.Kenneth Graunke2013-10-135-128/+200
| | | | | | | | | | | | | Now that there isn't an intel_context structure, the split between brw_context.[ch] and intel_context.[ch] is rather awkward and arbitrary. Removing intel_context.[ch] seems desirable, but not everything really belongs in brw_context.[ch], either. Moving INTEL_DEBUG handling into separate intel_debug.[ch] files should make them relatively easy to find. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Rename brwCreateContext's error parameter to dri_ctx_error.Kenneth Graunke2013-10-131-3/+3
| | | | | | | | "error" is a very generic name. dri_ctx_error is the name used in intelInitContext(), which is more specific. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* dri: Move i965-specific context flag logic to dri common.Eric Anholt2013-10-132-8/+9
| | | | | Nobody else yet can do a forward context anyway, but others should be able to do debug contexts, and those would have just had no effect currently.
* i915g: Fix assertStephane Marchesin2013-10-121-1/+1
| | | | | | Now that we support start, assert on start + num < max samplers Reported by xexaxo
* mesa: Bump version to 10.0.0.Paul Berry2013-10-123-9/+9
| | | | | | | | | | | Mesa now supports OpenGL 3.2 and GLSL 1.50, so bump the Mesa major version from 9 to 10 to reflect this. Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Chris Forbes <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* mesa: Remove warning that geometry shader support is experimental.Paul Berry2013-10-121-6/+0
| | | | | | | | | | | | Geometry shader support is now working well, and adequately piglit tested. There are just a few piglit failures left to fix. So there's no need for an "experimental" warning anymore. Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Chris Forbes <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* i965: Turn on GLSL 1.50 and GL 3.2 support for i965 gen7.Paul Berry2013-10-122-2/+4
| | | | | | | | | | | | Geometry shaders were the last thing we needed to finish before turning on GLSL 1.50 and GL 3.2 support. They are now working well, with just a few piglit failures left to fix. Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Chris Forbes <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* radeon/llvm: show LLVM disassembly when availableJay Cornwall2013-10-123-1/+9
| | | | | | | | With code dump enabled LLVM may generate disassembly during compilation. Show this disassembly when available and prefer it to SI bytecode dump. Reviewed-by: Tom Stellard <[email protected]> Signed-off-by: Jay Cornwall <[email protected]>
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