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* i965/blorp/gen6: Simplify hiz surface setupTopi Pohjolainen2017-01-271-6/+4
| | | | | | | | | | | | In intel_hiz_miptree_buf_create() intel_miptree_aux_buffer::bo is unconditionally initialised to point to the same buffer object as hiz_mt does. Also intel_miptree_aux_buffer::offset is initialised to zero (calloc()). This will make following patches significantly simpler to read. Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965/gen6: Remove check for stencil formatTopi Pohjolainen2017-01-271-14/+8
| | | | | | | | There are is no alternative. Reviewed-by: Samuel Iglesias Gons\341lvez <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965: Remove check for hiz on earlier gens than SNBTopi Pohjolainen2017-01-272-22/+2
| | | | | | | | | | | | Only caller, brw_workaround_depthstencil_alignment(), returns early for gen6+. While at it, reduce scope for brw_get_depthstencil_tile_masks() as well. Reviewed-by: Samuel Iglesias Gons\341lvez <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965/miptree: Remove redundant check for null textureTopi Pohjolainen2017-01-271-6/+1
| | | | | | | | | There exact same check earlier in brw_miptree_layout() which intel_miptree_create_layout() in turn calls unconditionally. Reviewed-by: Samuel Iglesias Gons\341lvez <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965/miptree: Tell when brw_miptree_layout() failsTopi Pohjolainen2017-01-273-7/+10
| | | | | | | | In addition, let intel_miptree_create_layout() release the miptree - it is the allocator. Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965/meta: Remove unused brw_get_rb_for_slice()Topi Pohjolainen2017-01-272-49/+0
| | | | | | Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Samuel Iglesias Gons<C3><A1>lvez <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* clover: Fix build against clang SVN >= r293097Michel Dänzer2017-01-271-1/+8
| | | | Reviewed-by: Francisco Jerez <[email protected]>
* vc4: Use NEON to speed up utile stores on Pi2+.cros-mesa-17.1.0-r2-vanillacros-mesa-17.1.0-r1-vanillachadv/cros-mesa-17.1.0-r2-vanillachadv/cros-mesa-17.1.0-r1-vanillaEric Anholt2017-01-261-5/+50
| | | | Improves 1024x1024 TexSubImage2D by 41.2371% +/- 3.52799% (n=10).
* vc4: Use NEON to speed up utile loads on Pi2.Eric Anholt2017-01-263-18/+115
| | | | | | | | | | | | | | | | | | | We had a lot of memcpy call overhead because gpu_stride wasn't being inlined. But if you split out the stride==8 and stride==16 cases like this code does while still using memcpy, you'd no longer have glibc's NEON memcpy applied at which point we'd be doing 16 uncached reads instead of 64/(NEON memcpy granularity), for about a 30% performance hit. By hand writing the assembly, we can get a whole cacheline loaded at a time. Unfortunately, NEON intrinsics turned out to be unusable -- they didn't have the vldm instruction available. Note that, for now, the NEON code is only enabled when building for ARMv7 (Pi 2+). We may want to do runtime detection for the Raspbian case, in the future. Improves 1024x1024 GetTexImage by 208.256% +/- 7.07029% (n=10).
* vc4: Move LT tiling code to a separate file.Eric Anholt2017-01-264-80/+122
| | | | This paves the way for building it twice, with NEON assembly or not.
* vc4: Use unreachable() in an unreachable codepath for tiling.Eric Anholt2017-01-261-4/+2
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* gallium/radeon: add VRAM-vis-usage HUD querySamuel Pitoiset2017-01-265-0/+14
| | | | | | | | | | This new query returns the current visible usage of VRAM accessed by the CPU. It will return 0 on radeon because it's unimplemented. Signed-off-by: Samuel Pitoiset <[email protected]> Tested-by: Edmondo Tommasina <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: query the CPU accessible size of VRAMSamuel Pitoiset2017-01-264-1/+13
| | | | | | | | | | R600_DEBUG="info" can be used to display that size, as well as the total amount of VRAM/GTT. Signed-off-by: Samuel Pitoiset <[email protected]> Tested-by: Edmondo Tommasina <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* mesa: Arrange validate_uniform_parameters parameters to match call sitesIan Romanick2017-01-261-11/+11
| | | | | | | | | | | | | | | Saves a measly 20 bytes on IA32 and nothing on x64. Depending on exactly when this is applied, a lot of variation is possible due to function alignment. text data bss dec hex filename 6670131 228340 22552 6921023 699b3f lib/i965_dri.so before 6670111 228340 22552 6921003 699b2b lib/i965_dri.so after 6342932 293872 29880 6666684 65b9bc lib64/i965_dri.so before 6342932 293872 29880 6666684 65b9bc lib64/i965_dri.so after Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* mesa: Arrange _mesa_uniform parameters to match the call sitesIan Romanick2017-01-263-106/+102
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | By putting the parameters first that match the parameters to the call site, 4 (of 14) instructions are saved at _mesa_Uniform4fv on x64. On IA32, the details of the instructions change, but it is the same count and mix of instructions. Before: 0000000000000830 <_mesa_Uniform4fv>: 830: 48 83 ec 10 sub $0x10,%rsp 834: 49 89 d0 mov %rdx,%r8 837: 48 8b 15 00 00 00 00 mov 0x0(%rip),%rdx # 83e <_mesa_Uniform4fv+0xe> 83e: 89 f8 mov %edi,%eax 840: 89 f1 mov %esi,%ecx 842: 41 b9 02 00 00 00 mov $0x2,%r9d 848: 64 48 8b 3a mov %fs:(%rdx),%rdi 84c: 48 8b 97 c8 01 02 00 mov 0x201c8(%rdi),%rdx 853: 48 8b 72 70 mov 0x70(%rdx),%rsi 857: 6a 04 pushq $0x4 859: 89 c2 mov %eax,%edx 85b: e8 00 00 00 00 callq 860 <_mesa_Uniform4fv+0x30> 860: 48 83 c4 18 add $0x18,%rsp 864: c3 retq After: 00000000000007f0 <_mesa_Uniform4fv>: 7f0: 48 83 ec 10 sub $0x10,%rsp 7f4: 48 8b 05 00 00 00 00 mov 0x0(%rip),%rax # 7fb <_mesa_Uniform4fv+0xb> 7fb: 41 b9 02 00 00 00 mov $0x2,%r9d 801: 64 48 8b 08 mov %fs:(%rax),%rcx 805: 48 8b 81 c8 01 02 00 mov 0x201c8(%rcx),%rax 80c: 6a 04 pushq $0x4 80e: 4c 8b 40 70 mov 0x70(%rax),%r8 812: e8 00 00 00 00 callq 817 <_mesa_Uniform4fv+0x27> 817: 48 83 c4 18 add $0x18,%rsp 81b: c3 retq Saves a measly 416 bytes of text on x64. Depending on exactly when this is applied, a lot of variation is possible due to function alignment. text data bss dec hex filename 6670131 228340 22552 6921023 699b3f lib/i965_dri.so before 6670131 228340 22552 6921023 699b3f lib/i965_dri.so after 6343348 293872 29880 6667100 65bb5c lib64/i965_dri.so before 6342932 293872 29880 6666684 65b9bc lib64/i965_dri.so after There is likely to be no performance change with just this patch. _mesa_uniform immediately calls validate_uniform_parameters with parameters in the "wrong" (different from the call site) order. v2: Rebase on GL_ARB_gpu_shader_fp64. v3: Rebase on GL_ARB_gpu_shader_int64. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* mesa: Arrange _mesa_uniform_matrix parameters to match the call sitesIan Romanick2017-01-263-64/+71
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | By putting the parameters first that match the parameters to the call site, 4 (of 16) instructions are saved at _mesa_UniformMatrix4fv on x64. On IA32, the details of the instructions change, but it is the same count and mix of instructions. Before: 0000000000001380 <_mesa_UniformMatrix4fv>: 1380: 48 83 ec 10 sub $0x10,%rsp 1384: 48 8b 05 00 00 00 00 mov 0x0(%rip),%rax # 138b <_mesa_UniformMatrix4fv+0xb> 138b: 41 89 f8 mov %edi,%r8d 138e: 41 89 f1 mov %esi,%r9d 1391: 0f b6 d2 movzbl %dl,%edx 1394: 64 48 8b 38 mov %fs:(%rax),%rdi 1398: 48 8b b7 c8 01 02 00 mov 0x201c8(%rdi),%rsi 139f: 48 8b 76 70 mov 0x70(%rsi),%rsi 13a3: 68 06 14 00 00 pushq $0x1406 13a8: 51 push %rcx 13a9: 52 push %rdx 13aa: b9 04 00 00 00 mov $0x4,%ecx 13af: ba 04 00 00 00 mov $0x4,%edx 13b4: e8 00 00 00 00 callq 13b9 <_mesa_UniformMatrix4fv+0x39> 13b9: 48 83 c4 28 add $0x28,%rsp 13bd: c3 retq After: 0000000000001360 <_mesa_UniformMatrix4fv>: 1360: 48 83 ec 10 sub $0x10,%rsp 1364: 48 8b 05 00 00 00 00 mov 0x0(%rip),%rax # 136b <_mesa_UniformMatrix4fv+0xb> 136b: 0f b6 d2 movzbl %dl,%edx 136e: 64 4c 8b 00 mov %fs:(%rax),%r8 1372: 49 8b 80 c8 01 02 00 mov 0x201c8(%r8),%rax 1379: 68 06 14 00 00 pushq $0x1406 137e: 6a 04 pushq $0x4 1380: 6a 04 pushq $0x4 1382: 4c 8b 48 70 mov 0x70(%rax),%r9 1386: e8 00 00 00 00 callq 138b <_mesa_UniformMatrix4fv+0x2b> 138b: 48 83 c4 28 add $0x28,%rsp 138f: c3 retq Saves a measly 576 bytes of text on x64. text data bss dec hex filename 6670131 228340 22552 6921023 699b3f lib/i965_dri.so before 6670131 228340 22552 6921023 699b3f lib/i965_dri.so after 6343924 293872 29880 6667676 65bd9c lib64/i965_dri.so before 6343348 293872 29880 6667100 65bb5c lib64/i965_dri.so after v2: Rebase on GL_ARB_gpu_shader_fp64. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* mesa: Trivial clean-ups in uniform_query.cppIan Romanick2017-01-261-8/+4
| | | | | | | | | This is C++, so we can mix code and declarations. Doing so allows constification. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Plamena Manolova <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* spirv: handle undefined components for OpVectorShuffleLionel Landwerlin2017-01-261-15/+38
| | | | | | | | | | Fixes: dEQP-VK.spirv_assembly.instruction.compute.opspecconstantop.vector_related dEQP-VK.spirv_assembly.instruction.graphics.opspecconstantop.vector_related* Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Cc: "17.0 13.0" <[email protected]>
* spirv: handle OpUndef as part of the variable parsing passLionel Landwerlin2017-01-262-0/+7
| | | | | | | | | | | | | | | | | | | | | Looking at the following bit of SPIRV shader : ... %zero = OpConstant %i32 0 %ivec3_0 = OpConstantComposite %ivec3 %zero %zero %zero %vec3_undef = OpUndef %ivec3 %sc_0 = OpSpecConstant %i32 0 %sc_1 = OpSpecConstant %i32 0 %sc_2 = OpSpecConstant %i32 0 ... Our compiler currently stops parsing variables & types on the OpUndef and switches to instructions, leaving the following sc_[0-2] variables untreated. Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Cc: "17.0 13.0" <[email protected]>
* anv: fix descriptor pool internal size allocationLionel Landwerlin2017-01-261-4/+4
| | | | | | | | | | | | | | | The size of the pool is slightly smaller than the size of the structure containing the whole pool. We need to take that into account on when setting up the internals. Fixes a crash due to out of bound memory access in: dEQP-VK.api.descriptor_pool.out_of_pool_memory v2: Drop debug traces (Lionel) Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Cc: "17.0 13.0" <[email protected]>
* i965: Make intelEmitCopyBlit not truncate large strides.Kenneth Graunke2017-01-262-11/+7
| | | | | | | | | | | | | | | | | | | When trying to blit larger tiled surfaces, the pitch can be larger than 32768 bytes, which means it won't fit in a GLshort. Passing it in will truncate the stride to 0, which has...surprising results. The pitch can be up to 32,768 DWords, or 128kB. We measure it in bytes, but divide by 4 when programming it. So we need to handle values up to 131,072. Switch from GLshort to int32_t to avoid the truncation. Fixes GL45-CTS.gtf30.GL3Tests.depth_texture.depth_texture_copyteximage at widths greater than 8192. v2: Use int32_t as negative values can be used (Jason). Cc: "17.0" <[email protected]> Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Use a UW source type for CS_OPCODE_CS_TERMINATE.Kenneth Graunke2017-01-261-1/+1
| | | | | | | | | | | | SIMD16 compute shaders use a send(16) with mlen 1 for the EOT message, using a source of g127 for the single register. With a UD type, this supposedly could read g128, which doesn't exist, causing the simulator to get cranky. Use a UW type to avoid this. Cc: "17.0" <[email protected]> Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Francisco Jerez <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* anv/lower_input_attachments: honor sample index parameter to subpassLoad()Iago Toral Quiroga2017-01-261-4/+1
| | | | | | | | | | | | | | | | | According to GL_KHR_vulkan_glsl, the signature of subpassLoad() is: gvec4 subpassLoad(gsubpassInput subpass); gvec4 subpassLoad(gsubpassInputMS subpass, int sample); So the multisampled case always receives an explicit sample index that we should use. The current implementation was ignoring this parameter and using gl_SampleID value instead. Fixes: dEQP-VK.pipeline.multisample_shader_builtin.sample_id.* Reviewed-by: Jason Ekstrand <[email protected]> Cc: "17.0" <[email protected]>
* i965: Fix fast depth clears for surfaces with a dimension of 16384.Kenneth Graunke2017-01-251-0/+12
| | | | | | | | | | | | | | I hadn't bothered to set this bit because I figured it would just paper over us getting the rectangle wrong. But it turns out that there is a legitimate reason to use it, so let's do so. The alternative would be to chop up 16k clears to multiple 8k clears, which is pointlessly painful. Cc: "17.0" <[email protected]> Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Anuj Phogat <[email protected]> Reviewed-by: Nanley Chery <[email protected]>
* anv: Implement VK_KHR_get_physical_device_properties2Chad Versace2017-01-253-0/+161
| | | | | Reviewed-by: Jason Ekstranad <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* anv: Refactor anv_GetPhysicalDeviceQueueFamilyProperties()Chad Versace2017-01-251-9/+17
| | | | | | | | | Add a helper function, anv_get_queue_family_properties(), which fills the struct. This patch reduces churn in the following patch that implements vkGetPhysicalDeviceQueueFamilyProperties2KHR. Reviewed-by: Jason Ekstranad <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* anv: Refactor anv_GetPhysicalDeviceFormatProperties()Chad Versace2017-01-251-28/+49
| | | | | | | | | | Add a helper function, anv_get_image_format_properties(), which does all the work and has a VkPhysicalDeviceImageFormatInfo2KHR parameter. This patch reduces churn in the following patch that implements vkGetPhysicalDeviceImageFormatProperties2KHR. Reviewed-by: Jason Ekstranad <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* anv: Revive struct anv_commonChad Versace2017-01-251-0/+5
| | | | | | | | | | | | | | | | | The struct was deleted by: commit efe9d1cde3340d3a9d17e5560b609a4fb839d43d Author: Edward O'Callaghan <[email protected]> Subject: anv: Clean up some unused variables Unlike the original anv_common, the new one has a non-const pNext pointer because we will use it for the output structs of VK_KHR_get_physical_device_properties2. v2: - Retype pNext from void* to struct anv_common*. Reviewed-by: Jason Ekstranad <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* anv: Define macro anv_debug()Chad Versace2017-01-251-0/+2
| | | | | | | | This is a printf-like macro that prints a debug message to stderr when built with DEBUG. If no DEBUG, then do nothing. Reviewed-by: Jason Ekstranad <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* mesa: Fix copy-and-paste bug in _mesa_(Program|)Uniform[1234](i|ui)64vARB ↵Ian Romanick2017-01-251-16/+16
| | | | | | | | | | | | | | | | | | | | | functions All of the functions were passing 1 to _mesa_uniform instead of passing count. Fixes 16 unsed parameter warnings like: main/uniforms.c: In function ‘_mesa_Uniform1i64vARB’: main/uniforms.c:1692:47: warning: unused parameter ‘count’ [-Wunused-parameter] _mesa_Uniform1i64vARB(GLint location, GLsizei count, const GLint64 *value) ^~~~~ This is why I build with extra warnings enabled. Unfortunately, there are so many unused parameter warnings in Mesa that I didn't notice these added warnings for over 6 months. :( Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* spirv: bump headers to SPIRV 1.1Lionel Landwerlin2017-01-253-9/+86
| | | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* spirv: add default handler for new enumsLionel Landwerlin2017-01-252-0/+15
| | | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* spirv: fix typosLionel Landwerlin2017-01-251-3/+3
| | | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv: set command buffer to NULL when allocations failLionel Landwerlin2017-01-251-1/+4
| | | | | | | | | | | | | | | | | | The spec section 5.2 says: "vkAllocateCommandBuffers can be used to create multiple command buffers. If the creation of any of those command buffers fails, the implementation must destroy all successfully created command buffer objects from this command, set all entries of the pCommandBuffers array to VK_NULL_HANDLE and return the error." Fixes: dEQP-VK.api.object_management.alloc_callback_fail_multiple.command_buffer_primary dEQP-VK.api.object_management.alloc_callback_fail_multiple.command_buffer_secondary Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Cc: "13.0 17.0" <[email protected]>
* vulkan/wsi: Lower the maximum image sizesJason Ekstrand2017-01-252-2/+4
| | | | | Reviewed-by: Lionel Landwerlin <[email protected]> Cc: "17.0" <[email protected]>
* vulkan/wsi/wayland: Handle VK_INCOMPLETE for GetPresentModesJason Ekstrand2017-01-251-3/+5
| | | | | Reviewed-by: Lionel Landwerlin <[email protected]> Cc: "17.0" <[email protected]>
* vulkan/wsi/wayland: Handle VK_INCOMPLETE for GetFormatsJason Ekstrand2017-01-251-7/+9
| | | | | Reviewed-by: Lionel Landwerlin <[email protected]> Cc: "17.0" <[email protected]>
* swr: Update fs texture & sampler state logicGeorge Kyriazis2017-01-251-2/+5
| | | | | | | | In swr_update_derived() update texture and sampler state on a new fragment shader. GALLIUM_HUD can update fs using a previously bound texture and sampler. Reviewed-by: Bruce Cherniak <[email protected]>
* gallium/radeon: add a new HUD query for the number of mapped buffersSamuel Pitoiset2017-01-259-0/+18
| | | | | | | | | | | Useful when debugging applications which map a ton of buffers and also because we used to run into Linux's limit on the number of simultaneous mmap() calls. v2: - update the commit message Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* spirv: handle gl_SampleMaskIago Toral Quiroga2017-01-251-2/+6
| | | | | | | | | | | | | SPIR-V maps both gl_SampleMask and gl_SampleMaskIn to the same builtin (SampleMask). The only way to tell which one we are dealing with is to check if it is an input or an output. Fixes: dEQP-VK.pipeline.multisample_shader_builtin.sample_mask.write.* Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Anuj Phogat <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* spirv: acknowledge multisampled input attachmentsIago Toral Quiroga2017-01-251-3/+8
| | | | Reviewed-by: Lionel Landwerlin <[email protected]>
* radv: program a default point size.Dave Airlie2017-01-251-1/+2
| | | | | | | | | | | | Along the lines of what 3b804819 anv: Default PointSize to 1.0 if not written by the shader does for anv, program a default point size in the hw of 1.0. This preempt fixes a bunch of geom shader tests. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Cc: "17.0" <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radeonsi: handle first_non_void correctly in si_create_vertex_elementsMarek Olšák2017-01-241-3/+3
| | | | | | | | This fixes R11G11B10_FLOAT, because it's in the category of "OTHER", meaning that it doesn't have any channel description. Cc: 17.0 <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* st/mesa: destroy pipe_context before destroying st_context (v2)Marek Olšák2017-01-241-6/+7
| | | | | | | | | | | | | | | | | If radeonsi starts compiling an optimized shader variant asynchronously with a GL debug callback set and the application destroys the GL context, radeonsi crashes when trying to write shader stats into the debug output of a non-existent context after compilation, because st/mesa was destroyed before pipe_context. Firefox with WebGL2 enabled hits this bug. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99456 v2: protect against a double destroy in st_create_context_priv and callers. Cc: 17.0 <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* nir: bump loop max unroll limitTimothy Arceri2017-01-251-1/+1
| | | | | | | | | | | | | | | | | | The original number was chosen in an attempt to match the limits applied to GLSL IR. A look at the git history of the why these limits were chosen for GLSL IR shows it was more to do with the slow speed of unrolling large loops in GLSL IR than anything else. The speed of loop unrolling in NIR is not a problem so we may wish to bump this even higher in future. No shader-db change, however a furture change will disbale the GLSL IR optimisation loop in the i965 backend results in 4 loops from The Talos Principle failing to unroll. Bumping the limit allows them to unroll which results in the instruction count matching the previous output from when the GLSL IR opts were still enabled. Reviewed-by: Jason Ekstrand <[email protected]>
* glsl: lower constant arrays to uniform arrays before optimisation loopTimothy Arceri2017-01-251-13/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously the constant array would not get copy propagated until the backend did its GLSL IR opt loop. I plan on removing that from i965 shortly which caused huge regressions in Deus-ex and Tomb Raider which have large constant arrays. Moving lowering before the opt loop in the GLSL linker fixes this and unexpectedly improves some compute shaders also. shader-db results BDW: instructions helped: shaders/closed/steam/deus-ex-mankind-divided/374.shader_test CS SIMD16: 204 -> 194 (-4.90%) instructions helped: shaders/closed/steam/deus-ex-mankind-divided/318.shader_test CS SIMD8: 1010 -> 741 (-26.63%) instructions helped: shaders/closed/steam/deus-ex-mankind-divided/144.shader_test CS SIMD8: 542 -> 385 (-28.97%) cycles helped: shaders/closed/steam/deus-ex-mankind-divided/318.shader_test CS SIMD8: 1831382 -> 1818492 (-0.70%) cycles helped: shaders/closed/steam/deus-ex-mankind-divided/144.shader_test CS SIMD8: 216238 -> 206180 (-4.65%) cycles helped: shaders/closed/steam/deus-ex-mankind-divided/374.shader_test CS SIMD16: 18484 -> 16644 (-9.95%) total instructions in shared programs: 13060313 -> 13059877 (-0.00%) instructions in affected programs: 1756 -> 1320 (-24.83%) helped: 3 HURT: 0 total cycles in shared programs: 256586698 -> 256561910 (-0.01%) cycles in affected programs: 2066104 -> 2041316 (-1.20%) helped: 3 HURT: 0 V3: only call the opt loop if lowering progressed (Suggested by Eric) V2: call opts before and after lowering (Suggested by Ken) Reviewed-by: Eric Anholt <[email protected]>
* mesa: Don't advertise GL_OES_read_format in core profileIan Romanick2017-01-241-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | OpenGL ES implementations are not allowed to ship ARB extensions, and OpenGL implementations are not allowed to ship OES extensions. The functionality is also included in GL_ARB_ES2_compatibility. Ever OpenGL core-profile driver currently exposes both extensions. I don't know of any applications that explicitly check for GL_OES_read_format, so removing it seems very unlikely to cause problems. No functionality is removed. I have left this extension in place for compatibility profile. There are still OpenGL 1.x drivers in Mesa, and adding code to check for compatibility profile and not GL_ARB_ES2_compatibility for GL_IMPLEMENTATION_COLOR_READ_TYPE and GL_IMPLEMENTATION_COLOR_READ_FORMAT just feels dumb. Three other other alternatives considered: - Remove the string from compatibility profile drivers but leave the functionality in place. - Add a flag to expose the extension string, and set it in every OpenGL driver that does not expose GL_ARB_ES2_compatibility (and those drivers only). I tried this. You can't have two instances of an extension in the extension table (one dummy_true for ES1 and one with a flag for compatibility profile), so the implementation requires a bit of effort. - Only expose the extension in compatibility if the version is less than 2.0. I didn't see an easy way to do this. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Cc: [email protected]
* docs: fix incorrect link to 12.0.6 release notesBrian Paul2017-01-241-1/+1
| | | | Trivial.
* anv: Expose VK_KHR_maintenance1Jason Ekstrand2017-01-241-1/+5
| | | | | Reviewed-by: Iago Toral Quiroga <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* anv: Return better errors from AllocateDescriptorSetsJason Ekstrand2017-01-241-2/+7
| | | | | Reviewed-by: Iago Toral Quiroga <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
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