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* r600g/sb: Enable SB for geometry shadersGlenn Kennard2015-04-0811-16/+55
* r600g/sb: Update last_cf for loopsGlenn Kennard2015-04-081-0/+8
* u_tile: fix stencil texturing tests under softpipeDave Airlie2015-04-081-6/+6
* nir: Make nir_*_instr_create take a nir_shader instead of a void * contextJason Ekstrand2015-04-072-27/+27
* nir: Implement a nir_sweep() pass.Kenneth Graunke2015-04-073-0/+175
* nir: Allocate dereferences out of their parent instruction or deref.Kenneth Graunke2015-04-076-42/+45
* nir: Allocate nir_ssa_def::uses/if_uses out of the instruction.Kenneth Graunke2015-04-071-4/+2
* nir: Allocate nir_phi_src values out of the nir_phi_instr.Kenneth Graunke2015-04-073-3/+3
* nir: Allocate nir_call_instr::params out of the nir_call itself.Kenneth Graunke2015-04-071-1/+1
* i965: Add the ability to render to I8/L8 and I16/L16 UNORM formats.Kenneth Graunke2015-04-071-0/+8
* i965: Use SET_FIELD in 3DSTATE_STREAMOUT packets.Kenneth Graunke2015-04-072-16/+16
* nir/lower_tex_projector: Don't use designated initializersJason Ekstrand2015-04-071-1/+2
* glsl: relax input->output validation for SSO programsTapani Pälli2015-04-071-1/+1
* nv50,nvc0: limit the y-tiling of 3d textures to the first level's tilingIlia Mirkin2015-04-063-10/+13
* r600g: fix op3 abs issueDave Airlie2015-04-071-17/+34
* i965: Do not render primitives in non-zero streams then TF is disabledIago Toral Quiroga2015-04-061-0/+13
* i965: Add forgotten multi-stream code to Gen8 SOL state.Kenneth Graunke2015-04-061-0/+9
* i965: Fix instanced geometry shaders on Gen8+.Kenneth Graunke2015-04-061-0/+2
* i965: Free dead GLSL IR one last time.Kenneth Graunke2015-04-061-0/+12
* i965: Implement SIMD16 texturing on Gen4.Kenneth Graunke2015-04-063-10/+90
* i965: Use SIMD16 instead of SIMD8 on Gen4 when possible.Kenneth Graunke2015-04-062-3/+4
* i965: Respect the no_8 flag on Gen4-5.Kenneth Graunke2015-04-061-21/+34
* i965/fp: Set coord_components correctly for cube textures.Kenneth Graunke2015-04-061-1/+1
* glsl/cse: Maintain a list of free ae_entry objectsIan Romanick2015-04-061-8/+55
* nir: Remove fsin_reduced/fcos_reduced.Matt Turner2015-04-062-4/+0
* st/mesa: Remove unused emit_scs().Matt Turner2015-04-061-98/+0
* program: Remove unused emit_scs().Matt Turner2015-04-061-98/+0
* i965/vec4: Remove emit_scs() prototype.Matt Turner2015-04-061-3/+0
* glsl: Remove never used sin_reduced/cos_reduced.Matt Turner2015-04-0610-34/+0
* glsl: Update the #line behaviour on GLSL 3.30+ and GLSL ES+Antia Puentes2015-04-061-0/+17
* glsl: respect the source number set by #line <line> <source>Antia Puentes2015-04-061-2/+1
* i965: Make sure we always mark array surfaces as suchIago Toral Quiroga2015-04-062-2/+6
* freedreno/ir3: add NIR compilerRob Clark2015-04-057-5/+1762
* freedreno/a3xx: don't decode srgb on mem2gmemIlia Mirkin2015-04-051-6/+12
* freedreno/a3xx: pass sprite coord mode through to program emitIlia Mirkin2015-04-053-1/+4
* freedreno/a3xx: add UBO supportIlia Mirkin2015-04-057-38/+133
* freedreno/ir3: insert nop between sfu/mem operationsIlia Mirkin2015-04-051-1/+6
* freedreno: dirty context when reallocating a bound boIlia Mirkin2015-04-051-0/+40
* freedreno: keep track of buffer valid rangesIlia Mirkin2015-04-052-0/+27
* freedreno: mark resources as being read so that writes flush the queueIlia Mirkin2015-04-055-1/+59
* freedreno: don't bother setting resource timestampsIlia Mirkin2015-04-051-9/+0
* freedreno: add a reading flag to indicate gpu is reading rscIlia Mirkin2015-04-052-2/+3
* freedreno: fix resource flushing confusionIlia Mirkin2015-04-051-14/+10
* freedreno: remove tex_resourceIlia Mirkin2015-04-059-11/+3
* freedreno/ir3: handle FRAG IN's without interpolation specifiedRob Clark2015-04-051-7/+15
* freedreno/ir3/cmdline: add @const headers for immediatesRob Clark2015-04-051-0/+9
* freedreno/ir3/cmdline: remove hack for old compilerRob Clark2015-04-051-23/+0
* freedreno/ir3: handle const/immed/abs/neg in cpRob Clark2015-04-053-31/+314
* freedreno/ir3: split float/int abs/negRob Clark2015-04-055-64/+213
* freedreno/ir3: add ir3 builder helpersRob Clark2015-04-053-4/+162