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* i965: Update SURFACE_STATE for Ivybridge.Kenneth Graunke2011-05-175-4/+503
| | | | | | | | I'm still not happy with the amount of code duplication here, but it will have to do for now. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Mark a few more brw_wm_surface_state functions as non-static.Kenneth Graunke2011-05-172-5/+14
| | | | | | | I need to reuse them. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Change brw_format_for_mesa_format to a non-static function.Kenneth Graunke2011-05-172-55/+63
| | | | | | | This will make it easier to share between files. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Set Address Modify Enable in VERTEX_BUFFER on Ivybridge.Kenneth Graunke2011-05-172-0/+4
| | | | | | | | Otherwise, Ivybridge seems to ignore the newly supplied data, giving us rubbish for vertices. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Enable channel masks in Ivybridge's URB_WRITE_HWORD header.Kenneth Graunke2011-05-171-0/+8
| | | | | | | | This shouldn't be done using MRFs, but until I have a proper solution for dealing with MRFs, this allows my hack to keep working. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Fix the URB write message descriptor on Ivybridge.Kenneth Graunke2011-05-172-2/+29
| | | | | | | The message header is still incorrect, but this is a start. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Fix render target writes on Ivybridge.Kenneth Graunke2011-05-172-1/+29
| | | | | | | Ivybridge shifts the data port messages by one bit. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Mad hacks to avoid using MRFs on Ivybridge.Kenneth Graunke2011-05-171-1/+19
| | | | | | | | | | | | | | | | | Ivybridge's SEND instruction uses GRFs instead of MRFs. Unfortunately, a lot of our code explicitly uses MRFs, and rewriting it would take a fair bit of effort. In the meantime, use a hack: - Change brw_set_dest, brw_set_src0, and brw_set_src1 to implicitly convert any MRFs into the top 16 GRFs. - Enable gen6_resolve_implied_move on Ivybridge: Moving g0 to m0 actually moves it to g111 thanks to the previous hack. It remains to officially reserve these registers so the allocator doesn't try to reuse them. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Emit 3DPRIMITIVE Ivybridge-style.Kenneth Graunke2011-05-172-1/+62
| | | | | Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Don't use the GS for breaking down quads on Ivybridge.Kenneth Graunke2011-05-172-3/+3
| | | | | Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Emit extra 0's in 3DSTATE_MULTISAMPLE on Ivybridge.Kenneth Graunke2011-05-171-2/+5
| | | | | Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Add depth buffer support on Ivybridge.Kenneth Graunke2011-05-176-5/+140
| | | | | | | | This also disables the HiZ and separate stencil buffers. We still need to implement stencil. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Upload sampler state pointers on Ivybridge.Kenneth Graunke2011-05-174-1/+11
| | | | | | | | Since we currently only support sampling in the fragment shader, we only bother to emit the PS variant. In the future we'll need to emit others. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Disable binding table pointers for unused pipeline stages.Kenneth Graunke2011-05-172-0/+17
| | | | | | | This may not be necessary, but it seems like a good idea. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Upload binding table pointers on Ivybridge.Kenneth Graunke2011-05-174-2/+16
| | | | | | | Ivybridge uses per-stage commands to update binding table pointers. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Split BRW_NEW_BINDING_TABLE dirty bit into one per stage.Kenneth Graunke2011-05-175-15/+27
| | | | | | | | | Ivybridge can update each stage's binding table pointer independently, so we want separate dirty bits. Previous generations can simply subscribe to all three dirty bits and emit as usual. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Explicitly disable unused pipeline stages on Ivybridge.Kenneth Graunke2011-05-175-1/+141
| | | | | | | This may not be strictly necessary, but seems wise. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Initial Ivybridge VS state.Kenneth Graunke2011-05-174-1/+96
| | | | | | | | | Copied from gen6_vs_state.c; reuses create_vs_constant_bo from there. The 3DSTATE_VS command is identical but 3DSTATE_CONSTANT_VS is not. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Initial Ivybridge Viewport state setup.Kenneth Graunke2011-05-176-4/+137
| | | | | | | | | | | SF and CLIP viewport state has been combined into SF_CLIP_VIEWPORT; SF_CLIP and CC state pointers can now be uploaded independently. Some portions of the hardware documentation refer to separate upload commands for SF and CLIP; these are outdated and incorrect. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Initial Ivybridge Clip state setup.Kenneth Graunke2011-05-175-1/+125
| | | | | | | | | | | Copied from gen6_clip_state.c. This enables early culling and sets the necessary fields. Otherwise, it is entirely the same, so I doubt this patch is strictly necessary for a functional driver. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Initial Ivybridge CC state setup.Kenneth Graunke2011-05-175-1/+98
| | | | | | | | | The state itself still seems to be the same; the only change is that each part (CC, BLEND, DEPTH_STENCIL) can now be uploaded independently. Thus, we still rely on the code in gen6_cc.c to set up the state. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Initial Ivybridge WM/PS state setup.Kenneth Graunke2011-05-175-3/+322
| | | | | | | | | | Copied from gen6_wm_state.c. The main change from Sandybridge seems to be that 3DSTATE_WM was split into two separate state packet commands: 3DSTATE_WM and 3DSTATE_PS. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Initial Ivybridge SF/SBE state setup.Kenneth Graunke2011-05-175-2/+291
| | | | | | | | | | | | Copied from gen6_sf_state.c. The main change from Sandybridge seems to be that 3DSTATE_SF was split into two separate state packet commands: 3DSTATE_SF and 3DSTATE_SBE ("setup backend"). The bit-offsets are even the same - only the DWords numbers have shuffled around a bit. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Make gen6_sf_state.c's get_attr_override non-static.Kenneth Graunke2011-05-172-1/+5
| | | | | Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Initial Ivybridge URB space partitioning, including push constants.Kenneth Graunke2011-05-178-4/+162
| | | | | | | | | Currently this always reserves 16kB for push constants, regardless of how much space is needed, and partitions it evenly betwen the VS and FS. This is probably not ideal, but is straightforward. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Set maximum number of threads for Ivybridge.Kenneth Graunke2011-05-171-1/+11
| | | | | Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Split out tracked state atoms for Ivybridge.Kenneth Graunke2011-05-171-1/+70
| | | | | | | | Currently, gen7_atoms is a verbatim copy of gen6_atoms; future commits will update it to contain gen7-specific state. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* intel: Initial IS_GEN7 plumbing.Kenneth Graunke2011-05-173-3/+17
| | | | | | | | | Currently, IS_GEN7, IS_IVYBRIDGE, IS_IVB_GT1, and IS_IVB_GT2 all return false. This allows me to write the code for them before actually adding the PCI IDs and thus enabling the hardware. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Rename max_vs_handles to max_vs_entries for consistency.Kenneth Graunke2011-05-173-6/+6
| | | | | | | | | | | The documentation uses the term "vertex URB entries", the code talks about "entry size", and so on. Also, handles are just "pointers" to entries (actually small integers). Also rename max_gs_handles to max_gs_entries. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Convert BRW_NEW_* dirty bits to use an enum.Kenneth Graunke2011-05-171-21/+45
| | | | | | | | This will make it much easier to add new dirty bits. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965: Rework IF/ELSE jump target back-patching.Kenneth Graunke2011-05-171-114/+144
| | | | | | | | | | | | | | | | | | | | | | | | | The primary motivation for this is to better support Ivybridge control flow. Ivybridge IF instructions need to point to the first instruction of the ELSE block -and- the ENDIF instruction; the existing code only supported back-patching one instruction ago. A second goal is to simplify and centralize the back-patching, hopefully clarifying the code somewhat. Previously, brw_ELSE back-patched the IF instruction, and brw_ENDIF back-patched the previous instruction (IF or ELSE). With this patch, brw_ENDIF is responsible for patching both the IF and (optional) ELSE. To support this, the control flow stack (if_stack) maintains pointers to both the IF and ELSE instructions. Unfortunately, in single program flow (SPF) mode, both were emitted as ADD instructions, and thus indistinguishable. To remedy this, this patch simply emits IF and ELSE, rather than ADDs; brw_ENDIF will convert them to ADDs (the SPF version of back-patching). Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Move IF stack handling into the EU abstraction layer/brw_compile.Kenneth Graunke2011-05-1710-132/+122
| | | | | | | | This hides the IF stack and back-patching of IF/ELSE instructions from each of the code generators, greatly simplifying the interface. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Get a ralloc context into brw_compile.Kenneth Graunke2011-05-178-22/+44
| | | | | | | | | | | | This would be so much easier if we were using C++; we could simply use constructors and destructors. Instead, we have to update all the callers. While we're at it, ralloc various brw_wm_compile fields rather than explicitly calloc/free'ing them. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965/gs: Move generation check for bailing earlier.Kenneth Graunke2011-05-171-6/+6
| | | | | | | | | On Sandybridge, we don't need to break down primitives. There's no need to bother setting up brw_compile and such if it's not going to be used; bail as early as possible. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Add _NEW_LIGHT to Gen6 clip state dirty bits.Kenneth Graunke2011-05-171-1/+2
| | | | | | | | | ctx->Light.ProvokingVertex depends on _NEW_LIGHT. Found by inspection. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* mesa: add some missing GLAPIENTRY keywordsBrian Paul2011-05-171-11/+11
| | | | NOTE: this is a candidate for the 7.10 branch.
* r300/compiler: Fix bug in rc_get_variables()Tom Stellard2011-05-171-45/+13
| | | | | | | Variables that write to the same source select need to pe paired together otherwise the register allocator might fail. https://bugs.freedesktop.org/show_bug.cgi?id=36753
* u_vbuf_mgr: fix max_index computation when src_offset is abused as buffer_offsetMarek Olšák2011-05-171-1/+6
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* mesa: make RGB9_E5 non-renderable on swrast againMarek Olšák2011-05-171-6/+4
| | | | _BaseFormat for RGB9_E5 is GL_RGBA due to the previous revert.
* Revert "mesa: set reasonable defaults in update_wrapper"Marek Olšák2011-05-171-5/+2
| | | | | | | This reverts commit 1d5f16ff8fae936f2e920800b169cf7736a8052a. It breaks fbo-readpixels on swrast. For some reason, swrast likes GL_RGBA and CHAN_TYPE.
* i965: Pass brw_compile pointer to brw_set_src[01].Kenneth Graunke2011-05-163-98/+107
| | | | | | | | This makes it symmetric with brw_set_dest, which is convenient, and will also allow for assertions to be made based off of intel->gen. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Fix "Paramater" typo in gen6_wm_state.c.Kenneth Graunke2011-05-161-1/+1
| | | | Signed-off-by: Kenneth Graunke <[email protected]>
* egl: Compile wayland-drm.a into libEGL independent of egl_dri2Benjamin Franzke2011-05-161-3/+4
| | | | Fixes egl_gallium when egl_dri2 is not enabled.
* st/mesa: overhaul vertex/fragment sampler and sampler views.Dave Airlie2011-05-164-154/+225
| | | | | | | | | | | | | | | | | | | This fixes piglits fragment-and-vertex-texturing test on llvmpipe for me. I've no idea if someone had another plan for this that is smarter than what I've done here, but what I've basically done is split fragment and vertex sampler and sampler_view setup function, factor out the common chunks of both. side-cleanups: drop st->state.sampler_list - unused don't update border color if we have no border color. should fix https://bugs.freedesktop.org/show_bug.cgi?id=35849 Signed-off-by: Dave Airlie <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* gallium: block signals for new thread when spawning threadsDave Airlie2011-05-161-1/+8
| | | | | | | | | | | | | I'm hard pressed to think of any reason a gallium thread would want to receive a signal, especially considering its probably loaded as a library and you don't want the threads interfering with the main threads signal handling. This solves a problem loading llvmpipe into the X server for AIGLX, where the X server relies on the SIGIO signal going to the main thread, but once llvmpipe loads the SIGIO can end up in any of its threads. Signed-off-by: Dave Airlie <[email protected]>
* r600g: reduce flushes so only when texture and CB overlap.Dave Airlie2011-05-152-8/+17
| | | | | | | We only need to do this when the texture and CB are using the same memory area. Signed-off-by: Dave Airlie <[email protected]>
* r300/compiler: Use ALU Result for IF conditionalsTom Stellard2011-05-146-20/+212
| | | | This saves one instruction per IF.
* r300g: HiZ fixesMarek Olšák2011-05-151-24/+24
| | | | | | | Nothing special, just changing conditions for when HiZ can be enabled and when HiZ memory becomes invalid. I was thinking about it again and realized it had not been quite right.
* r300g: don't set other HyperZ states if depth and stencil tests are disabledMarek Olšák2011-05-151-14/+27
| | | | Such as HiZ.
* r300g: dynamically ask for and release Hyper-Z accessMarek Olšák2011-05-1510-95/+225
| | | | | We ask for Hyper-Z access when clearing a zbuffer. We release it if no zbuffer clear has been done for 2 seconds.
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