summaryrefslogtreecommitdiffstats
Commit message (Collapse)AuthorAgeFilesLines
* mesa/st: Fix frontbuffer rendering regressionThomas Hellstrom2017-09-081-0/+3
| | | | | | | | | | | | | | | | | | | | | | | This fixes a regression introduced with commit "mesa/st: Reduce the number of frontbuffer flush calls" where we, after flushing the front buffer marked it as not-rendered-to, the idea being that it should be marked as "rendered-to" again as soon as any rendering was touching the front. Now the latter part never happened, because it was part of a state validation and we never marked that part of the state as dirty. So mark the framebuffer state dirty after a frontbuffer flush. (fdo bugzilla 102496) Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102496 Fixes: eceb671002 (mesa/st: Reduce the number of frontbuffer flush calls) Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: Bruce Cherniak <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Tested-by: Dieter Nützel <[email protected]> Tested-by: Bruce Cherniak <[email protected]> Tested-By: Gert Wollny <[email protected]>
* i965: Don't special case the batchbuffer when reference counting.Kenneth Graunke2017-09-081-11/+4
| | | | | | | | | | | | We don't need to special case the batch - when we add the batch to the validation list, we can simply increase the refcount to 2, and when we make a new batch, we'll drop it back down to 1 (when unreferencing all buffers in the validation list). The final reference is still held by brw->batch.bo, as it was before. This removes the special case from a bunch of loops. Reviewed-by: Chris Wilson <[email protected]>
* ac: remove bitcast_to_float()Connor Abbott2017-09-081-16/+2
| | | | | | ac_to_float() does a superset of what it does. Signed-off-by: Dave Airlie <[email protected]>
* ac: move ac_to_integer() and ac_to_float() to ac_llvm_build.cConnor Abbott2017-09-083-162/+172
| | | | | | We'll need to use ac_to_integer() for other stuff in ac_llvm_build.c. Reviewed-by: Dave Airlie <[email protected]>
* ac: fix ac_get_type_size() for doublesConnor Abbott2017-09-081-0/+1
| | | | Reviewed-by: Dave Airlie <[email protected]>
* radv/ac: use ac_get_type_size.Dave Airlie2017-09-081-23/+3
| | | | | | Just moved to newly shared code. Signed-off-by: Dave Airlie <[email protected]>
* radeonsi: move the guts of ARB_shader_group_vote emission to acConnor Abbott2017-09-083-21/+39
| | | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radeonsi: move si_emit_ballot() to acConnor Abbott2017-09-083-32/+35
| | | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radeonsi: move emit_optimization_barrier() to acConnor Abbott2017-09-083-43/+47
| | | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radeonsi: move llvm_get_type_size() to acConnor Abbott2017-09-083-34/+35
| | | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv/winsys: fix flags vs va_flags thinko.Dave Airlie2017-09-081-1/+1
| | | | | Fixes: e8d57802f (radv/gfx9: allocate events from uncached VA space) Signed-off-by: Dave Airlie <[email protected]>
* radv: use simpler indirect packet 3 if possible.Dave Airlie2017-09-071-14/+23
| | | | | | | | This fixes some observed hangs on CIK GPUs. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Cc: "17.2" <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv/gfx9: allocate events from uncached VA spaceDave Airlie2017-09-073-3/+8
| | | | | | | | | | | | This copies what amdgpu-pro does, and allocates the memory for an event with an uncached mtype. This fixes hangs with: dEQP-VK.api.command_buffers.record_simul_use_primary Reviewed-by: Bas Nieuwenhuizen <[email protected]> Cc: "17.2" <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv/winsys: use amdgpu_bo_va_op_raw.Dave Airlie2017-09-071-7/+24
| | | | | | | | | | This is a precursor to the gfx9 fix to use uncached for the event memory. Move to the interface which allows setting the flags, but wrap it to avoid having to copy it around the place. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Cc: "17.2" <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* Revert "st/va: add enviromental variable to disable interlace"Leo Liu2017-09-071-4/+0
| | | | | | | | This reverts commit 10dec2de2d9f568675d66d736b48701fa26f7b50. The environment variable is no longer needed with the previous change Reviewed-by: Christian König <[email protected]>
* st/va: move YUV content to deinterlaced buffer when reallocated for encoderLeo Liu2017-09-071-1/+10
| | | | | | | | v2: use deinterlace common function v3: make sure deinterlace only Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]>
* st/va: reallocate the buffer if the layout isn't supportedLeo Liu2017-09-071-9/+12
| | | | | | | | So that it makes more clear for buffer reallocation based on buffers layout for both decoder and encoder. Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]>
* vl/compositor: make vl_compositor_set_yuv_layer() staticLeo Liu2017-09-072-44/+28
| | | | | | | Since it's no longer being called outside of compositor Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]>
* st/omx: use vl/compositor helper function for YUV deinterlacingLeo Liu2017-09-071-30/+2
| | | | | | | v2: separate helper function in different patch Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]>
* vl/compositor: make a helper function for YUV deinterlacingLeo Liu2017-09-072-0/+40
| | | | | | | | The similar function is in OMX, and only used by OMX. Now have it moved to vl/compositor for other state tracker to use later. Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]>
* ac/surface: add radeon_surf::has_stencil for convenienceMarek Olšák2017-09-0711-14/+18
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* mesa/st/tests: Fix regressions with libunwind enabled introduced with 7be6d8fe12Gert Wollny2017-09-071-0/+1
| | | | | | | | Add the according flags to link with libunwind. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=102565 Tested-by: Michel Dänzer <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* mesa/st/tests: Fix classic build regressions introduced with 7be6d8fe12Gert Wollny2017-09-071-1/+6
| | | | | | | | Fixes the build in classic only mode, i.e. the new state tracker tests are only build when Gallium is enabled. Tested-by: Michel Dänzer <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* mesa/main: Fix GetTransformFeedbacki64 for glTransformFeedbackBufferBaseIago Toral Quiroga2017-09-071-0/+22
| | | | | | | | | | | | | | | | | | | | | | | | The spec has special rules for querying buffer offsets and sizes when BindBufferBase is used, described in the OpenGL 4.6 spec, section 6.8 Buffer Object State: "To query the starting offset or size of the range of a buffer object binding in an indexed array, call GetInteger64i_v with target set to respectively the starting offset or binding size name from table 6.5 for that array. Index must be in the range zero to the number of bind points supported minus one. If the starting offset or size was not specified when the buffer object was bound (e.g. if it was bound with BindBufferBase), or if no buffer object is bound to the target array at index, zero is returned." Transform feedback buffer queries should follow the same rules, since it is the same case for them. There is a CTS test for this. Fixes: KHR-GL45.direct_state_access.xfb_buffers Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]>
* radeonsi: don't read tcs_out_lds_layout.patch_stride from an SGPRMarek Olšák2017-09-071-6/+14
| | | | | | | Same as before, writing TCS outputs to LDS is rare. Tested-by: Dieter Nützel <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: don't read tcs_out_lds_layout.vertex_size from an SGPRMarek Olšák2017-09-073-6/+20
| | | | | | | TCS outputs are usually not written to LDS, so no stats here. Tested-by: Dieter Nützel <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: don't read LS out vertex stride from an SGPR in monolithic HSMarek Olšák2017-09-072-1/+11
| | | | | | | -44 bytes in a monolithic LS-HS binary. Tested-by: Dieter Nützel <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: don't read the LS output vertex stride from an SGPR in LSMarek Olšák2017-09-071-4/+21
| | | | | | | | | Now it's able to generate ds_write2_b64 instead of ds_write2_b32. -20 bytes in one shader binary. (having only 1 output) Tested-by: Dieter Nützel <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: don't read the number of TCS out vertices from an SGPR in TCSMarek Olšák2017-09-071-2/+15
| | | | | | | -16 bytes in one shader binary. Tested-by: Dieter Nützel <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: don't always apply the PrimID instancing bug workaround on SIMarek Olšák2017-09-071-1/+1
| | | | | | | | It looks like commit 391673af7ad1565a5f6ac8fc2f8c9fcdd1fe9908 that should have fixed the perf regression didn't really change much if anything. Tested-by: Dieter Nützel <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: remove 2 callbacks from si_shader_contextMarek Olšák2017-09-073-17/+13
| | | | | Tested-by: Dieter Nützel <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* winsys/amdgpu: disable local BOs on RavenMarek Olšák2017-09-071-1/+2
| | | | | | It hangs with a high degree of reproducibility. Acked-by: Nicolai Hähnle <[email protected]>
* disk_cache: make the thread queue resizable and low priorityMarek Olšák2017-09-071-6/+8
| | | | | Acked-by: Timothy Arceri <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* loader/dri3: Make sure we invalidate a drawable on size changeThomas Hellstrom2017-09-071-0/+2
| | | | | | | | | If we're seeing a drawable size change, in particular after processing a configure notify event, make sure we invalidate so that the state tracker picks up the new geometry. Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* loader/dri3: Process event after each fence waitThomas Hellstrom2017-09-071-7/+10
| | | | | | | | | | This tries to mimic dri2 behaviour where events are typically processed while waiting for X replies. Since, during steady-state dri3 rendering, we seldom wait for xcb replies, and haven't enabled any automatic event processing, instead check for events after a fence wait. Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* st/mesa: skip draw calls with pipe_draw_info::count == 0Marek Olšák2017-09-071-1/+6
| | | | | | | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102502 Cc: 17.2 <[email protected]> Tested-by: Alexandre Demers <[email protected]> Tested-by: Dieter Nützel <[email protected]> Acked-by: Timothy Arceri <[email protected]>
* docs: update envvar docs to reflect MESA_NO_ERROR changeEric Engestrom2017-09-071-1/+1
| | | | | | | | | I changed the behaviour earlier today, but forgot to update the corresponding docs. Fixes: 77713a0acb09f475d29f "mesa: allow user to set MESA_NO_ERROR=0" Suggested-by: Emil Velikov <[email protected]> Signed-off-by: Eric Engestrom <[email protected]>
* radv: do not use a bitfield when dirtying the vertex buffersSamuel Pitoiset2017-09-072-3/+4
| | | | | | | | Useless to track which one has been updated because we re-upload all the vertex buffers in one shot. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: remove unused radv_meta_saved_state::vertex_saved fieldSamuel Pitoiset2017-09-072-8/+0
| | | | | | | It's always false. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* mesa: allow user to set MESA_NO_ERROR=0Eric Engestrom2017-09-071-1/+2
| | | | | | | | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102530 Cc: Michel Dänzer <[email protected]> Cc: Alexandre Demers <[email protected]> Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Timothy Arceri <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* util: rename include guard to avoid clashEric Engestrom2017-09-071-3/+3
| | | | | | | | src/mesa/main/debug.h uses the same include guard. Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Timothy Arceri <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* llvmpipe, tgsi: hook up dx10 gather4 opcodeRoland Scheidegger2017-09-072-8/+25
| | | | | | | | | Trivial. We already support tg4 for legacy tex opcodes, so the actual texture sampling code already handles it. (Just like TG4, we don't handle additional capabilities and always sample red channel.) Reviewed-by: Jose Fonseca <[email protected]>
* llvmpipe, draw: increase shader cache limitsRoland Scheidegger2017-09-072-4/+2
| | | | | | | | | | | | | | | We're not particularly concerned with memory usage, if the tradeoff is shader recompiles. And it's common for apps to have a lot of shaders nowadays (and, since our shaders include a LOT of context state of course we may create quite a bit more shaders even). So quadruple the amount of shaders draw will cache (from 128 to 512). For llvmpipe (fs shaders) quadruple the number of instructions, keep the number of variants the same for now (only with very simple, non-texturing shaders the variant limit could really be reached), and simplify the definition, it's probably easier to just have one different definition per branch... Reviewed-by: Jose Fonseca <[email protected]>
* ac/surface: reduce gfx9_surface_layout size.Dave Airlie2017-09-071-2/+3
| | | | | | 152->144. Signed-off-by: Dave Airlie <[email protected]>
* radv: reduce radv_amdgpu_winsys struct size.Dave Airlie2017-09-071-3/+3
| | | | | | 1168->1160. Signed-off-by: Dave Airlie <[email protected]>
* radv: reduce radv_image struct size.Dave Airlie2017-09-071-3/+2
| | | | | | 1480->1472. Signed-off-by: Dave Airlie <[email protected]>
* radv: reduce radv_shader_variant struct size.Dave Airlie2017-09-071-1/+1
| | | | | | 544->536 Signed-off-by: Dave Airlie <[email protected]>
* radv: reduce radv_cmd_state struct size.Dave Airlie2017-09-071-2/+2
| | | | | | 1632->1624. Signed-off-by: Dave Airlie <[email protected]>
* radv: reduce meta_saved_state struct size.Dave Airlie2017-09-071-4/+3
| | | | | | 904->896. Signed-off-by: Dave Airlie <[email protected]>
* nir: put compact into bitfields in nir_variable_dataDave Airlie2017-09-071-1/+1
| | | | | | | | | | This being declared bool means it won't get merged with the previous bitfields, this seems like an oversight rather than deliberate. Noticed when running pahole. Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-28 11:04:56 +0000