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* mesa: Flush vertices before updating drawbuffer computed state.Eric Anholt2011-05-261-7/+7
| | | | | | | Otherwise, the driver is likely to draw the flushed vertices to the new drawbuffer instead of the old one, missing the point of the flush. Reviewed-by: Brian Paul <[email protected]>
* mesa: Allow NULL read/draw in complete FBOs in ARB_ES2_compatibility.Eric Anholt2011-05-261-1/+1
| | | | | | | | | | | | | | From the ARB_ES2_compatibility spec: "(8) How should we handle draw buffer completeness? RESOLVED: Remove draw/readbuffer completeness checks, and treat drawbuffers referring to missing attachments as if they were NONE." Fixes arb_es2_compatibility-drawbuffers when the short-circuit for ARB_ES2_compatibility in the previous commit is dropped. Reviewed-by: Brian Paul <[email protected]>
* mesa: Trigger FBO validation on DrawBuffers change in non-ES2 mode.Eric Anholt2011-05-261-10/+26
| | | | | | | | | glDrawBuffers pointing at an unattached buffer is supposed to be incomplete without ARB_ES2_compatibility. The testcase to catch the bug of not implementing that bit of the spec was tricked by this missing piece of state update. Reviewed-by: Brian Paul <[email protected]>
* mesa: minor whitespace fixesBrian Paul2011-05-251-4/+4
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* mesa: plug in sync object display list functionsBrian Paul2011-05-251-0/+50
| | | | | Most just dispatch through to the immediate mode functions, except for glWaitSync(), per the extension spec.
* mesa: display list support for glProgramParameteriARB()Brian Paul2011-05-251-0/+30
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* mesa: plug shader object functions into display list dispatchBrian Paul2011-05-251-0/+2
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* mesa: plug in GL 3.0 ClearBuffer() display list functionsBrian Paul2011-05-251-5/+1
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* mesa: fill in missing sampler object display list functionsBrian Paul2011-05-251-0/+163
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* st/mesa: simplify some st_context(ctx)->pipe codeBrian Paul2011-05-256-10/+9
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* st/mesa: fix incorrect texture level/face/slice accessesBrian Paul2011-05-252-12/+21
| | | | | | | | | | If we use FBOs to access mipmap levels with glRead/Draw/CopyPixels() we need to be sure to access the correct mipmap level/face/slice. Before, we were just passing zero in quite a few places. This fixes the new piglit fbo-mipmap-copypix test. NOTE: This is a candidate for the 7.10 branch.
* i915g: Bump texture sizesJakob Bornecrantz2011-05-251-2/+2
| | | | | | Spotted and tested by Christopher Egert. Signed-off-by: Jakob Bornecrantz <[email protected]>
* i965: Warnings cleanup.Eric Anholt2011-05-252-4/+0
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Fix assertion failures in unused brw_reg setup by deleting it.Eric Anholt2011-05-251-1/+0
| | | | | | | I was using undefined values to create an unused value. Go me. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=37366 Reviewed-by: Kenneth Graunke <[email protected]>
* r600g: remove duplicate opcode in r600_opcodes.hAlex Deucher2011-05-251-1/+0
| | | | | | | | V_SQ_CF_WORD1_SQ_CF_INST_HALT is 0x1f on both evergreen and cayman. Reported-by: Gustaw Smolarczyk <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* intel: Change FBO validation criteria to accomodate hiz and seprate stencilChad Versace2011-05-251-15/+27
| | | | | Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* intel: Fix intel_draw_buffer() to accomodate hiz and separate stencilChad Versace2011-05-251-5/+11
| | | | | | | | The logic of intel_draw_buffers() expected that stencil buffers were always combined depth/stencil. Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* intel: Add hiz_region to intel_mipmap_treeChad Versace2011-05-253-0/+36
| | | | | | | | | | When a texture is attached to multiple FBO's, a separate renderbuffer wrapper is created for each attachment. This necessitates storing the hiz region for these renderbuffers in the texture itself instead of the renderbuffer wrapper. Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* intel: Refactor the wrapping of textures with renderbuffersChad Versace2011-05-251-7/+8
| | | | | | | | | | | | | Before this commit, the renderbuffer's region was updated in intel_renderbuffer_texture(). This commit moves the update into intel_update_wrapper(), which is a more logical location for updates. This is in preparation for the next commit, which allocates and updates the texture's hiz region in intel_update_wrapper(). Having the two region updates located in the same function makes good form. Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* intel: Add hiz_region to intel_renderbufferChad Versace2011-05-252-0/+46
| | | | | | | | | | | | | | | | | | | | | | A hiz surface must be supplied to the hardware when rendering to a depth buffer with hiz. There are three potential places to store that surface: 1. Allocate a larger intel_region for the depthbuffer, and let the region's tail be the hiz surface. 2. Allocate a separate intel_region for hiz, and store it as brw_context state. 3. Allocate a separate intel_region for hiz, and store it in intel_renderbuffer. We choose method 3. Method 1 has not been chosen due to future complications it might cause when requesting a DRI drawable's depth buffer attachment from X. Method 2 has not been chosen because storing the hiz region apart from the depth region makes lazy hiz/depth resolves difficult to implement. Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* intel: Add is_hiz_depth_format() to intel_contex.vtblChad Versace2011-05-253-0/+24
| | | | | | | | | Given a format, is_hiz_depth_format() indicates if HiZ can be enabled on a depthbuffer of that format. Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* intel: Allocate region for separate stencil bufferChad Versace2011-05-251-3/+30
| | | | | | | | | ... in intel_alloc_renderbuffer_storage(). The stencil buffer has quirky pitch requirements, so its region allocation is a special case. Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* intel: Change supported texture formats for separate stencilChad Versace2011-05-252-1/+7
| | | | | | | | | | | When hardware supports separate stencil, enable support for separate depth/stencil texture formats in the table intel_context.ctx.TextureFormatsSupported. If the hardware must use separate stencil, then disable support for combined depth/stencil formats. Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* mesa: Add MESA_FORMAT_X8_Z24 to _mesa_choose_tex_formatChad Versace2011-05-251-0/+2
| | | | | | | | | | | Prefer MESA_FORMAT_X8_Z24 over MESA_FORMAT_S8_Z24 for textures with internal format GL_DEPTH_COMPONENT*. i965 needs MESA_FORMAT_X8_Z24 for HiZ and separate stencil. Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* intel: Add flags to intel_context for hiz and separate stencilChad Versace2011-05-252-0/+58
| | | | | | | | | | | | | | | | | | | Add the following flags: intel_context.has_separate_stencil intel_context.must_use_separate_stencil intel_context.has_hiz The flags are currently set to false, and will be enabled for a given chipset once the feature is completely implemented. Since it may be some time before these features are completed, their values can be overridden with environment variables INTEL_HIZ and INTEL_SEPARATE_STENCIL. Valid values for these environment variables are "0" and "1". Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* glx: Don't refer to the request buffer outside of {L,Unl}ockDisplayAdam Jackson2011-05-251-3/+4
| | | | | | | | | | ... because that's not a safe thing to do. The request buffer is shared storage among all threads, and after UnlockDisplay the 'req' pointer may point into someone else's request. NOTE: This is a candidate for the 7.10 branch. Signed-off-by: Adam Jackson <[email protected]>
* egl_dri2: add new cayman pci idsAlex Deucher2011-05-251-0/+15
| | | | Signed-off-by: Alex Deucher <[email protected]>
* r600g: fix eg/cayman scissor workaroundAlex Deucher2011-05-241-11/+13
| | | | Signed-off-by: Alex Deucher <[email protected]>
* r600g: add workaround for buggy hw scissor on eg/cayman.Dave Airlie2011-05-251-1/+14
| | | | | | This is ported from the same fix to the DDX. Signed-off-by: Dave Airlie <[email protected]>
* r600g: add initial cayman acceleration support.Dave Airlie2011-05-2512-204/+1442
| | | | | | | | | | | | | | | | Cayman is the RadeonHD 69xx series of GPUs. This adds support for 3D acceleration to the r600g driver. Major changes: Some context registers moved around - mainly MSAA and clipping/guardband related. GPR allocation is all dynamic no vertex cache - all unified in texture cache. 5-wide to 4-wide shader engines (no scalar or trans slot) - some changes to how instructions are placed into slots - removal of END_OF_PROGRAM bit in favour of END flow control clause - no vertex fetch clause - TC accepts vertex or texture Signed-off-by: Dave Airlie <[email protected]>
* r600g: don't lookup a vs semantic for position/face.Dave Airlie2011-05-251-0/+4
| | | | | | | These don't need one, and I was seeing 0xff being returned and set in the GPU registers with some tests. Signed-off-by: Dave Airlie <[email protected]>
* r600g: flush the DB dest base as well.Dave Airlie2011-05-251-1/+1
| | | | | | | | If we do this for CB bases then we should do it for DB bases. noticed while adding cayman support. Signed-off-by: Dave Airlie <[email protected]>
* glx: More comment cleanupAdam Jackson2011-05-241-8/+3
| | | | Signed-off-by: Adam Jackson <[email protected]>
* glx: Remove some misleading commentsAdam Jackson2011-05-241-12/+0
| | | | | | These functions have already been modified for direct rendering. Signed-off-by: Adam Jackson <[email protected]>
* drisw: Namespace better for ease of navigationAdam Jackson2011-05-241-14/+14
| | | | Signed-off-by: Adam Jackson <[email protected]>
* drisw: dead store removalAdam Jackson2011-05-241-3/+1
| | | | Signed-off-by: Adam Jackson <[email protected]>
* mesa: fix glGetTexImage for cases when srgb decode is skippedMike Kaplinskiy2011-05-241-101/+19
| | | | | | See http://bugs.freedesktop.org/show_bug.cgi?id=37150 Signed-off-by: Brian Paul <[email protected]>
* st/mesa: prefer formats without stencil for DEPTH_COMPONENTBrian Paul2011-05-241-4/+6
| | | | | | | for fast Z clears to be used more often. Original patch by Marek Olšák. Rebased to table-driven st_choose_format() by Brian Paul.
* st/mesa: rewrite st_choose_format() to be table drivenBrian Paul2011-05-241-905/+549
| | | | | | | | | | | Instead of using a giant switch statement with lots of code, use a table to convert GL format enums to pipe formats. Tested by running the old code next to the new and asserting that the return value was the same for piglit tests. We're doing a linear search, but if that ever appears to be too slow the table could easily be sorted or hashed.
* wgl: Don't hold on to user supplied HDC.José Fonseca2011-05-243-23/+22
| | | | | | | | | | | Certain applications (e.g., Bernina My Label, and the Windows implementation of Processing language) destroy the device context used when creating the frame-buffer, causing presents to fail because we were still referring to the old device context internally. This change ensures we always use the same HDC passed to the ICD entry-points when available, or our own HDC when not available (necessary only when flushing on single buffered visuals).
* mesa: Fix remap_table setup.Thierry Reding2011-05-232-4/+5
| | | | | | | | | | | Since the SET_xxx and GET_xxx macros used to initialize the remap_table have been replaced by inline functions, the missing late macro expansion leads to driDispatchRemapTable not being redefined to remap_table, which in turn causes the remap_table not to be setup properly. This commit fixes the issue by moving the table redefinition after the definition of driDispatchRemapTable but in front of the inline function definitions.
* mesa: Fix return type of _mesa_get_format_bytes() (#37351)Adam Jackson2011-05-232-2/+4
| | | | | | | | | | | | | | | | | | | | | | | Despite that negative values aren't sensible here, making this unsigned is dangerous. Consider get_pointer_generic, which computes a value of the form: void *base + (int x * int stride + int y) * unsigned bpp The usual arithmetic conversions will coerce the (x*stride + y) subexpression to unsigned. Since stride can be negative, this is disastrous. Fixes at least the following piglit tests on Ironlake: fbo/fbo-blit-d24s8 spec/ARB_depth_texture/fbo-clear-formats spec/EXT_packed_depth_stencil/fbo-clear-formats NOTE: This is a candidate for the 7.10 branch. Reviewed-by: Chad Versace <[email protected]> Signed-off-by: Adam Jackson <[email protected]>
* i965/gen7: Fix miptree layout for cube surfaces.Kenneth Graunke2011-05-221-1/+1
| | | | | | | | | | | | | | | | | Volume 1a section 8.20.4.7.3 gives new equations which multiply by 12 instead of 11. Fixes 8 piglit tests: - fbo-cubemap - texCube - glsl-fs-texturecube - glsl-fs-texturecube-2 - glsl-fs-texturecube-2-bias - glsl-fs-texturecube-bias - arb_seamless_cubemap - cubemap Signed-off-by: Kenneth Graunke <[email protected]>
* i965: Remove comments about pre-965 hardware.Kenneth Graunke2011-05-221-3/+0
| | | | | | They're irrelevant for this driver. Signed-off-by: Kenneth Graunke <[email protected]>
* st/mesa: assign renderbuffer's format field when allocating storagepepp2011-05-211-0/+1
| | | | | | | | See http://bugs.freedesktop.org/show_bug.cgi?id=36173 NOTE: This is a candidate for the 7.10 branch. Signed-off-by: Brian Paul <[email protected]>
* r600g: fix "Fixed-Point Data Conversions"Christian König2011-05-212-2/+2
| | | | | | According to OpenGL 3.1 chapter 2.1.5 the representation without zero should only be used for vertex attribute values, but not for textures or frame-buffers.
* i965: Fix sampling on Ivybridge after headerless change.Kenneth Graunke2011-05-201-2/+13
| | | | | | Fixes a regression since 90e922267a89fa9bef254bb257405531ceff7356. Signed-off-by: Kenneth Graunke <[email protected]>
* i965: Remove "TXD" from justification of sampler message headers.Kenneth Graunke2011-05-201-1/+1
| | | | | | | The coordinate offsets set in the m1 header are for textureOffset; they have nothing to do with textureGrad (TXD). Signed-off-by: Kenneth Graunke <[email protected]>
* i965/gen7: Add support for rendering to depthbuffer mipmap levels > 0.Kenneth Graunke2011-05-202-31/+18
| | | | | | | | | | | The same as 3e43adef95ee24dd218279d2de56939b90edcb4c but for Gen7. This doesn't quite fix GL_ARB_depth_texture/fbo-clear-formats; there's still a 1 pixel wide black line on the right edge of the smaller squares. The results were entirely wrong before, and are at least close now. Signed-off-by: Kenneth Graunke <[email protected]>
* st/egl: Add support for EGL_DRM_BUFFER_USE_CURSOR_MESABenjamin Franzke2011-05-201-1/+7
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