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* mesa: Add MESA_FORMAT_{A8R8G8B8, X8R8G8B8, X8B8G8R8}_SRGB (v2)Richard Sandiford2014-09-179-0/+164
| | | | | | | | | | | | This means that each 8888 SRGB format has a reversed counterpart, which is necessary for handling big-endian mesa<->gallium mappings. v2: fix missing i965 additions. (Jason) fix 127->255 max alpha for SRGB formats. (Jason) v1: Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Richard Sandiford <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* mesa: Add MESA_FORMAT_A8L8_{SNORM,SRGB}Richard Sandiford2014-09-179-0/+111
| | | | | | | | | | | | | The associated UNORM format already existed. This means that each LnAn format has a reversed counterpart, which is necessary for handling big-endian mesa<->gallium mappings. [airlied: rebased onto current master] Signed-off-by: Richard Sandiford <[email protected]> Reviewed-by: Brian Paul <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* gallium: Define PIPE_FORMAT_xyzw8888_{SNORM, SRGB} aliasesRichard Sandiford2014-09-171-0/+24
| | | | | | | | | ...i.e. formats in which the first listed component is in the least significant byte of the integer. The corresponding UNORM aliases already exist. Signed-off-by: Richard Sandiford <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* gallium: Add PIPE_FORMAT_x8B8G8R8_SNORM formatsRichard Sandiford2014-09-172-0/+6
| | | | | | | | | | | This means that each RnGnBnxn format has a reversed counterpart, which is necessary for handling big-endian mesa<->gallium mappings. The associated UNORM and SRGB formats already exist. Signed-off-by: Richard Sandiford <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* gallium: Define PIPE_FORMAT_{LA, AL, RG, GR}nn aliasesRichard Sandiford2014-09-171-0/+32
| | | | | | | | | | ...i.e. formats in which the first listed component is in the least significant half of the integer. Signed-off-by: Richard Sandiford <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* gallium: Add PIPE_FORMAT_AnLn and PIPE_FORMAT_GnRn formatsRichard Sandiford2014-09-172-0/+19
| | | | | | | | | | | | ...i.e. formats in which the alpha or green channel is first in memory. This means that each LnAn and RnGn format has a reversed counterpart, which is necessary for handling big-endian mesa<->gallium mappings. Signed-off-by: Richard Sandiford <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* mesa: fix SRGB alpha channel value in pack_float_R8G8B8X8_SRGBDave Airlie2014-09-171-1/+1
| | | | | | | | | Jason pointed out the bug on review adding new formats, but the existing format also appears to have the bug, so use 255 as the max, these are SRGB no SNORM. Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* swrast: Fix handling of MESA_FORMAT_L8A8_SRGB for big-endianRichard Sandiford2014-09-171-3/+3
| | | | | | | | | | | | Luminance is the least-significant byte of the uint16, rather than the lowest byte in memory. Other parts of mesa already handle this correctly for big-endian, and swrast already handles other MESA_FORMAT_x8y8 formats correctly. This case was just an odd-one-out. Signed-off-by: Richard Sandiford <[email protected]> Reviewed-by: Brian Paul <[email protected]> Cc: <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* mesa: Tweak unpack name for MESA_FORMAT_R8G8B8X8_SNORMRichard Sandiford2014-09-171-2/+2
| | | | | | | | | | | MESA_FORMAT_R8G8B8X8_SNORM used a function called unpack_X8B8G8R8_SNORM while MESA_FORMAT_R8G8B8X8_SRGB used a function called unpack_R8G8B8X8_SRGB. This patch renames the SNORM function to have the same order as the MESA_FORMAT name, like the SRGB function does. Signed-off-by: Richard Sandiford <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* mesa: Fix alpha component in unpack_R8G8B8X8_SRGB.Richard Sandiford2014-09-171-1/+1
| | | | | | | | | | | The function was using the "X" component as the alpha channel, rather than setting alpha to 1.0. Signed-off-by: Richard Sandiford <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Cc: <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* util: move shared rgtc code to util (v2)Dave Airlie2014-09-177-186/+174
| | | | | | | | | | | This was being shared using a ../../ get out of gallium into mesa, and I swore when I did it I'd fix things when we got a util dir, we did, so I have. v2: move RGTC_DEBUG define Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* vc4: Claim ARB_fbo.Eric Anholt2014-09-161-1/+3
| | | | | | | | This gets a ton of piglit working that crashes in waffle context management stuff otherwise. Actually supporting mismatched FB sizes is at best going to require some more load/store generals for color buffers, but if I can't manage to do that I'll want to just have state_tracker reject those FBOs as unsupported, rather than deny GL 2.1.
* vc4: Fix memory leaks in register allocation.Eric Anholt2014-09-161-0/+3
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* vc4: Move register allocation to a separate file.Eric Anholt2014-09-164-100/+165
| | | | | I'm going to be rewriting it all, and having it mixed up with the QIR-to-QPU opcode translation was messy.
* glsl: fix error message for redeclaring gl_PerVertex as outputChris Forbes2014-09-171-1/+1
| | | | | Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/vec4: slightly improve insn dumping with no srcsChris Forbes2014-09-171-1/+4
| | | | | | | Previously, we would get a trailing ', ' which looked strange. Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* vc4: Add support for computed depth writes.Eric Anholt2014-09-163-2/+26
| | | | Fixes piglit glsl-1.10-fragdepth and early-z.
* vc4: Restructure depth input/output in fragment shaders.Eric Anholt2014-09-164-12/+17
| | | | | | The goal here is to have an argument for the depth write opcode so that I can do computed depth. In the process, this makes the calculations that will be emitted more obvious in the QIR.
* freedreno: add a standalone ir3_compiler binary for building TGSIIlia Mirkin2014-09-162-0/+191
| | | | | | Compiler taken from the combo old/new compiler comparer + simulator. Signed-off-by: Ilia Mirkin <[email protected]>
* freedreno: add default .dir-locals.el for emacs settingsIlia Mirkin2014-09-161-0/+8
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* i965: add support for RGBA dma_buf imports.Gwenole Beauchesne2014-09-161-0/+6
| | | | | | | | | This allows for importing foreign buffers in RGB32 native endian byte order, i.e. DRM_FORMAT_XBGR8888, and DRM_FORMAT_ABGR8888. Signed-off-by: Gwenole Beauchesne <[email protected]> Acked-by: Kenneth Graunke <[email protected]> Cc: "10.3" <[email protected]>
* i965: Mark delta_x/y as BAD_FILE if remapped away completely.Kenneth Graunke2014-09-162-5/+15
| | | | | | | | | | | | | | | | | | | | | | | Commit afe3d1556f6b77031f7025309511a0eea2a3e8df (i965: Stop doing remapping of "special" regs.) stopped remapping delta_x/delta_y, and additionally stopped considering them always-live. We later realized delta_x was used in register allocaiton, so we actually needed to remap it, which was fixed in commit 23d782067ae834ad53522b46638ea21c62e94ca3 (i965/fs: Keep track of the register that hold delta_x/delta_y.). However, that commit didn't restore the "always consider it live" part. If all the code using delta_x was eliminated, fs_visitor::delta_x would be left pointing at its old register number. Later code in register allocation would handle that register number specially...even though it wasn't actually delta_x. To combat this, set delta_x/y to BAD_FILE if they're eliminated, and check for that. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83127 Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Cc: "10.3" <[email protected]>
* st_glsl_to_tgsi: init have_sqrt field.Dave Airlie2014-09-161-0/+1
| | | | | | Coverity reported this. Signed-off-by: Dave Airlie <[email protected]>
* llvmpipe: fix rast debugging outputDave Airlie2014-09-161-0/+11
| | | | | | | | The triangle_32_ rast functions never made it into the debug output, confused me for a few seconds. Reviewed-by: Roland Scheidegger <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* util: Add big-endian layout for a number of formats.Richard Sandiford2014-09-162-35/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch builds on 6c8f547f66e68b495c708f8ffcb67370caa5ffe8 and previous patches by allowing u_format.csv to specify separate big-endian and little-endian layouts. It then uses this to specify the correct layouts for various depth/stencil formats. Later patches handle other formats. To recap, the idea is that u_format.csv lists the channels for an N-byte value as though it were an N-byte integer. For little-endian targets the channels are listed starting at the least-significant bit of the integer while for big-endian targets the channels are listed starting at the most-significant bit. This means that for something like PIPE_FORMAT_B8G8R8A8_UNORM (blue in first byte of memory, alpha in last byte of memory) the orders are the same for both endiannesses. But for something like PIPE_FORMAT_S8_UINT_Z24_UNORM, where the stencil is in the least significant byte of a 32-bit integer, there need to be separate channel definitions for each endianness. The effect of this patch is to make the affected PIPE_FORMAT_*s have the same layout as the associated MESA_FORMAT_*s for big-endian. The MESA_FORMAT_*s are already handled correctly. Fixes various piglit tests on z. No regressions on x86_64. [airlied: squash subsequent patches] util: Add big-endian layout for 5551 and 565 formats util: Add big-endian layout for 10/10/10/2 formats util: Add big-endian layout for 4444 formats util: Add big-endian layout for 233 format util: Add big-endian layout for 44 formats Signed-off-by: Dave Airlie <[email protected]>
* llvmpipe: Fix PIPE_FORMAT_Z32_FLOAT_S8X24_UINT handling for big-endian.Richard Sandiford2014-09-161-1/+2
| | | | | | | | | | | | | | | | | llvmpipe treats PIPE_FORMAT_Z32_FLOAT_S8X24_UINT as a bit of a special case, handling it as two 32-bit pieces rather than a single 64-bit block: /* 64bit d/s format is special already extracted 32 bits */ total_bits = format_desc->block.bits > 32 ? 32 : format_desc->block.bits; The format_desc describes the whole 64-bit block, so the z shift will be 32 for big-endian. But since we're accessing the z channel as a 32-bit value rather than a 64-bit value, we need to mask the shift with 31. Signed-off-by: Richard Sandiford <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* gallivm: Fix uses of 2^24Richard Sandiford2014-09-161-4/+4
| | | | | | | | | | Fallback cases in lp_bld_arit.c used 2^24 to mean "2 to the power 24", but in C it's "2 xor 24", i.e. 26. Fixed by using 1<< instead. Signed-off-by: Richard Sandiford <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]> Cc: "10.2 10.3" <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* gallivm: Add SNORM clamping to lp_build_{add, sub}Richard Sandiford2014-09-161-6/+28
| | | | | | | ...fixing the associated TODO. Reviewed-by: Roland Scheidegger <[email protected]> Signed-off-by: Richard Sandiford <[email protected]>
* gallivm: attach DataLayout to module too, not just pass manager.Rafael Ávila de Espíndola2014-09-161-0/+7
| | | | | | | | | It looks like it was possible to attach it to both for a long time, however since llvm r217548 attaching it to just the pass manager is no longer sufficient and causes bugs (see http://llvm.org/bugs/show_bug.cgi?id=20903). Tested-by: Vinson Lee <[email protected]> Reviewed-by: Jose Fonseca <[email protected]>
* gallivm: handle SAMPLE opcode in aos samplingRoland Scheidegger2014-09-162-13/+50
| | | | | | | | | | | This is just a very limited version, in particular sampler and sampler view index must be the same. It cannot handle any modifiers neither. Works much the same as soa version otherwise, to figure out the target we need to store the sampler view dcls. While here, also handle (no-op) RET and get rid of a couple bogus deprecated comments. Reviewed-by: Jose Fonseca <[email protected]>
* tgsi: accept offsets for sample opcodes too in the text parserRoland Scheidegger2014-09-161-3/+2
| | | | | | | | | | sample opcodes are a little oddly represented in the opcode_info, since they don't count as texture instructions - they don't have valid target information, but they may have offsets (unlike "ordinary" texture instructions, the texture token may be optional for them). So just make sure with these opcodes the optional offsets are accepted. Reviewed-by: Jose Fonseca <[email protected]>
* tgsi: don't print texture target for sample opcodesRoland Scheidegger2014-09-161-2/+5
| | | | | | | | sample opcodes don't encode a texture target, it would thus always print UNKNOWN, which is not helpful (and wouldn't parse when giving back the shader text to tgsi). Reviewed-by: Jose Fonseca <[email protected]>
* vc4: Bump maximum ARB program temporaries to match Intel/AMD.Eric Anholt2014-09-151-1/+1
| | | | | This query has always been useless, but we could potentially reject well-formed, runnable programs if we expose a value that's too low.
* vc4: Bump maximum uniforms count to match other drivers.Eric Anholt2014-09-151-1/+1
| | | | | | We don't have any specific limits in the hardware, just like the other GPUs, so match their behavior. Fixes minmax_gles2 and several other piglit tests relying on the specced uniform minmax values.
* vc4: Dynamically allocate the TGSI-to-qreg arrays.Eric Anholt2014-09-152-12/+44
| | | | | Fixes buffer overflows in some piglit tests (which are still failing to register allocate anyway).
* vc4: Fix memory leaks of struct qinst.Eric Anholt2014-09-154-3/+17
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* vc4: Fix memory leaks of some vc4_compile contents.Eric Anholt2014-09-152-10/+11
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* vc4: Reuse the util header instead of defining our own ARRAY_SIZE.Eric Anholt2014-09-151-2/+1
| | | | | Fixes redefinition warnings if you end up including this header before util stuff.
* mesa: move i, j var decls into SWIZZLE_CONVERT_LOOP() macroBrian Paul2014-09-151-36/+38
| | | | | | | Put macro code in do {} while loop and put semicolons on macro calls so auto indentation works properly. Reviewed-by: Jason Ekstrand <[email protected]>
* mesa: break up _mesa_swizzle_and_convert() to reduce compile timeBrian Paul2014-09-151-480/+550
| | | | | | | This reduces gcc -O3 compile time to 1/4 of what it was on my system. Reduces MSVC release build time too. Reviewed-by: Jason Ekstrand <[email protected]>
* Generate a warning when not writing gl_Position with GLES.Kalyan Kondapally2014-09-151-2/+9
| | | | | | | | | | With GLES we don't give any kind of warning in case we don't write to gl_position. This patch makes changes so that we generate a warning in case of GLES (VER < 300) and an error in case of GL. Signed-off-by: Kalyan Kondapally <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* mesa: check that uniform exists in glUniform* functionsTapani Pälli2014-09-151-8/+8
| | | | | | | | | | | | | Remap table for uniforms may contain empty entries when using explicit uniform locations. If no active/inactive variable exists with given location, remap table contains NULL. v2: move remap table bounds check before existence check (Ian Romanick) Signed-off-by: Tapani Pälli <[email protected]> Tested-by: Erik Faye-Lund <[email protected]> (v1) Reviewed-by: Ian Romanick <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83574
* ilo: clean up 3D/media functionsChia-I Wu2014-09-153-205/+188
| | | | Mostly style changes to set dw[0] directly.
* ilo: fix gen6_3DSTATE_MULTISAMPLE()Chia-I Wu2014-09-151-1/+1
| | | | There was a typo introduced by 90f4b131fccae3a950864ed9ba15eea8edce915f.
* freedreno/a3xx: 3d/array texturesRob Clark2014-09-134-7/+102
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: update generated headersRob Clark2014-09-134-4/+22
| | | | Signed-off-by: Rob Clark <[email protected]>
* ilo: trust vertex element count moreChia-I Wu2014-09-141-3/+2
| | | | | | | | | | | We might run into ve->count == 0 and last_velement_edgeflag == true in gen6_3DSTATE_VERTEX_ELEMENTS() when the state tracker sets an invalid combination of VS and VE (does not seem to happen with st/mesa). Do not assume ve->count is positive when last_velement_edgeflag is true. Reported by Coverity. Signed-off-by: Chia-I Wu <[email protected]>
* ilo: simplify src operand gathering in disassemblerChia-I Wu2014-09-141-15/+5
| | | | | | Always initialize the operand array to point to src0, src1, and src2. Signed-off-by: Chia-I Wu <[email protected]>
* ilo: derive 3-src instructions from the opcode tableChia-I Wu2014-09-141-9/+2
| | | | | | One less switch statement to maintain. Signed-off-by: Chia-I Wu <[email protected]>
* nouveau: check for mesa context init failureIlia Mirkin2014-09-131-2/+2
| | | | | | Reported by Coverity Signed-off-by: Ilia Mirkin <[email protected]>
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