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* meson/swr: re-shuffle generated filesGeorge Kyriazis2018-02-054-80/+126
| | | | | | | | | | | | | Move generated files from codegen/meson.build to other directories, in order to satisfy generated include file dependencies Add correct file lists for architecture-specific libraries. cc: [email protected] cc: [email protected] Reviewed-by: Dylan Baker <[email protected]> (cherry picked from commit 16bf8138308008f4b889caa827a8291ff72745b8)
* i965: Call prepare_external after implicit window-system MSAA resolvesJason Ekstrand2018-02-051-0/+15
| | | | | | | | | | This fixes some rendering corruption in a couple of Android apps that use window-system MSAA. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104741 Cc: [email protected] Reviewed-by: Tapani Pälli <[email protected]> (cherry picked from commit 2f7205be47bbb730cdfa0a037224b9ebd5224fd1)
* cherry-ignore: radv: Don't expose VK_KHX_multiview on android.Emil Velikov2018-02-051-0/+3
| | | | | | | stable: The KHX extension is disabled all together in the stable branches. Signed-off-by: Emil Velikov <[email protected]>
* radv: Stop advertising VK_KHX_multiviewEmil Velikov2018-02-051-1/+1
| | | | | | | | We don't want to advertise experimental extensions in actual releases. However, there's no harm in leaving the code lying around in the tree. [Emil Velikov: port from equivalent ANV commit] Signed-off-by: Emil Velikov <[email protected]>
* anv: Stop advertising VK_KHX_multiviewJason Ekstrand2018-02-051-1/+1
| | | | | | | | | | | We don't want to advertise experimental extensions in actual releases. However, there's no harm in leaving the code lying around in the tree. (cherry picked from commit e4371d14f17049e4878966de60cfb88e8cd137cb) Signed-off-by: Emil Velikov <[email protected]> Conflicts: src/intel/vulkan/anv_device.c
* renderonly: fix dumb BO allocation for non 32bpp formatsLucas Stach2018-02-051-1/+2
| | | | | | | | | | | | | Take into account the resource format, instead of applying a hardcoded 32bpp. This not only over-allocates 16bpp formats, but also results in a wrong stride being filled into the handle. Fixes: 848b49b288f ("gallium: add renderonly library") CC: <[email protected]> Signed-off-by: Lucas Stach <[email protected]> Reviewed-by: Philipp Zabel <[email protected]> Reviewed-by: Daniel Stone <[email protected]> (cherry picked from commit 0c71a19fe4368beaaf7ac676403b3079ad658890)
* anv/cmd_buffer: Re-emit the pipeline at every subpassJason Ekstrand2018-02-051-0/+11
| | | | | | | | | | | If we ever hit this edge-case, it can theoretically cause problem for CNL because we could end up changing render targets without re-emitting 3DSTATE_MULTISAMPLE which is part of the pipeline. Just get rid of the edge case. Cc: [email protected] Reviewed-by: Iago Toral Quiroga <[email protected]> (cherry picked from commit 97938dac36e2875001ba24a7968e4cd8e2271321)
* r600/sb: insert the else clause when we might depart from a loopDave Airlie2018-02-051-0/+17
| | | | | | | | | | | | | | | If there is a break inside the else clause and this means we are breaking from a loop, the loop finalise will want to insert the LOOP_BREAK/CONTINUE instruction, however if we don't emit the else there is no where for these to end up, so they will end up in the wrong place. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101442 Tested-By: Gert Wollny <[email protected]> Cc: <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]> Signed-off-by: Dave Airlie <[email protected]> (cherry picked from commit 8d633f067b8a3d74e3f39faea0773a229d4b93b3)
* nir: mark unused space in packed_tex_dataTapani Pälli2018-02-051-0/+1
| | | | | | | | | | | | | | | | | | | | | | | This change cleans following scary warnings in valgrind output when disk cache is being written: ==6532== Uninitialised byte(s) found during client check request ==6532== at 0x14423FAD: blob_write_bytes (blob.c:152) ==6532== by 0x144240FB: blob_write_uint32 (blob.c:194) ==6532== by 0x144001A5: write_tex (nir_serialize.c:613) and later (loads of): ==6532== Use of uninitialised value of size 8 ==6532== at 0x62FCD9E: crc32_z (in /usr/lib64/libz.so.1.2.11) ==6532== by 0x13F65014: util_hash_crc32 (crc32.c:127) ==6532== by 0x13F5DABA: cache_put (disk_cache.c:947) Signed-off-by: Tapani Pälli <[email protected]> Cc: [email protected] Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Emil Velikov <[email protected]> (cherry picked from commit d0343bef6680cc660ba691bbed31a2a1b7449f79)
* i965: fix disk_cache leak when destroying contextTapani Pälli2018-02-051-0/+3
| | | | | | | | | | | | | | | | | ==2780== 1,024 bytes in 1 blocks are possibly lost in loss record 180 of 205 ==2780== at 0x4C31A1E: calloc (vg_replace_malloc.c:711) ==2780== by 0x13F6467E: util_queue_init (u_queue.c:309) ==2780== by 0x13F5C9F6: disk_cache_create (disk_cache.c:369) ==2780== by 0x13F05406: brw_disk_cache_init (brw_disk_cache.c:428) ==2780== by 0x13F01E78: brwCreateContext (brw_context.c:1068) Fixes: 1a61a8b9a7c ("i965: Initialize disk shader cache if MESA_GLSL_CACHE_DISABLE is false") Signed-off-by: Tapani Pälli <[email protected]> Cc: [email protected] Reviewed-by: Iago Toral Quiroga <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Reviewed-by: Jordan Justen <[email protected]> (cherry picked from commit b99c88037bf64b033579f237ec287857c53b0ad6)
* i965: fix prog_data leak in brw_disk_cacheTapani Pälli2018-02-051-0/+2
| | | | | | | | | | | | | | | | ==25481== 576 bytes in 1 blocks are definitely lost in loss record 179 of 208 ==25481== at 0x4C2FB6B: malloc (vg_replace_malloc.c:299) ==25481== by 0x1404E2CC: ralloc_size (ralloc.c:121) ==25481== by 0x14119F82: read_and_upload (brw_disk_cache.c:176) ==25481== by 0x1411A5C9: brw_disk_cache_upload_program (brw_disk_cache.c:271) ==25481== by 0x1412FCA4: brw_upload_wm_prog (brw_wm.c:597) Fixes: 516d50db319 ("i965: add initial implementation of on disk shader cache") Cc: [email protected] Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]> Reviewed-by: Emil Velikov <[email protected]> (cherry picked from commit 28db950b51274ce296cd625db62abe935d1e4ed9)
* r600/eg: construct proper rat mask for image/buffers.Dave Airlie2018-02-053-8/+30
| | | | | | | | | | | If the images/buffer bindings had a gap, this produced the wrong values, this should fix that to generate the correct rat mask for mixes of images/buffers/cbs. Reviewed-by: Roland Scheidegger <[email protected]> Cc: "18.0" <[email protected]> Signed-off-by: Dave Airlie <[email protected]> (cherry picked from commit e0e23ea69cab23b9193b1e7c568fd23fc7073071)
* winsys/amdgpu: fix assertion failure with UVD and VCE ringsMarek Olšák2018-02-051-2/+1
| | | | | Cc: 18.0 <[email protected]> (cherry picked from commit 17423c993d0b083c7a77a404b85788687f5efe36)
* Update version to 18.0.0-rc3mesa-18.0.0-rc3Emil Velikov2018-01-291-1/+1
| | | | Signed-off-by: Emil Velikov <[email protected]>
* cherry-ignore: add patches picked without -xEmil Velikov2018-01-261-0/+3
| | | | Signed-off-by: Emil Velikov <[email protected]>
* anv_icd.py: improve reproducible buildsMaxin B. John2018-01-261-1/+1
| | | | | | | | | | | Sort the output to ensure build reproducibility Signed-off-by: Maxin B. John <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Fixes: 0ab04ba979b ("anv: Use python to generate ICD json files") Reviewed-by: Dylan Baker <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> (cherry picked from commit 8116b9170bc36bb15512f97a7680ad97bddd56a8)
* radeonsi: Export signalled sync file instead of -1.Bas Nieuwenhuizen2018-01-263-0/+29
| | | | | | | | | -1 is considered an error for EGL_ANDROID_native_fence_sync, so we need to actually create a sync file. Fixes: f536f45250 "radeonsi: implement sync_file import/export" Reviewed-by: Dave Airlie <[email protected]> (cherry picked from commit 5a3404d443e0c6e8e9a44d7f8dccf96c5ac18f0f)
* radv: don't enable tc compat for d32s8 + 4/8 samples (v1.1)Dave Airlie2018-01-261-1/+2
| | | | | | | | | | | | | | | | | | | This seems to be broken, at least the cts tests fail. This fixes: dEQP-VK.renderpass.suballocation.multisample.d32_sfloat_s8_uint.samples_4 dEQP-VK.renderpass.suballocation.multisample.d32_sfloat_s8_uint.samples_8 2 samples seems to pass fine, amdvlk doesn't appear to enable TC for possibly some other reasons here. This is most likely a hack. v1.1: add a bit of explaination text. (Samuel) Fixes: ad3d98da9 (radv: enable tc compatible htile for d32s8 also.) Signed-off-by: Dave Airlie <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> (cherry picked from commit f4c534ef68a479055190f8ec8d551be0f56ef361)
* configure.ac: correct driglx-direct help textEmil Velikov2018-01-261-1/+1
| | | | | | | | | | | The default was toggled a while back, but the text wasn't updated. Fixes: bd526ec9e1b ("configure: Always default to --enable-driglx-direct") Cc: Jon TURNEY <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Daniel Stone <[email protected]> (cherry picked from commit 6aeef5464497a2dfd2eb63c7e4aa3349c7794eae)
* gallivm: fix crash with seamless cube filtering with different min/mag filterRoland Scheidegger2018-01-261-17/+21
| | | | | | | | | | | | | | | We are not allowed to modify the incoming coords values, or things may crash (as we may be inside a llvm conditional and the values may be used in another branch). I recently broke this when fixing an issue with NaNs and seamless cube map filtering, and it causes crashes when doing cubemap filtering if the min and mag filters are different. Add const to the pointers passed in to prevent this mishap in the future. Fixes: a485ad0bcd ("gallivm: fix an issue with NaNs with seamless cube filtering") Reviewed-by: Jose Fonseca <[email protected]> (cherry picked from commit 4fe662c58f6453b3558de479e7c2bfe4158dc26c)
* meson: handle LLVM 'x.x.xgit-revision' versionsGreg V2018-01-261-2/+6
| | | | | | | | | | | | When LLVM is built inside of a git repo (even way below, e.g. /usr/ports/.git exists, and LLVM is built in /usr/ports/devel/llvm50/work), its version becomes something like 5.0.0git-f8ab206b2176. New meson versions already handle this, but we support older versions too. Fixes: 673dda8330769 ("meson: build "radv" vulkan driver for radeon hardware") Reviewed-by: Dylan Baker <[email protected]> (cherry picked from commit 8fae5eddd9982f4586d76471d0196befeb46de24)
* meson: fix getting cflags from pkg-configGreg V2018-01-261-4/+6
| | | | | | | | | | | | | | | get_pkgconfig_variable('cflags') always returns an empty list, it's a function for getting *custom* variables. Meson does not yet support asking for cflags, so explicitly invoke pkg-config for now. Fixes: 68076b87474e ("meson: build gallium vdpau state tracker") Fixes: a817af8a89eb ("meson: build gallium xvmc state tracker") Fixes: 1d36dc674d52 ("meson: build gallium omx state tracker") Fixes: 5a785d51a6d6 ("meson: build gallium va state tracker") Reviewed-by: Dylan Baker <[email protected]> (cherry picked from commit 53f9131205a63fa8b282ab2a7e96c48209447da0)
* meson: fix missing dependenciesGreg V2018-01-262-2/+2
| | | | | | | Fixes: 66f97f6640f5 ("meson: build radeonsi") Reviewed-by: Emil Velikov <[email protected]> Reviewed-by: Dylan Baker <[email protected]> (cherry picked from commit 7c8cfe2d59bfc0dbf718a74b08b6dceaa84f7242)
* meson: correctly set SYSCONFDIR for loading dirrcDylan Baker2018-01-261-2/+6
| | | | | | | | Fixes: d1992255bb29 ("meson: Add build Intel "anv" vulkan driver") Reported-by: Marc Dietrich <[email protected]> Signed-off-by: Dylan Baker <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> (cherry picked from commit 5781c3d1db4a01e77f416c1685025c4d830ae87d)
* radv: move spi_baryc_cntl to pipelineDave Airlie2018-01-263-5/+5
| | | | | | | | | | | | | We need to enable the pos float location 2 mode anytime we have persample not just when forced by the frag shader. This fixes: dEQP-VK.pipeline.multisample.min_sample_shading* Fixes: 58c97a079 (radv: enable location at sample when persample is forced.) Reviewed-by: Samuel Pitoiset <[email protected]> Signed-off-by: Dave Airlie <[email protected]> (cherry picked from commit 298554541da220ebdcd9aa9b9055ede2481d5817)
* meson: Fix define for USE_SSE41Scott D Phillips2018-01-261-1/+1
| | | | | | | | | | | | Before we were adding -DHAVE_SSE41 which isn't what the code is looking for, so some uses of the sse4.1 code were always being skipped. v2: Don't add any compile check for the quite old -msse4.1 option (Dylan) Fixes: 84486f6462 ("meson: Enable SSE4.1 optimizations") Reviewed-by: Dylan Baker <[email protected]> (cherry picked from commit 0b8d38bd48b219bd979b2ee0ef1ce2b7184f7095)
* vbo: fix incorrect min/max_index values in display list draw callBrian Paul2018-01-263-3/+8
| | | | | | | | | | | | | | | This fixes another regression from commit 8e4efdc895ea ("vbo: optimize some display list drawing"). The problem was the min_index, max_index values passed to the vbo drawing function were not computed to compensate for the biased prim::start values. https://bugs.freedesktop.org/show_bug.cgi?id=104746 https://bugs.freedesktop.org/show_bug.cgi?id=104742 https://bugs.freedesktop.org/show_bug.cgi?id=104690 Tested-by: Clayton Craft <[email protected]> Fixes: 8e4efdc895ea ("vbo: optimize some display list drawing") Reviewed-by: Emil Velikov <[email protected]> (cherry picked from commit 365a48abddcabf6596c2e34a784d91c8ab929918)
* radv: fix sample_mask_in loading. (v3.1)Dave Airlie2018-01-264-6/+56
| | | | | | | | | | | | | | | This is ported from radeonsi and fixes: dEQP-VK.pipeline.multisample_shader_builtin.sample_mask.bit_* v2: don't call this path for radeonsi, it does it in the epilog. use the radeonsi code path. v3: handle NULL pCreateInfo->pMultisampleState properly (Samuel) v3.1: set ps_iter_samples default to 1 (Bas) Reviewed-by: Bas Nieuwenhuizen <[email protected]> Fixes: bdcbe7c76 (radv: add sample mask input support) Signed-off-by: Dave Airlie <[email protected]> (cherry picked from commit 766589d89a211e67f313e8cb38f2d05b09975f96)
* radv: don't use hw resolves for r16g16 norm formats.Dave Airlie2018-01-261-1/+4
| | | | | | | | | | | | | | radeonsi has a workaround for this, but it uses a R16A16 format, which vulkan doesn't have, we could probably come up with a work around but for now just avoid hw resolves. Fixes: dEQP-VK.renderpass.suballocation.multisample.r16g16_*norm* Reviewed-by: Bas Nieuwenhuizen <[email protected]> Fixes: 2a04f5481d (radv/meta: select resolve paths) Signed-off-by: Dave Airlie <[email protected]> (cherry picked from commit c727ea9370adc5362e00208b9f1481764b8ef215)
* radv: don't use hw resolve for integer image formatsDave Airlie2018-01-261-0/+5
| | | | | | | | | | | | | | | From reading AMDVLK it currently never uses hw resolve paths. This patch takes from radeonsi which doesn't use hw resolve for integer formats, and does the same for radv. This fixes: dEQP-VK.renderpass.suballocation.multisample*uint tests. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Fixes: 2a04f5481d (radv/meta: select resolve paths) Signed-off-by: Dave Airlie <[email protected]> (cherry picked from commit 4df414bbd2f1a44840c982198f4c8353f242ca15)
* radv: add fs_key meta format support to resolve passes.Dave Airlie2018-01-262-30/+61
| | | | | | | | | | | | | Some of the hw resolve passes need the SPI color format setup correctly. This fixes lots of 16-bit and 32-bit format tests in dEQP-VK.renderpass.suballocation.multisample* Reviewed-by: Bas Nieuwenhuizen <[email protected]> Fixes: f4e499ec7914 "radv: add initial non-conformant radv vulkan driver" Signed-off-by: Dave Airlie <[email protected]> (cherry picked from commit 316d762186f0bfc225b82794fdae520275a448db)
* meson: remove lib prefix from libd3dadapter9.soChristoph Haag2018-01-261-0/+1
| | | | | | | Fixes: 6b4c7047d57178d336 ("meson: build gallium nine state_tracker") Reviewed-by: Eric Engestrom <[email protected]> Reviewed-by: Dylan Baker <[email protected]> (cherry picked from commit 4b4d929c27f1c395bb4ca6ef035dee7303ff5723)
* radeon: remove left over dead codeEric Engestrom2018-01-261-6/+0
| | | | | | | | Fixes: 4e0d99a63588c67a955f "r100: Use shared debug code" Cc: Pauli Nieminen <[email protected]> Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Eric Anholt <[email protected]> (cherry picked from commit eee8dd7c3360ec0daf3d44168b6d1c32c52bf69b)
* i965/gen10: Re-enable push constants.Rafael Antognolli2018-01-261-9/+0
| | | | | | | | | | | The GPU hang caused by push constants is apparently fixed, so let's enable them again. Signed-off-by: Rafael Antognolli <[email protected]> Cc: "18.0" <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> (cherry picked from commit bcfd78e4489f538e34138269650fc6cbe8c9d75f)
* anv/gen10: Ignore push constant packets during context restore.Rafael Antognolli2018-01-262-0/+48
| | | | | | | | | | | | Similar to the GL driver, ignore 3DSTATE_CONSTANT_* packets when doing a context restore. Signed-off-by: Rafael Antognolli <[email protected]> Cc: Jason Ekstrand <[email protected]> Cc: "18.0" <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> (cherry picked from commit 78c125af3904c539ea69bec2dd9fdf7a5162854f)
* i965/gen10: Ignore push constant packets during context restore.Rafael Antognolli2018-01-263-0/+54
| | | | | | | | | | | | | | | | | These packets were causing GPU hangs when the context was restored, possibly because they were pointing to BO's that were already unreferenced. So we tell the hardware to ignore such packets after the batch buffer ends, since we know those BO's are not around anymore. This change fixes GPU hangs on CNL. The (partial) solution to this problem so far was to entirely disable push constants on this platform. Signed-off-by: Rafael Antognolli <[email protected]> Cc: Kenneth Graunke <[email protected]> Cc: "18.0" <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> (cherry picked from commit ca19ee33d7d39cb89d948b1c983763065975ce5b)
* mesa: Fix function pointers initialization in status trackerEleni Maria Stea2018-01-261-2/+2
| | | | | | | | | | | We assigned the function that gets the device uuid to the GetDriverUuid function pointer and the function that gets the driver uuid to the GetDeviceUuid function pointer inside the state tracker. Exchanged the pointers. cc: [email protected] Reviewed-by: Brian Paul <[email protected]> (cherry picked from commit 8096b558a7d769b20b1545b83399d67b8a3df94a)
* ac/nir: set amdgpu.uniform and invariant.load for UBOsSamuel Pitoiset2018-01-261-1/+7
| | | | | | | | | | | UBOs are constants buffers. Cc: "18.0" <[email protected]> Fixes: 41c36c45 ("amd/common: use ac_build_buffer_load() for emitting UBO loads") Signed-off-by: Samuel Pitoiset <[email protected]> Tested-by: Alex Smith <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> (cherry picked from commit 49b0a140a731069e0e4959c65bfd1b597a4fb141)
* anv/pipeline: Don't look at blend state unless we have an attachmentJason Ekstrand2018-01-261-3/+3
| | | | | | | | | | | | | Without this, we may end up dereferencing blend before we check for binding->index != UINT32_MAX. However, Vulkan allows the blend state to be NULL so long as you don't have any color attachments. This fixes a segfault when running The Talos Principal. Fixes: 12f4e00b69e724a23504b7bd3958fb75dc462950 Cc: [email protected] Reviewed-by: Alex Smith <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> (cherry picked from commit c8949e24984266cca3593291c30ea199baef5358)
* i965/fs: Reset the register file to VGRF in lower_integer_multiplicationJason Ekstrand2018-01-261-5/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 18fde36ced4279f2577097a1a7d31b55f2f5f141 changed the way temporary registers were allocated in lower_integer_multiplication so that we allocate regs_written(inst) space and keep the stride of the original destination register. This was to ensure that any MUL which originally followed the CHV/BXT integer multiply regioning restrictions would continue to follow those restrictions even after lowering. This works fine except that I forgot to reset the register file to VGRF so, even though they were assigned a number from alloc.allocate(), they had the wrong register file. This caused some GLES 3.0 CTS tests to start failing on Sandy Bridge due to attempted reads from the MRF: ES3-CTS.functional.shaders.precision.int.highp_mul_fragment.snbm64 ES3-CTS.functional.shaders.precision.int.mediump_mul_fragment.snbm64 ES3-CTS.functional.shaders.precision.int.lowp_mul_fragment.snbm64 ES3-CTS.functional.shaders.precision.uint.highp_mul_fragment.snbm64 ES3-CTS.functional.shaders.precision.uint.mediump_mul_fragment.snbm64 ES3-CTS.functional.shaders.precision.uint.lowp_mul_fragment.snbm64 This commit remedies this problem by, instead of copying inst->dst and overwriting nr, just make a new register and set the region to match inst->dst. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103626 Fixes: 18fde36ced4279f2577097a1a7d31b55f2f5f141 Cc: "17.3" <[email protected]> Reviewed-by: Matt Turner <[email protected]> (cherry picked from commit db682b8f0eafd3b9d58e736e9e2f520943a89942)
* configure.ac: add missing llvm dependencies to .pc filesChuck Atkins2018-01-261-0/+12
| | | | | | | | | v2: Only add as dependencies for gallium-osmesa and gallium-xlib CC: <[email protected]> Signed-of-by: Chuck Atkins <[email protected]> Reviewed-by: Emil Velikov <[email protected]> (cherry picked from commit 6ac5e851f1a0b83d84156bc79983fd9527d4c296)
* swr/rast: support llvm 3.9 type declarationsGeorge Kyriazis2018-01-261-0/+14
| | | | | | | | | | | LLVM 3.9 was not taken into account in initial check-in. Fixes: 01ab218bbc ("swr/rast: Initial work for debugging support.") cc: [email protected] Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104749 Acked-by: Emil Velikov <[email protected]> Reviewed-by: Bruce Cherniak <[email protected]> (cherry picked from commit 0e879aad2fd1dac102c13d680edf455aa068d5df)
* i965/draw: Set NEW_AUX_STATE when draw aux changesJason Ekstrand2018-01-261-1/+4
| | | | | | | | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104411 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104383 Fixes: ea0d2e98ecb369ab84e78c84709c0930ea8c293a Cc: [email protected] Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> (cherry picked from commit 20f70ae3858bc213e052a8434f0e637eb36203c4)
* i965: Replace draw_aux_buffer_disabled with draw_aux_usageJason Ekstrand2018-01-264-35/+27
| | | | | | | | | | | | Instead of keeping an array of booleans, we now hang onto an array of isl_aux_usage enums. This means that the thing we are passing from brw_draw.c to surface state setup is the thing that surface state setup actually needs instead of an input to compute what it needs. Cc: [email protected] Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> (cherry picked from commit e52a9f18d69c94b7cb7f81361cdb9e2582c3d742)
* i965/surface_state: Drop brw_aux_surface_disabledJason Ekstrand2018-01-261-20/+0
| | | | | | | | | | | | | | The only purpose of this function is to disable aux on texture surfaces when the corresponding renderbuffer has aux disabled. However, the act of disabling aux on the renderbuffer will cause it to be resolved and intel_miptree_texture_aux_usage will already check the resolved status of a texture and return ISL_AUX_USAGE_NONE for it. Even if we used CCS for it, that wouldn't really be a problem because the CCS will be in the pass-through state and so it would effectively be ignored. Cc: [email protected] Reviewed-by: Kenneth Graunke <[email protected]> (cherry picked from commit 468ea3cc451f2c71e7d1be528090cb0334d500c2)
* i965/miptree: Add an aux_disabled parameter to render_aux_usageJason Ekstrand2018-01-265-8/+17
| | | | | | | | | | | | | | | | | | | | | Only one of the callers of intel_miptree_render_aux_usage actually took brw->draw_aux_buffer_disabled into account. This was causing us to ignore draw_aux_buffer_disabled for the intel_miptree_prepare_render. This isn't a problem because the draw_aux_buffer_disabled entry was set during texture preparation and we already did the resolve at that time. However, this also meant that the aux_usage we were passing to brw_cache_flush_for_render and brw_render_cache_add_bo was wrong so our automatic cache flushing around aux_usage changes wasn't happening. This was causing GPU hangs in Oxenfree. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104711 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104411 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104383 Fixes: ea0d2e98ecb369ab84e78c84709c0930ea8c293a Cc: [email protected] Reviewed-by: Iago Toral Quiroga <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> (cherry picked from commit d38ec24f531fac0b53c406a09d17427309a3ffca)
* i965/miptree: Take an aux_usage in prepare/finish_renderJason Ekstrand2018-01-264-16/+8
| | | | | | | | | | | Both callers of intel_miptree_prepare/finish_render have to call intel_miptree_render_aux_usage anyway for other reasons. They may as well pass the result in instead of us calling it again. Cc: [email protected] Reviewed-by: Iago Toral Quiroga <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> (cherry picked from commit dfe02179055b2504303e23988ab3d446b40de05a)
* meson: fix BSD buildGreg V2018-01-261-26/+28
| | | | | | | CC: 18.0 <[email protected]> Reviewed-by: Dylan Baker <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> (cherry picked from commit c38c60a63c63b02d1030c6c349aa0a73105e10eb)
* radeonsi: don't ignore pitch for imported texturesMarek Olšák2018-01-261-2/+12
| | | | | | | Cc: 17.2 17.3 <[email protected]> Tested-by: Dieter Nützel <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]> (cherry picked from commit 022c5b22fee5d92da67f48601ea80b1c810a829d)
* i965: Don't try to disable render aux buffers for computeTopi Pohjolainen2018-01-261-2/+4
| | | | | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104546 Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]> (cherry picked from commit ec4bb693a0175744465f272a8bcea2db043ba1bc)
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