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* mesa: move pipeline input/output validation inside ↵Timothy Arceri2015-12-071-15/+15
| | | | | | | | | | | | _mesa_validate_program_pipeline() This allows validation to be done on rendering calls also. Fixes 3 dEQP-GLES31.functional.separate tests. Cc: "11.1" <[email protected]> Reviewed-by: Tapani Pälli <[email protected]> Cc: Kenneth Graunke <[email protected]>
* glsl: re-validate program pipeline after sampler changeTimothy Arceri2015-12-071-0/+4
| | | | | | | Cc: "11.1" <[email protected]> Reviewed-by: Tapani Pälli <[email protected]> Cc: Kenneth Graunke <[email protected]> https://bugs.freedesktop.org/show_bug.cgi?id=93180
* r600: apply SIMD workaround to cayman also.Dave Airlie2015-12-071-1/+8
| | | | | | | | | | | At last on ARUBA this is required to stop tessellation hanging in heaven. This removes one of the SIMDs from use by the HS/LS. Reviewed-by: Edward O'Callaghan <[email protected]> Tested-by: Edward O'Callaghan <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* r600: fix regression introduced with ring emit changes.Dave Airlie2015-12-071-1/+2
| | | | This was adding one after a CUT which broke end primitive
* r600: remove stale tessellation commentDave Airlie2015-12-071-1/+0
| | | | | | pointed out by Marek. Signed-off-by: Dave Airlie <[email protected]>
* docs: consolidate r600 entry in GL3.txtDave Airlie2015-12-071-14/+14
| | | | Though fp64 emulation still needs to be done for a lot of the evergreen hw.
* docs: update with r600 tessellation status.Dave Airlie2015-12-072-1/+2
| | | | Signed-off-by: Dave Airlie <[email protected]>
* r600: enable tessellation for evergreen/cayman (v2)Dave Airlie2015-12-071-1/+9
| | | | | | | | | | This enables tessellation for evergreen/cayman, This will need changes before committing depending on what hw works etc. working are CAYMAN/REDWOOD/BARTS/TURKS/SUMO/CAICOS v2: only enable on evergreen and above.
* r600g: reduce number of ps thread on caicosDave Airlie2015-12-071-1/+1
| | | | | | this allows tess apps to start Signed-off-by: Dave Airlie <[email protected]>
* r600g: adjust ls/hs thread counts for sumoDave Airlie2015-12-071-4/+4
| | | | | | these stop tess hangs here. Signed-off-by: Dave Airlie <[email protected]>
* r600/asm: enable nstack check for tess ctrl/eval shaders.Dave Airlie2015-12-071-1/+1
| | | | | | | This just makes sure they register at least one stack usage frame like vertex shaders. Signed-off-by: Dave Airlie <[email protected]>
* r600/asm: handle lds read operations.Dave Airlie2015-12-071-1/+21
| | | | | | | | | Reads from the queue shouldn't be merged for now read operations. Reads from the queue shouldn't be merged for now, or put in T slots. Signed-off-by: Dave Airlie <[email protected]>
* r600/asm: add LDS ops and barrier to the once per group restriction.Dave Airlie2015-12-071-1/+1
| | | | | | | LDS ops must be scheduled in X slot, and barrier should be on its own in a group. Signed-off-by: Dave Airlie <[email protected]>
* r600: move VGT_VTX_CNT_EN into shader stages atom.Dave Airlie2015-12-071-2/+2
| | | | | | This should be enabled for tessellation shaders as well. Signed-off-by: Dave Airlie <[email protected]>
* r600: enable tcs/tes dumping for R600_DUMP_SHADERS.Dave Airlie2015-12-071-1/+1
| | | | | | Trivial patch just to enable dumping more. Signed-off-by: Dave Airlie <[email protected]>
* r600: handle SIMD allocation issue with HS/LSDave Airlie2015-12-071-0/+5
| | | | | | | | | At least one SIMD must be kept away from the HS/LS stages in order to avoid a hw issue on evergreen/cayman. This patch implements this workaround. Signed-off-by: Dave Airlie <[email protected]>
* r600/shader: increase number of inputs/outputs to 64.Dave Airlie2015-12-071-2/+2
| | | | | | Tessellation exceeds these sometimes, so increase them for now. Signed-off-by: Dave Airlie <[email protected]>
* r600: handle barrier opcode.Edward O'Callaghan2015-12-071-2/+17
| | | | | | | This handles the barrier opcode for EG/CM. Signed-off-by: Edward O'Callaghan <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* r600/shader: handle tess related system-values.Dave Airlie2015-12-071-2/+148
| | | | | | | | | | This adds handling for TESSINNER/TESSOUTER in the TES where they need to be fetched from LDS, and TESSCOORD which comes in via r0. It also handle primitive ID and invocation ID. Signed-off-by: Dave Airlie <[email protected]>
* r600/shader: allow multi-dimension arrays for tcs/tes inputs/outputs.Dave Airlie2015-12-071-2/+10
| | | | | | This just allows multi-dim arrays to be processed. Signed-off-by: Dave Airlie <[email protected]>
* r600/shader: handle TES exports and streamoutDave Airlie2015-12-071-7/+16
| | | | | | | | | | when tessellation is enabled the TES shader is responsible for handling streamout and exports. This adds the streamout and export workarounds to TES, and also makes sure TES sets up spi_sid. Signed-off-by: Dave Airlie <[email protected]>
* r600/shader: emit tessellation factors to GDS at end of TCS.Dave Airlie2015-12-071-1/+166
| | | | | | | | | | When we are finished the shader, we read back all the tess factors from LDS and write them to special global memory storage using GDS instructions. This also handles adding NOP when GDS or ENDLOOP end the TCS. Signed-off-by: Dave Airlie <[email protected]>
* r600/shader: handle TCS output writing.Dave Airlie2015-12-071-2/+98
| | | | | | | | | | TCS outputs whenever they are written in the shader, need to be written to LDS not temporaries, this handles this case. It also fixes up the case where the output is a relative addressed output, so we don't try to apply the relative address at the wrong time. Signed-off-by: Dave Airlie <[email protected]>
* r600/shader: handle VS shader writing to the LDS outputs. (v1.1)Dave Airlie2015-12-071-1/+75
| | | | | | | | This writes the VS shaders outputs to the LDS memory in the correct places. v1.1: use 24-bit Signed-off-by: Dave Airlie <[email protected]>
* r600/shader: handle fetching tcs/tes inputs and tcs outputsDave Airlie2015-12-071-1/+279
| | | | | | | | | | This handles the logic for doing fetches from LDS for TCS and TES. For TCS we need to fetch both inputs and outputs, for TES only inputs need to be fetched. v2: use 24-bit ops. Signed-off-by: Dave Airlie <[email protected]>
* r600/shader: add get_lds_offset0 helperDave Airlie2015-12-071-0/+22
| | | | | | | | This retrievs the offset into the LDS for a patch or non-patch variable, it takes the RelPatch channel and a temporary register. Signed-off-by: Dave Airlie <[email protected]>
* r600/shader: add function to get tess constants infoDave Airlie2015-12-071-1/+90
| | | | | | | | | This function retrieves the tess input/output info from the tess constant buffer that is bound to the shader. This uses a vfetch to get the values into the shader. Signed-off-by: Dave Airlie <[email protected]>
* r600/shader: add utility functions to do single slot arithmaticDave Airlie2015-12-071-0/+95
| | | | | | | | | These utilities are to be used to do things like integer adds and multiplies to be used in calculating the LDS offsets etc. It handles CAYMAN MULLO differences as well. Signed-off-by: Dave Airlie <[email protected]>
* r600/eg: workaround bug with tess shader and dynamic GPRs.Dave Airlie2015-12-075-61/+190
| | | | | | | | | | | | When using tessellation on eg/ni chipsets, we must disable dynamic GPRs to workaround a hw bug where the GPU hangs when too many things get queued. This implements something like the r600 code to emit the transition between static and dynamic GPRs, and to statically allocate GPRs when tessellation is enabled. Signed-off-by: Dave Airlie <[email protected]>
* r600/shader: move get_temp and last_instruction helpers upDave Airlie2015-12-071-19/+17
| | | | | | These are required for tess to be used earlier. Signed-off-by: Dave Airlie <[email protected]>
* r600: bind geometry shader ring to the correct placeDave Airlie2015-12-071-2/+9
| | | | | | | When tess/gs are enabled, the geom shader ring needs to bind to the tess eval not the vertex shader. Signed-off-by: Dave Airlie <[email protected]>
* r600: create fixed function tess control shader fallback.Dave Airlie2015-12-073-1/+46
| | | | | | | If we have no tess control shader, then we have to use a fallback one that just writes the tessellation factors. Signed-off-by: Dave Airlie <[email protected]>
* r600: create LDS info constants buffer and write LDS registers. (v2)Dave Airlie2015-12-073-3/+188
| | | | | | | | | | | | | | This creates a constant buffer with the information about the layout of the LDS memory that is given to the vertex, tess control and tess evaluation shaders. This also programs the LDS size and the LS_HS_CONFIG registers, on evergreen only. v2: calculate lds hs num waves properly (Marek) Emit the state only when something has changed (airlied). Signed-off-by: Dave Airlie <[email protected]>
* r600/eg: update shader stage emission/tf param for tess.Dave Airlie2015-12-071-5/+69
| | | | | | | | This update the setting of the shader stages register when tess is enabled and add the setting of the VGT_TF_PARAM register from the tess shader properties. Signed-off-by: Dave Airlie <[email protected]>
* r600: hook TES/TCS shaders to the selection logic.Dave Airlie2015-12-071-2/+32
| | | | | | This hooks the TES/TCS bindings to the HW stages up. Signed-off-by: Dave Airlie <[email protected]>
* r600: workout bitmask for the used tcs inputs/outputs.Dave Airlie2015-12-072-0/+28
| | | | | | | This is used later to setup the constants to be given to the tessellation shaders. Signed-off-by: Dave Airlie <[email protected]>
* r600: port over the get_lds_unique_index from radeonsiDave Airlie2015-12-072-0/+39
| | | | | | On r600 this needs to subtract 9 due to texcoord interactions. Signed-off-by: Dave Airlie <[email protected]>
* r600: add set_tess_state callback.Dave Airlie2015-12-072-1/+12
| | | | | | | This just stores the values in the context to be used later when emitting the constant buffers. Signed-off-by: Dave Airlie <[email protected]>
* r600/eg: init tess registers to defaults (v1.1)Dave Airlie2015-12-071-10/+31
| | | | | | | | | | This initialises the tess min/max using fglrx values, and also initialises a number of other registers related to tessellation. v1.1: caicos doesn't have some registers. Signed-off-by: Dave Airlie <[email protected]>
* r600: hook up constants/samplers/sampler view for tessellationDave Airlie2015-12-072-10/+82
| | | | | | | This hooks the resources to the correct hw shaders when tess is enabled. Signed-off-by: Dave Airlie <[email protected]>
* r600: add create/bind/delete shader hooks for tessellationDave Airlie2015-12-071-0/+59
| | | | | | This hooks up the gallium API for the tessellation shaders. Signed-off-by: Dave Airlie <[email protected]>
* r600/sb: add LS/HS hw shader types.Dave Airlie2015-12-073-3/+9
| | | | | | | This just adds printing for the hw shader types, and hooks it up. Reviewed-by: Glenn Kennard <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* r600/blit: add tcs/tes shader saves.Dave Airlie2015-12-071-0/+2
| | | | Signed-off-by: Dave Airlie <[email protected]>
* r600: disable SB for now on tess related shaders.Dave Airlie2015-12-071-0/+7
| | | | | | | Note we have to disable on vertex shaders when we are operating in tes mode. Signed-off-by: Dave Airlie <[email protected]>
* r600: update correct hw shaders depending on configuration.Dave Airlie2015-12-071-1/+12
| | | | | | | This updates the tess hw shaders from the sw ones routing things correctly. Signed-off-by: Dave Airlie <[email protected]>
* r600: add shader key entries for tcs and tes.Dave Airlie2015-12-075-3/+49
| | | | | | | with tessellation vs can now run on ls, and tes can run on vs or es, tcs runs on hs. Signed-off-by: Dave Airlie <[email protected]>
* r600: add PATCHES to the pipe conversion.Dave Airlie2015-12-071-0/+1
| | | | | | This just converts the value to the hw value. Signed-off-by: Dave Airlie <[email protected]>
* r600: add functions to update ls/hs state.Dave Airlie2015-12-072-0/+27
| | | | | | | This just adds the two functions, these will get hooked up later in the shader code. Signed-off-by: Dave Airlie <[email protected]>
* r600g/sb: Support LDS ops in SB bytecode I/OGlenn Kennard2015-12-074-9/+105
| | | | | | | This just adds the LDS ops to the SB bytecode reader/writers. Signed-off-by: Glenn Kennard <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* r600: add support for LDS instruction encoding.Dave Airlie2015-12-074-2/+144
| | | | | | | | | | These are used in tessellation shaders to read/write values between VS/TCS/TES. This splits the eg alu assembler out to handle these instructions. Signed-off-by: Dave Airlie <[email protected]>
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