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* glx: Undo memory allocation checking damage.Matt Turner2016-07-081-5/+1
| | | | | | | | | | | | | | | | | | | | | | | This partially reverts commit d41f5396f3cb619729021390c273f838d92f11fb. That untested commit broke the tex-skipped-unit piglit test and the arbvparray Mesa demo when run with indirect GLX. state->array_state is used during initialization, so its assignment cannot be moved to the end of the function. The backtrace looked like: Program received signal SIGSEGV, Segmentation fault. 0x00007ffff77c7a5c in __glXGetActiveTextureUnit (state=0x6270e0) at indirect_vertex_array.c:1952 1952 return state->array_state->active_texture_unit; (gdb) bt 0 0x00007ffff77c7a5c in __glXGetActiveTextureUnit (state=0x6270e0) at indirect_vertex_array.c:1952 1 0x00007ffff77cbf62 in get_client_data (gc=0x626f50, cap=34018, data=0x7fffffffd7a0) at single2.c:159 2 0x00007ffff77cce51 in __indirect_glGetIntegerv (val=34018, i=0x7fffffffd830) at single2.c:498 3 0x00007ffff77c4340 in __glXInitVertexArrayState (gc=0x626f50) at indirect_vertex_array.c:193 Reviewed-by: Ian Romanick <[email protected]>
* glx: Fix indirect multi-texture GL_DOUBLE coordinate arrays.Colin McDonald2016-07-082-30/+50
| | | | | | | | | | | | | | | | | | | | | | There is no draw arrays protocol support for multi-texture coordinate arrays, so it is implemented by sending batches of immediate mode commands from emit_element_none in indirect_vertex_array.c. This sends the target texture unit (which has been previously setup in the array_state header field), followed by the texture coordinates. But for GL_DOUBLE coordinates the texture unit must be sent *after* the texture coordinates. This is documented in the glx protocol description, and can also be seen in the indirect.c immediate mode commands generated from gl_API.xml. Sending the target texture unit in the wrong place can crash the remote X server. To fix this required some more extensive changes to indirect_vertex_array.c and indirect_vertex_array_priv.h, in order to remove the texture unit value out of the array_state "header" field, and send it separately. Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=61907
* glx: Correct opcode typos in __indirect_glTexCoordPointer.Colin McDonald2016-07-081-5/+14
| | | | | | | | | At the same time, replace opcode numbers with names in __indirect_glVertexAttribPointer. Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=61907
* glx: Call __glXInitVertexArrayState() with a usable gc.Colin McDonald2016-07-082-8/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For each indirect context the indirect vertex array state must be initialised by __glXInitVertexArrayState in indirect_vertex_array.c. As noted in the routine header it requires that the glx context has been setup prior to the call, in order to test the server version and extensions. Currently __glXInitVertexArrayState is called from indirect_bind_context in indirect_glx.c, as follows: state = gc->client_state_private; if (state->array_state == NULL) { glGetString(GL_EXTENSIONS); glGetString(GL_VERSION); __glXInitVertexArrayState(gc); } But, the gc context is not yet usable at this stage, so the server queries fail, and __glXInitVertexArrayState is called without the server version and extension information it needs. This breaks multi-texturing as glXInitVertexArrayState doesn't get GL_MAX_TEXTURE_UNITS. It probably also breaks setup of other arrays: fog, secondary colour, vertex attributes. To fix this I have moved the call to __glXInitVertexArrayState to the end of MakeContextCurrent in glxcurrent.c, where the glx context is usable. Fixes a regression caused by commit 4fbdde889c. Fixes ARB_vertex_program usage in the arbvparray Mesa demo when run with indirect GLX and also the tex-skipped-unit piglit test when run with indirect GLX. Reviewed-by: Matt Turner <[email protected]> Acked-by: Ian Romanick <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=61907
* radeon/uvd: simplify sending context buffer messageChristian König2016-07-081-4/+1
| | | | | | | Just send it whenever it is allocated. Signed-off-by: Christian König <[email protected]> Reviewed-by: Leo Liu <[email protected]>
* radeon/uvd: fix contex buffer destruction in the error pathChristian König2016-07-081-6/+2
| | | | | | | Destroying a not allocated buffer is harmless. Signed-off-by: Christian König <[email protected]> Reviewed-by: Leo Liu <[email protected]>
* radeon/uvd: move polaris fw check into radeon_video.c v2Christian König2016-07-082-11/+13
| | | | | | | | | | It's actually not very clever to claim to support H.264 and then fail to create a decoder. v2: prefix FW macro with UVD_. Signed-off-by: Christian König <[email protected]> Reviewed-by: Leo Liu <[email protected]>
* radeon/video: fix coding style in radeon_video.c v2Christian König2016-07-081-15/+15
| | | | | | | v2: fix other tabs as well. Signed-off-by: Christian König <[email protected]> Reviewed-by: Leo Liu <[email protected]>
* svga: simplify/fix 1D/2D array resource copiesBrian Paul2016-07-081-26/+12
| | | | | | | | | | | Fixes the one of the piglit arb_copy_image-targets tests for 1D arrays. Previously, we were applying the 1D array z/face adjustment twice. Also simplify the copy_region_vgpu10() function. It never has to copy multiple array layers/slices. The Mesa code for glCopyImageSubData does the loop over slices/faces. Reviewed-by: Charmaine Lee <[email protected]>
* mesa: print number of samples in renderbuffer_storage error msgBrian Paul2016-07-081-1/+1
| | | | Reviewed-by: Timothy Arceri <[email protected]>
* svga: remove unused variableBrian Paul2016-07-081-1/+0
| | | | Reviewed-by: Charmaine Lee <[email protected]>
* svga: add dumping for more device commandsBrian Paul2016-07-081-155/+724
| | | | Signed-off-by: Brian Paul <[email protected]>
* svga: silence a couple unused variable warningsBrian Paul2016-07-082-1/+3
| | | | Signed-off-by: Brian Paul <[email protected]>
* svga: rebind using render target surfaces in hw draw stateCharmaine Lee2016-07-081-6/+6
| | | | | | | | | | | | | | | Currently when we rebind framebuffer resources at the beginning of the command buffer, we use the color buffer surfaces saved in the context hw clear state. But the surfaces could be different from the actual emitted render target surfaces if any of the color buffer surfaces is also used for shader resource, in that case, we create a backed surface for the collided render target surface. So to rebind the framebuffer resources correctly, use the render target surfaces saved in the context hw draw state. Tested with Heaven, Lightsmark2008, MTT piglit, glretrace, conform. Reviewed-by: Brian Paul <[email protected]>
* svga: invalidate gb surface before it is reusedCharmaine Lee2016-07-084-9/+63
| | | | | | | | | | | | | | | | | | | | | | | | | | With this patch, a guest-backed surface will be invalidated using the SVGA_3D_CMD_INVALIDATE_GB_SURFACE command before the surface is reused. This fixes the updating dirty image error from the device when a surface is reused. v2: Instead of invalidating the surface when it is reused, send the invalidate command before the surface is put into the recycle pool. v3: (1) surface invalidate is a noop operation in Linux winsys, since surface invalidation is not needed for DMA path. (2) Instead of invalidating the surface content in svga_screen_surface_destroy() when a surface is to be destroyed, it is done in svga_screen_cache_flush() when the surface is no longer referenced in a command buffer and is ready to be moved to the unused list. At this point, the surface will be moved to the invalidate list. When the surface invalidation is submitted, the surface will be moved to the unused list. Tested with piglit, glretrace. Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Sinclair Yeh <[email protected]>
* svga: fix use of provoking vertex controlBrian Paul2016-07-081-1/+4
| | | | | | | | | | | | | If the SVGA3D_DEVCAP_DX_PROVOKING_VERTEX query returns false, never define rasterizer state objects with provokingVertexLast set. Despite what the device reports, it may interpret the provokingVertexLast flag anyway. This fixes an issue when using capability clamping. Tested with piglit provoking-vertex and glsl-fs-flat-color tests. VMware bug 1550143. Reviewed-by: <[email protected]>
* vl: add half pixel to v_tex before adding offsetsNayan Deshmukh2016-07-081-0/+2
| | | | | | | | Since pixel center lies at 0.5, add half_pixel to vtex before adding offsets to it. Signed-off-by: Nayan Deshmukh <[email protected]> Reviewed-by: Christian König <[email protected]>
* nvc0/ir: remove unused resource info loading helpersSamuel Pitoiset2016-07-082-28/+0
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nvc0/ir: refactor the surfaces info loading logicSamuel Pitoiset2016-07-082-82/+44
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nvc0/ir: move the shift left op inside loadTexHandle()Samuel Pitoiset2016-07-081-8/+6
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* radeonsi: disable multi-threading when shader dumps are enabledNicolai Hähnle2016-07-081-0/+1
| | | | | | | Otherwise, shader dumps can become interleaved and unusable. Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: use multi-threaded compilation in debug contextsNicolai Hähnle2016-07-081-4/+4
| | | | | | | | We only have to stay single-threaded when debug output must be synchronous. This yields better parallelism in shader-db runs for me. Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* st/mesa: set debug callback async flagNicolai Hähnle2016-07-084-5/+8
| | | | | Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium: add async flag to pipe_debug_callbackNicolai Hähnle2016-07-083-2/+14
| | | | | | | v2: fix typo db -> cb Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: catch a potential state tracker error with non-MSAA FBsNicolai Hähnle2016-07-081-0/+6
| | | | | | At least st/mesa ensures this, so I'd rather not handle deviations in radeonsi. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: explicitly choose center locations for 1xAA on PolarisNicolai Hähnle2016-07-085-18/+48
| | | | | | | | | | | | | Unlike SC, the small primitive filter does not automatically use center locations in 1xAA mode, so this is needed to avoid artifacts caused by the small primitive filter discarding triangles that it shouldn't. As a side effect of how the effective number of samples is now calculated, this patch also avoids submitting the sample locations for line/poly smoothing when they're not really needed. Cc: 12.0 <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* r600g: call cayman_emit_msaa_sample_locs only when neededNicolai Hähnle2016-07-081-1/+2
| | | | | | In the case of nr_samples <= 1, that function is (currently) a no-op anyway. Reviewed-by: Marek Olšák <[email protected]>
* mesa: Mark R*32F formats as filterable when an extension is present.Kenneth Graunke2016-07-083-3/+19
| | | | | | | | | | | GL_OES_texture_float_linear marks R32F, RG32F, RGB32F, and RGBA32F as texture filterable. Fixes glGenerateMipmap GL errors when visiting a WebGL demo in Chromium: http://www.iamnop.com/particles Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* i965/blorp: fix indentation levelEric Engestrom2016-07-081-1/+1
| | | | | Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* i965: Fix remaining flush vs invalidate race conditions in ↵Francisco Jerez2016-07-072-0/+27
| | | | | | | | | | | | | | | | | | | | | | | brw_emit_pipe_control_flush. This hardware race condition has caused problems several times already (see "i965: Fix cache pollution race during L3 partitioning set-up.", "i965: Fix brw_render_cache_set_check_flush's PIPE_CONTROLs." and "i965: intel_texture_barrier reimplemented"). The problem is that whenever we attempt to both flush and invalidate multiple caches with a single pipe control command the flush and invalidation happen in reverse order, so the contents flushed from the R/W caches aren't guaranteed to become visible from the invalidated caches after the PIPE_CONTROL command completes execution if some concurrent rendering workload happened to pollute any of the invalidated R/O caches in the short window of time between the invalidation and flush. This makes sure that brw_emit_pipe_control_flush() has the effect expected by most callers of making the contents flushed from any R/W caches visible from the invalidated R/O caches. Cc: "12.0 11.1 11.2" <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Make room in the batch epilogue for three more pipe controls.Francisco Jerez2016-07-072-10/+10
| | | | | | | | | Review carefully, it sucks to have to keep track of the number of command packet dwords emitted in the batch epilogue manually. The MI_REPORT_PERF_COUNT_BATCH_DWORDS calculation was obviously wrong. Cc: "12.0 11.1 11.2" <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Emit SKL VF cache invalidation W/A from brw_emit_pipe_control_flush.Francisco Jerez2016-07-071-9/+10
| | | | | | | | | There were two places in the driver doing a pipe control VF cache flush, one of them was missing this workaround, move it down into brw_emit_pipe_control_flush to make sure we don't miss it again. Cc: "12.0 11.1 11.2" <[email protected]> Reviewed-by: Alejandro Piñeiro <[email protected]>
* i965: Emit SNB write cache flush W/A from brw_emit_pipe_control_flush.Francisco Jerez2016-07-074-35/+11
| | | | | | | | Shouldn't cause any functional changes at this point, but we have forgotten to apply this workaround several times in the past, make sure it doesn't happen again. Reviewed-by: Alejandro Piñeiro <[email protected]>
* egl: restrict swap_available dri2_egl_display field to X11Frank Binns2016-07-072-3/+1
| | | | | | | This field is only ever set and read by the X11 platform. Signed-off-by: Frank Binns <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* egl: Fix the bad surface attributes combination checking for pbuffers. (v3)Guillaume Charifi2016-07-071-21/+15
| | | | | | | | | | | | | | | | | Fixes a regression induced by commit a0674ce5c41903ccd161e89abb149621bfbc40d2: When EGL_TEXTURE_FORMAT and EGL_TEXTURE_TARGET were both specified (and both != EGL_NO_TEXTURE), an error was instantly triggered, before the other one had even a chance to be checked, which is obviously not the intended behaviour. v2: Full commit hash, remove useless variables. v3: [chadv] Add Fixes footers. Fixes: piglit "spec/egl 1.4/eglcreatepbuffersurface and then glclear" Fixes: piglit "spec/egl 1.4/largest possible eglcreatepbuffersurface and then glclear" Signed-off-by: Guillaume Charifi <[email protected]> Reviewed-by: Frank Binns <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* egl/display: remove unnecessary code and make it easier to readEric Engestrom2016-07-071-15/+14
| | | | | | | | | Remove the two first level `if` as they will always be true, and flatten the two remaining `if`. No functional change. Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* mesa: Make single-buffered GLES representation internally consistentGurchetan Singh2016-07-073-2/+30
| | | | | | | | | | | | | There are a few places in the code where clearing and reading are done on incorrect buffers for GLES contexts. See comments for details. This fixes 75 GLES3 dEQP tests on the surfaceless platform with no regressions. v2: Corrected unclear comment v3: Make the change in context.c instead of get.c v4: Removed whitespace Reviewed-by: Stéphane Marchesin <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* bugzilla_mesa.sh: Drop "Bug " from sed commandEmil Velikov2016-07-071-1/+1
| | | | | | | | After a recent Bugzilla update the word is no longer in the title. Thus the script ended up producing bogus HTML. Cc: "11.2 12.0" <[email protected]> Signed-off-by: Emil Velikov <[email protected]>
* mesa: don't install GLX files if GLX is not builtAkihiko Odaki2016-07-072-0/+5
| | | | | | | Cc: "11.2 12.0" <[email protected]> Signed-off-by: Akihiko Odaki <[email protected]> [Emil Velikov: Drop guards around dri_interface.h, add stable tag] Signed-off-by: Emil Velikov <[email protected]>
* nir: add glsl_dvec_type() helperTimothy Arceri2016-07-062-0/+7
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* osmesa: Export OSMesaCreateContextAttribs.Mathias Fröhlich2016-07-074-0/+4
| | | | | | | | | | | Since the function is exported like any other public api function and put in the header as if you could link against it, export it also from shared objects. Signed-off-by: Mathias Fröhlich <[email protected]> Reviewed-by: Brian Paul <[email protected]> Cc: "11.2 12.0" <[email protected]>
* i965: consolidate generation checkTimothy Arceri2016-07-071-6/+6
| | | | | Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]>
* i965: don't copy VS attribute work arounds for HSW+Timothy Arceri2016-07-071-2/+4
| | | | | | | These workarounds are not required for HSW and above so stop copying them at VS key generation which is called at draw time. Reviewed-by: Kenneth Graunke <[email protected]>
* i965: add double packing support to tess stagesTimothy Arceri2016-07-071-9/+18
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965: add double support packing support to gs inputsTimothy Arceri2016-07-071-2/+3
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* nir: add glsl_double_type() helperTimothy Arceri2016-07-072-0/+7
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965: add indirect packing support to gs load inputsTimothy Arceri2016-07-071-3/+15
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965: add indirect packing support for tcs and tesTimothy Arceri2016-07-071-4/+29
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965: add component packing support for tcsTimothy Arceri2016-07-071-3/+8
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965: add component packing support for tesTimothy Arceri2016-07-071-5/+33
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
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