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* i965/gen6/gs: Implement GS_OPCODE_SET_DWORD_2.Iago Toral Quiroga2014-09-195-16/+10
* i965/gen6/gs: Upload binding table for user-provided geometry shaders.Iago Toral Quiroga2014-09-191-1/+4
* i965/gen6/gs: Enable URB space for user-provided geometry shaders.Iago Toral Quiroga2014-09-191-10/+20
* i965/gen6/gs: Compute URB entry size for user-provided geometry shaders.Iago Toral Quiroga2014-09-192-33/+62
* i965/gen6/gs: Add instruction URB flags to geometry shaders EOT message.Iago Toral Quiroga2014-09-191-1/+1
* i965/gen6/gs: Implement GS_OPCODE_URB_WRITE_ALLOCATE.Iago Toral Quiroga2014-09-195-0/+42
* i965/gen6/gs: Implement GS_OPCODE_FF_SYNC.Iago Toral Quiroga2014-09-195-0/+67
* i965/gs: Reuse gen6 constant push buffers setup code in gen7+.Samuel Iglesias Gonsalvez2014-09-193-36/+7
* i965/gen6/gs: Setup constant push buffers for gen6 geometry shaders.Iago Toral Quiroga2014-09-193-33/+68
* i965/gen6/gs: Set brw->gs.enabled to FALSE in gen6_blorp_emit_gs_disable()Samuel Iglesias Gonsalvez2014-09-191-0/+1
* i965/gen6/gs: use brw_gs_prog atom instead of brw_ff_gs_progSamuel Iglesias Gonsalvez2014-09-194-2/+16
* i965/gen6/gs: Skeleton for user GS program supportSamuel Iglesias Gonsalvez2014-09-191-35/+119
* i965/gs: Use single dispatch mode as fallback to dual object mode when possible.Iago Toral Quiroga2014-09-194-22/+36
* ilo: rename ILO_DEBUG=3dChia-I Wu2014-09-195-6/+6
* ilo: rename ilo_cp_flush()Chia-I Wu2014-09-1911-52/+52
* ilo: remove ilo_cp_empty()Chia-I Wu2014-09-193-22/+12
* ilo: simplify ilo_cp_set_owner()Chia-I Wu2014-09-195-129/+121
* mesa: Delete VAO _MaxElement code and index buffer bounds checking.Kenneth Graunke2014-09-1915-206/+9
* vc4: Add support for stencil operations.Eric Anholt2014-09-188-2/+118
* vc4: Actually implement VC4_DEBUG=cl.Eric Anholt2014-09-184-0/+141
* draw: (trivial) remove duplicated linesRoland Scheidegger2014-09-181-12/+0
* mesa: fix prog_optimize.c assertions triggered by SWZ opcodeBrian Paul2014-09-181-5/+4
* vc4: Allow copy propagation of uniforms.Eric Anholt2014-09-171-1/+15
* vc4: Make sure thread end doesn't have a uniform read.Eric Anholt2014-09-171-0/+8
* vc4: Allow dead code elimination of instructions that read uniforms.Eric Anholt2014-09-171-2/+1
* vc4: Add support for reordering the uniform stream after optimization.Eric Anholt2014-09-174-0/+87
* vc4: Initialize the various qreg arrays when allocating them.Eric Anholt2014-09-171-0/+4
* vc4: Fix stray disable of the CSE pass.Eric Anholt2014-09-171-1/+0
* gallivm,tgsi: fix idiv by zero crashrconde2014-09-172-7/+25
* gallivm: add texture target information for sample opcodes to tgsi infoRoland Scheidegger2014-09-171-14/+43
* st/mesa: Fix handling of 8888 SNORM and SRGB formats for big-endianRichard Sandiford2014-09-171-16/+36
* st/mesa: Fix handling of LA and RG formats for big-endianRichard Sandiford2014-09-171-16/+48
* mesa: Add MESA_FORMAT_{A8R8G8B8, X8R8G8B8, X8B8G8R8}_SRGB (v2)Richard Sandiford2014-09-179-0/+164
* mesa: Add MESA_FORMAT_A8L8_{SNORM,SRGB}Richard Sandiford2014-09-179-0/+111
* gallium: Define PIPE_FORMAT_xyzw8888_{SNORM, SRGB} aliasesRichard Sandiford2014-09-171-0/+24
* gallium: Add PIPE_FORMAT_x8B8G8R8_SNORM formatsRichard Sandiford2014-09-172-0/+6
* gallium: Define PIPE_FORMAT_{LA, AL, RG, GR}nn aliasesRichard Sandiford2014-09-171-0/+32
* gallium: Add PIPE_FORMAT_AnLn and PIPE_FORMAT_GnRn formatsRichard Sandiford2014-09-172-0/+19
* mesa: fix SRGB alpha channel value in pack_float_R8G8B8X8_SRGBDave Airlie2014-09-171-1/+1
* swrast: Fix handling of MESA_FORMAT_L8A8_SRGB for big-endianRichard Sandiford2014-09-171-3/+3
* mesa: Tweak unpack name for MESA_FORMAT_R8G8B8X8_SNORMRichard Sandiford2014-09-171-2/+2
* mesa: Fix alpha component in unpack_R8G8B8X8_SRGB.Richard Sandiford2014-09-171-1/+1
* util: move shared rgtc code to util (v2)Dave Airlie2014-09-177-186/+174
* vc4: Claim ARB_fbo.Eric Anholt2014-09-161-1/+3
* vc4: Fix memory leaks in register allocation.Eric Anholt2014-09-161-0/+3
* vc4: Move register allocation to a separate file.Eric Anholt2014-09-164-100/+165
* glsl: fix error message for redeclaring gl_PerVertex as outputChris Forbes2014-09-171-1/+1
* i965/vec4: slightly improve insn dumping with no srcsChris Forbes2014-09-171-1/+4
* vc4: Add support for computed depth writes.Eric Anholt2014-09-163-2/+26
* vc4: Restructure depth input/output in fragment shaders.Eric Anholt2014-09-164-12/+17
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