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* panfrost: Extend the panfrost_batch_add_bo() API to pass access flagsBoris Brezillon2019-10-038-23/+114
| | | | | | | | | | | | | | | | | The type of access being done on a BO has impacts on job scheduling (shared resources being written enforce serialization while those being read only allow for job parallelization) and BO lifetime (the fragment job might last longer than the vertex/tiler ones, if we can, it's good to release BOs earlier so that others can re-use them through the BO re-use cache). Let's pass extra access flags to panfrost_batch_add_bo() and panfrost_batch_create_bo() so the batch submission logic can take the appropriate when submitting batches. Note that this information is not used yet, we're just patching callers to pass the correct flags here. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Add the shader BO to the batch in patch_shader_state()Boris Brezillon2019-10-031-6/+5
| | | | | | | | | | We know a shader will be used by a batch when panfrost_patch_shader_state() is called, so let's add the shader BO at that time. Suggested-by: Alyssa Rosenzweig <[email protected]> Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]>
* egl: Remove the 565 pbuffer-only EGL config under X11.Andres Gomez2019-10-031-93/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | The CTS finally has agreed to drop the requirement for a 565-no-depth-no-stencil config for ES 3.0. Hence we can now remove the code to satisfy this requirement using a pbuffer-only visual with whatever other buffers the driver happens to have given us. This reverts commit 82607f8a900796871470ac4f1a04e154392e4898, commit 6ad31c4ff33d92f6359b196a94ace99682272111 and commit dacb11a585face5ca179c34cfc588a71a425c1e0. v2: - Reference the VK-GL-CTS issue (Eric E.). v3: - Don't revert fc21394bc4d ("egl: Quiet warning about front buffer rendering for pixmaps/pbuffers") (Kenneth). References: VK-GL-CTS issue 1601. Cc: [email protected] Signed-off-by: Andres Gomez <[email protected]> Acked-by: Eric Engestrom <[email protected]> Acked-by: Eric Anholt <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* bin: delete unused releasing scriptsDylan Baker2019-10-032-64/+0
| | | | | Acked-by: Eric Engestrom <[email protected]> Acked-by: Juan A. Suarez <[email protected]>
* release: Add an update_release_calendar.py scriptDylan Baker2019-10-031-0/+122
| | | | | | | This script is for updating post version bump. Acked-by: Eric Engestrom <[email protected]> Acked-by: Juan A. Suarez <[email protected]>
* scripts: Add a gen_release_notes.py scriptDylan Baker2019-10-033-0/+326
| | | | | | | | | | This script is responsible for generating an entire page in the docs/relnotes/ directory. It includes a template for the page, and uses mako to fill in the necessary bits. It is designed to be purely fire and forget, calculating previous versions, shortlogs, bug fixes, and dates. Acked-by: Eric Engestrom <[email protected]> Acked-by: Juan A. Suarez <[email protected]>
* docs: add a new_features.text file and remove 19.3.0 release notesDylan Baker2019-10-032-68/+5
| | | | | | | | | | | | The next patch is going to introduce a tool that creates the entire release html page for us, without any user intervention. As such we can't be editing it. To that end the script will read the new_features.txt file to get a list of new features. This is a flat text file, one entry per line. Acked-by: Eric Engestrom <[email protected]> Acked-by: Juan A. Suarez <[email protected]>
* anv/block_pool: Align anv_block_pool state to 64 bits.Rafael Antognolli2019-10-031-2/+8
| | | | | | | | | | | | | | | | | | | On 64 bits platforms, some atomic operations like __sync_fetch_and_add() have constant time, but on 32 bits platforms they are implemented with a loop and might take much longer. Additionally, it seems like if their operands are not aligned to 64 bits, they also require extra memory accesses. From the Intel Architecture's Developer Manual Vol. 1, 4.1.1: "A word or doubleword operand that crosses a 4-byte boundary or a quadword operand that crosses an 8-byte boundary is considered unaligned and requires two separate memory bus cycles for access." Forcing the u64 field to be aligned to 64 bits seems to make the unit tests that are stressing this finish much faster. Reviewed-by: Jason Ekstrand <[email protected]>
* loader/dri3: do not blit outside old/new buffersErik Faye-Lund2019-10-031-1/+3
| | | | | Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* docs: Add use of Closes: tag for closing gitlab issuesDylan Baker2019-10-031-3/+7
| | | | | | | | This replaces to old Bugzilla: tag, which no longer makes sense because we don't use bugzilla anymore. Reviewed-by: Eric Anholt <[email protected]> (v1) Reviewed-by: Eric Engestrom <[email protected]>
* intel/isl/icl: Use halign 8 instead of 4 hw workaroundAnuj Phogat2019-10-031-8/+21
| | | | | | | | | | | v1 by Topi Pohjolainen v2,v3 by Anuj Phogat: - Apply for gen >= 11 - Remove wa_bug_xxx function - Use helper functions Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* ac/nir: remove unused code for nir_op_{fmod,frem}Samuel Pitoiset2019-10-031-14/+0
| | | | | | | RADV and RadeonSI both lower these two NIR instructions. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: enable lower_fmod for the LLVM pathSamuel Pitoiset2019-10-031-0/+1
| | | | | | | | | | | | This lowers fmod and frem at NIR level like RadeonSI. fmod is already lowered directly in NIR->LLVM, and frem will be lowered by LLVM anyways. This fixes a LLVM crash with: dEQP-VK.glsl.builtin.precision_fp16_storage32b.frem.compute.scalar. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* egl/dri2: Don't dlclose() the driver on dri2_load_driver_common failureAdam Jackson2019-10-031-3/+2
| | | | | | | | | | | | | | | | ... because it's wrong to do so. The error path out of dri2_initialize_drm ends with dri2_display_destroy, which calls functions in the vtable we're trying to set up, so if we dlclose the driver then those function pointers will point off into space and things crash. Noticed this because after !1923 eglinfo would crash when setting up the GBM platform. This was something of a cascade failure, because my kernel is too old for DRM_IOCTL_I915_GETPARAM to work without DRM_AUTH, so i965 wouldn't load. platform_drm.c then got very confused when it tries to load swrast as a dri2 driver. Reviewed-by: Eric Anholt <[email protected]>
* radv: Fix warning in 32-bit build.Bas Nieuwenhuizen2019-10-031-2/+3
| | | | | | | | uintptr_t is 32 bits in a 32-bits build, resulting in shifting out of bounds. Reviewed-by: Eric Engestrom <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: Fix condition for skipping the continue CS.Bas Nieuwenhuizen2019-10-031-1/+2
| | | | | | | | | We need the continue CS for referencing the tess/GDS/sample position BOs. Fixes: 46e52df34d3 "radv: add tessellation ring allocation support. (v2)" Fixes: e1dc3ab7534 "radv/gfx10: allocate GDS/OA buffer objects for NGG streamout" Fixes: 1171b304f30 "radv: overhaul fragment shader sample positions." Reviewed-by: Samuel Pitoiset <[email protected]>
* gitlab-ci: Use per-job ccacheMichel Dänzer2019-10-031-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of a single cache shared between all jobs, but reduce the maximum cache size to 1.5G (from 5G). Rationale for smaller cache: Pulling & pushing a 5G cache could take a long time. Consider https://gitlab.freedesktop.org/mesa/mesa/-/jobs/684010 (click the "Show complete raw" button to see timestamps): Pulling the cache took 1569927241-1569927194 = 47 seconds, pushing it 1569927671-1569927519 = 152, for a total of 199 seconds. The actual build took comparable 1569927518-1569927243 = 275 seconds, despite no cache hits from ccache. In other words, the cache transfers almost doubled the job duration, and they would have negated any build time benefits from ccache even with a high cache hit rate. Also, the smaller caches avoid blowing up storage requirements for them too much. Rationale for per-job caches: Making a single cache significantly smaller might result in cached build products from one job getting evicted by another job, reducing the likelihood of cache hits from previous pipelines. v2: * Move up "ccache --max-size=1500M" call (Eric Engestrom) Reviewed-by: Eric Engestrom <[email protected]>
* virgl: honor winsys supplied metadataGurchetan Singh2019-10-021-1/+6
| | | | | | | | | | | To truly to do this correctly, we'll have to fix the discrepancy between drm_virtgpu_3d_transfer_to_host and virtio_gpu_transfer_host_3d. However, this is a good starting point. Since virtio-gpu only supports self-import and export, this should be fine. Let's only do WINSYS_HANDLE_TYPE_FD for this currently. Reviewed by: Robert Tarasov <[email protected]>
* virgl: modify internal structures to track winsys-supplied dataGurchetan Singh2019-10-022-43/+52
| | | | | | | | | | | | | The winsys might supply dimensions that are different than those we calculate. In additional, it may supply virtualized modifiers. In practice, a stride != bpp * width and virtualized modifiers don't happen yet, but the plan is to move in that direction. Also make virgl_resource_layout static. Reviewed by: Robert Tarasov <[email protected]>
* virgl: modify resource_create_from_handle(..) callbackGurchetan Singh2019-10-023-3/+18
| | | | | | | This commit makes no functional changes, just adds the revelant plumbing. Reviewed by: Robert Tarasov <[email protected]>
* virgl: remove stride from virgl_hw_resGurchetan Singh2019-10-022-3/+0
| | | | | | | It's not used anywhere, and stride isn't really an intrinsic property of a GEM buffer. Reviewed by: Robert Tarasov <[email protected]>
* intel: fix topology queryLionel Landwerlin2019-10-021-0/+3
| | | | | | | | | | | | | | | | | i915 will report ENODEV on generations prior to Haswell because there is no point in reporting values on those. This is prior any fusing could happen on parts with identical PCI ids. This query call was previously only triggered on generations that support performance queries, which happens to match generation for which i915 reports topology, but the commit pointed below started using it on all generations. Signed-off-by: Lionel Landwerlin <[email protected]> Gitlab: https://gitlab.freedesktop.org/mesa/mesa/issues/1860 Cc: <[email protected]> Fixes: 96e1c945f2 ("i965: Move device info initialization to common code") Reviewed-by: Mark Janes <[email protected]>
* docs: Fix GL_EXT_demote_to_helper_invocation nameCaio Marcelo de Oliveira Filho2019-10-021-1/+1
| | | | Reviewed-by: Eric Engestrom <[email protected]>
* radv/gfx10: fix the ESGS ring size symbolSamuel Pitoiset2019-10-021-19/+1
| | | | | | | | Random hangs no longer happen, I'm actually not sure if they were related to this. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: fix buildSamuel Pitoiset2019-10-021-1/+1
| | | | | | Forgot to amend the commit before updating the MR. Signed-off-by: Samuel Pitoiset <[email protected]>
* Revert "radv: disable viewport clamping even if FS doesn't write Z"Samuel Pitoiset2019-10-021-1/+3
| | | | | | | | This was actually the wrong fix. This reverts commit 0a313cc285c2939de9cac07f045b0b699bc208ca. Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: rework the slow depthstencil clear to write depth from PSSamuel Pitoiset2019-10-021-6/+12
| | | | | | | | | | Make sure to export the expected clear values to the depth stencil attachment. This fixes dEQP-VK.pipeline.depth_range_unrestricted.* on GFX10. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv/gfx10: fix NGG streamout with triangle strips for VSSamuel Pitoiset2019-10-024-1/+13
| | | | | | | | | | The number of vertices has to be adjusted with the output primitive type. This fixes dEQP-VK.transform_feedback.simple.triangle_strip_*. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv/gfx10: fix storing/loading NGG stream outputs for GSSamuel Pitoiset2019-10-021-12/+77
| | | | | | | | | | | The GS outputs are stored differently in the LDS storage, they are indexed by out_idx which is incremented for each stored DWORD. Thus, we need a different path for exporting the stream outputs. This fixes a bunch of CTS failures when NGG GS is force enabled. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv/gfx10: use the component mask when storing/loading NGG stream outputsSamuel Pitoiset2019-10-021-0/+6
| | | | | | | It's unnecessary to store/load more components that needed. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv/gfx10: fix storing/loading NGG stream outputs for VS and TESSamuel Pitoiset2019-10-021-8/+10
| | | | | | | | | | | | | The LDS storage allocated for stream outputs is 4 * N, where N is the number of outputs. So, we have to store/load with N as index and not with the output location as index. This doesn't fix anything known but it should fix out-of-bounds access and it also reduces the number of outputs written to the LDS storage. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv/gfx10: add missing counter buffer to the BO listSamuel Pitoiset2019-10-021-0/+2
| | | | | | | The buffer isn't necessarily used before. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv/gfx10: add radv_device::use_nggSamuel Pitoiset2019-10-023-3/+8
| | | | | | | Trivial. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* git: delete .gitattributesEric Engestrom2019-10-021-4/+0
| | | | | | | | The last of these was deleted in 44a8e5135470fa51ae36 ("d3d1x: Remove.") over 6 years ago. Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Jose Fonseca <[email protected]>
* etnaviv: enable triangle strips only when the hardware supports itGert Wollny2019-10-021-1/+7
| | | | | | | | | | | | | | Some hardware has a bug with triangle strips and it is signalled by the flag BUG_FIXED8 whether this bug has been fixed. So only enable triangle strips when this flag is set. Thanks: Jonathan Marek and Christian Gmeiner for the pointers v2: Add TODO to indicate that the handling should be refined (Jonathan & Christian) Signed-off-by: Gert Wollny <[email protected]> Reviewed-by: Christian Gmeiner <[email protected]>
* meson: remove -DGALLIUM_SOFTPIPE from st/osmesaDylan Baker2019-10-011-1/+0
| | | | | | | | It's unused here, and undefined in scons. It is used in targets/osmesa, but it's properly defined there already. Reviewed-by: Eric Engestrom <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* mesa: don't forget to clear _Layer field on texture unitLionel Landwerlin2019-10-011-1/+1
| | | | | | | | | | | | | | On the Android Antutu benchmark we ran into an assert in ISL where the (base layer + num layers) > total layers. It turns out the core of mesa forgot to clear the _Layer variable, potentially leaving an inconsistent value. v2: Pull setting u->_Layer out of the conditional blocks (Jason) Signed-off-by: Lionel Landwerlin <[email protected]> Cc: <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* egl/gbm: Fix config validationRobin Murphy2019-10-011-2/+4
| | | | | | | | | | | | | In converting to shift/size-based validation, we lost a condition from the ARGB/XRGB equivalence check, which left it working one way round but not the other, and broke applications like glmark2-es2-drm on some platforms. Restore the equivalent check that *both* configs actually have an alpha channel before considering a mismatch. Fixes: 7b4ed2b513ef ("egl: Convert configs to use shifts and sizes instead of masks") Signed-off-by: Robin Murphy <[email protected]> Reviewed-by: Adam Jackson <[email protected]> Reviewed-by: Eric Engestrom <[email protected]>
* haiku: fix Mesa buildKen Mays2019-10-014-31/+21
| | | | | | | | | | | | | | | | | | | | 1. The hgl.c file is a read-only file versus read-write. Ref: src/gallium/state_trackers/hgl/hgl.c 2. I've included the Haiku-specific patches I used to get a successful build of Mesa 19.1.7 on Haiku using the meson/ninja build procedure. Shows "[764/764] linking target ... libswpipe.so" at build completion. v2: Remove autotools files (Eric) v3: Update the patch Reported-by: Ken Mays <[email protected]> Tested-by: Ken Mays <[email protected]> CC: [email protected] Reviewed-by: Alexander von Gluck IV <[email protected]>
* gitlab-ci: Set ccache path for cross compilers in meson cross fileMichel Dänzer2019-10-012-1/+3
| | | | | | | Without this, meson didn't pick up ccache for cross builds. Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Dylan Baker <[email protected]>
* docs/relnotes: add support for GL_ARB_gl_spirv, GL_ARB_spirv_extensions and ↵Andres Gomez2019-10-011-0/+3
| | | | | | | | | | | | | | | | | | | | | OpenGL 4.6 on i965 and iris After 41549a18e6c ("i965: Enable OpenGL 4.6 for Gen8+"), i965 implements GL_ARB_gl_spirv, GL_ARB_spirv_extensions and OpenGL 4.6. After 15e439071d8 ("iris: Enable ARB_gl_spirv and ARB_spirv_extensions"), iris implements GL_ARB_gl_spirv, GL_ARB_spirv_extensions and OpenGL 4.6. v2: - Explicit the support is for i965 and iris. v3: - Add also GL_ARB_spirv_extensions to the release notes (Alejandro). Signed-off-by: Andres Gomez <[email protected]> Reviewed-by: Alejandro Piñeiro <[email protected]> Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
* egl: Fix implicit declaration of ffsKevin Strasser2019-09-301-0/+1
| | | | | | | | | | Found when building for Android in C99 mode. Include bitscan.h to ensure ffs is available. Fixes: 7b4ed2b5 ("egl: Convert configs to use shifts and sizes instead of masks") Signed-off-by: Kevin Strasser <[email protected]> Reviewed-by: Eric Engestrom <[email protected]>
* intel/tools: Fix aubinator usage of rb_tree.Rafael Antognolli2019-09-301-2/+2
| | | | | | | | | The order of comparison has changed, so we need to invert the logic of "insert_left" when using rb_tree_insert_at(). Fixes: dae33052dbf (util/rb_tree: Reverse the order of comparison functions). Reviewed-by: Jason Ekstrand <[email protected]>
* docs/relnotes: Add EXT_demote_to_helper_invocation support on iris, i965Caio Marcelo de Oliveira Filho2019-09-301-0/+1
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Enable EXT_demote_to_helper_invocationCaio Marcelo de Oliveira Filho2019-09-301-0/+2
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* iris: Enable EXT_demote_to_helper_invocationCaio Marcelo de Oliveira Filho2019-09-301-0/+1
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* gallium: Add PIPE_CAP_DEMOTE_TO_HELPER_INVOCATIONCaio Marcelo de Oliveira Filho2019-09-304-0/+6
| | | | | | | | | | | | To enable EXT_demote_to_helper_invocation: This extension adds a "demote" keyword that is similar to "discard" but only suppresses subsequent writes and outputs to the framebuffer, and does not terminate the execution of the invocation. For the remainder of the execution, the invocation is "demoted" to act like a helper invocation. Reviewed-by: Kenneth Graunke <[email protected]>
* glsl: Add helperInvocationEXT() builtinCaio Marcelo de Oliveira Filho2019-09-304-0/+48
| | | | | | | | | | | From EXT_demote_to_helper_invocation, implemented with the existing nir_intrinsic_is_helper_invocation. Such builtin is necessary when using `demote` because we can't redefine the value of gl_HelperInvocation (since it is an input variable). Reviewed-by: Kenneth Graunke <[email protected]>
* glsl: Parse `demote` statementCaio Marcelo de Oliveira Filho2019-09-305-1/+49
| | | | | | | When the EXT_demote_to_helper_invocation extension is enabled, `demote` is treated as a keyword, and produces an ir_demote. Reviewed-by: Kenneth Graunke <[email protected]>
* glsl: Add ir_demoteCaio Marcelo de Oliveira Filho2019-09-3011-0/+95
| | | | | | | | | | | | | | | To represent the new `demote` keyword when using EXT_demote_to_helper_invocation extension. Most of the changes are to include it in the visitors. Demote is not considered a control flow, so also include an empty visit member function in ir_control_flow_visitor. Only NIR actually supports `demote`, so assert the translations for TGSI and Mesa's gl_program -- since the demote is not expected to appear for those. Reviewed-by: Kenneth Graunke <[email protected]>
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