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* radv: fix include order for installed headers v2Andres Rodriguez2017-01-191-4/+4
| | | | | | | | | | | | | | | | | | | | | | In situations where libdrm_amdgpu and mesa are installed to the same location, the mesa installed headers will take precedence over the git source headers. This is due to the AMDGPU_CFLAGS containing the install directory. This situation can cause build errors if the git version of a header is newer than the currently installed version of a header (e.g. git pull updates vulkan.h) Note: using the same install prefix for mesa and libdrm is probably a common occurrence since it is described in the radeonBuildHowTo wiki: https://www.x.org/wiki/radeonBuildHowTo/ v2: added sign-off Signed-off-by: Andres Rodriguez <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* docs/releasing: document post branch version bumpEmil Velikov2017-01-191-0/+3
| | | | Signed-off-by: Emil Velikov <[email protected]>
* mesa: Bump version to 17.1.0-develEmil Velikov2017-01-191-1/+1
| | | | Signed-off-by: Emil Velikov <[email protected]>
* radeonsi: reject invalid vertex element formatsMarek Olšák2017-01-191-0/+5
| | | | | | | | This should fix a coverity defect. Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]>
* radeonsi: don't forget to add HTILE to the buffer list for texturingMarek Olšák2017-01-191-6/+13
| | | | | | | | | | | | This fixes VM faults. Discovered by Samuel Pitoiset. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98975 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99450 Cc: 17.0 13.0 <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]>
* st/vdpau: only send buffers with B8G8R8A8 format to XNayan Deshmukh2017-01-193-3/+11
| | | | | | | | | | | | | | | | PresentPixmap only works if the pixmap depth matches with the window depth, otherwise it returns a BadMatch protocol error. Even if the depths match, the result won't look correctly if the VDPAU RGB component order doesn't match the X11 one so we only allow the X11 format. For other buffers we copy them to a buffer which is send to X. v2: only send buffers with format VDP_RGBA_FORMAT_B8G8R8A8 v3: reword commit message v4: add comment explaining the code Signed-off-by: Nayan Deshmukh <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeonsi: fix texture gather on stencil texturesNicolai Hähnle2017-01-191-2/+16
| | | | | | | | | | | | | | | | | | | | | | | At least on VI, texture gather doesn't work with a 24_8 data format, so use 8_8_8_8 and a modified swizzle instead. A bit of background: When creating a GL_STENCIL_INDEX8 texture, we select the X24S8 pipe format because we don't support stencil-only render targets properly. With mip-mapping this can lead to a setup where the tiling is incompatible with stencil texturing, and a flushed stencil texture is used. For the flushed stencil, a literal X24S8 is used because there were issues with an 8bpp DB->CB copy. Longer term, it would be good if we could get away from these workarounds, i.e. properly support an S8 format for stencil-only rendering and flushed stencil. Since stencil texturing is somewhat rare, it's not a high priority. Fixes GL45-CTS.texture_cube_map_array.sampling. Cc: 17.0 <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Acked-by: Edward O'Callaghan <[email protected]>
* mesa/main: Fix FRAMEBUFFER_ATTACHMENT_OBJECT_TYPE for NONE attachment typeAlejandro Piñeiro2017-01-191-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the attachment type is NONE (att->Type), FRAMEBUFFER_ATTACHMENT_OBJECT_TYPE should be NONE always. Note that technically, the current behaviour follows the spec. From OpenGL 4.5 spec, Section 9.2.3 "Framebuffer Object Queries": "If the value of FRAMEBUFFER_ATTACHMENT_OBJECT_TYPE is NONE, then either no framebuffer is bound to target; or the default framebuffer is bound, attachment is DEPTH or STENCIL, and the number of depth or stencil bits, respectively, is zero." Reading literally this paragraph, for the default framebuffer, NONE should be only returned if attachment is DEPTH and STENCIL without being allocated. But it doesn't makes too much sense to return DEFAULT_FRAMEBUFFER if the attachment type is NONE. For example, this can happens if the attachment is FRONT_RIGHT run on monoscopic mode, as that attachment is only available on stereo mode. With the current behaviour, defensive querying of the object type would not work properly. So you could query the object type checking for NONE, get DEFAULT_FRAMEBUFFER, and then get and INVALID_OPERATION when requesting other pnames (like RED_SIZE), as the real attachment type is NONE. This fixes: GL45-CTS.direct_state_access.framebuffers_get_attachment_parameters v2: don't change the behaviour for att->Type != GL_NONE, as caused some ES CTS regressions v3: simplify condition (Iago) Reviewed-by: Iago Toral Quiroga <[email protected]>
* radeonsi: Always leave poly_offset in a valid stateZachary Michaels2017-01-191-1/+3
| | | | | | | | | | This commit makes si_update_poly_offset set poly_offset to NULL if uses_poly_offset is false. This way poly_offset either points into the currently queued rasterizer, or it is NULL. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99451 Cc: "13.0 17.0" <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* mesa/main: fix meta caller of _mesa_ClampColorNicolai Hähnle2017-01-191-1/+2
| | | | | | | | | | | Since _mesa_ClampColor properly checks for support of the API function now, it's meta callers need to check support as well. Fixes: 963311b71f ("mesa/main: fix version/extension checks in _mesa_ClampColor") Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99401 Tested-by: Mark Janes <[email protected]> Reviewed-by: Alejandro Piñeiro <[email protected]> Cc: "17.0" <[email protected]>
* mesa/glsl: move TransformFeedbackBufferStride to gl_shaderTimothy Arceri2017-01-194-45/+41
| | | | | | | | | | Here we remove the single use of this field in gl_linked_shader which allows us to move the field out of gl_shader_info While we are at it we rewrite link_xfb_stride_layout_qualifiers() to be more clear. Reviewed-by: Lionel Landwerlin <[email protected]>
* glsl: exit loop early if we find xfb layout qualifersTimothy Arceri2017-01-191-0/+1
| | | | Reviewed-by: Lionel Landwerlin <[email protected]>
* glsl: set InnerCoverage directly in gl_programTimothy Arceri2017-01-194-6/+3
| | | | | | Also move out of the shared gl_shader_info. Reviewed-by: Lionel Landwerlin <[email protected]>
* glsl: tidy up PostDepthCoverage shader fieldTimothy Arceri2017-01-194-4/+4
| | | | | | | There is no reason for this to be in the shared gl_shader_info or to copy it to gl_program at the end of linking (its already there). Reviewed-by: Lionel Landwerlin <[email protected]>
* mesa/glsl: move pixel_center_integer to gl_shaderTimothy Arceri2017-01-193-8/+5
| | | | | | | This is only used by gl_linked_shader as a temp during linking so use a temp there instead. Reviewed-by: Lionel Landwerlin <[email protected]>
* mesa/glsl: move origin_upper_left to gl_shaderTimothy Arceri2017-01-193-10/+9
| | | | | | | This is only used by gl_linked_shader as a temp during linking so use a temp there instead. Reviewed-by: Lionel Landwerlin <[email protected]>
* mesa/glsl: move uses_gl_fragcoord to gl_shaderTimothy Arceri2017-01-193-9/+7
| | | | | | | This is only used by gl_linked_shader as a temp during linking so use a temp there instead. Reviewed-by: Lionel Landwerlin <[email protected]>
* mesa/glsl: move redeclares_gl_fragcoord to gl_shaderTimothy Arceri2017-01-193-16/+11
| | | | | | | This is never used in gl_linked_shader other than as a temp during linking so just use a temp instead. Reviewed-by: Lionel Landwerlin <[email protected]>
* mesa/glsl: move ARB_fragment_coord_conventions_enable fieldTimothy Arceri2017-01-193-3/+4
| | | | | | | This is only used by gl_shader not gl_linked_shader so move it there. Reviewed-by: Lionel Landwerlin <[email protected]>
* st/mesa/glsl: set early_fragment_tests directly in shader_infoTimothy Arceri2017-01-195-11/+10
| | | | | | | We also move EarlyFragmentTests out of the gl_shader_info struct as it is now only used by gl_shader. Reviewed-by: Lionel Landwerlin <[email protected]>
* mesa/glsl/i965: set and use tcs vertices_out directlyTimothy Arceri2017-01-193-21/+15
| | | | Reviewed-by: Lionel Landwerlin <[email protected]>
* i965: get outputs_written from gl_programTimothy Arceri2017-01-191-2/+2
| | | | | | | There is no need to go via the pointer in nir_shader. This change is required for the shader cache as we don't create a nir_shader. Reviewed-by: Lionel Landwerlin <[email protected]>
* gallivm: use #ifdef not #if for PIPE_ARCH_BIG_ENDIANDave Airlie2017-01-191-1/+1
| | | | | | | | This fixes the build on ppc/s390. Reviewed-by: Roland Scheidegger <[email protected]> Cc: "17.0" <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* mesa: don't always set _NEW_PROGRAM when linkingTimothy Arceri2017-01-191-1/+22
| | | | | | | | | | | | We only need to set it when linking was successful and the program being linked is currently active. The programs_in_use mask is just used as a flag for now but in a future change we will use it to update the CurrentProgram array. V2: make sure to flush vertices before linking (suggested by Marek) Reviewed-by: Marek Olšák <[email protected]>
* mesa: change init subroutine defaults helper to work per gl_programTimothy Arceri2017-01-193-24/+20
| | | | | | | A later patch will result in SSO programs calling this helper per gl_program rather than per gl_shader_program. Reviewed-by: Lionel Landwerlin <[email protected]>
* mesa/glsl: move ProgramResourceList to gl_shader_program_dataTimothy Arceri2017-01-195-56/+63
| | | | | | | | | | We also move NumProgramResourceList at the same time. GLES does interface validation on SSO at runtime so we need to move this to be able to switch to storing gl_program pointers in CurrentProgram. Reviewed-by: Lionel Landwerlin <[email protected]>
* glsl: store number of explicit uniform loactions in gl_shader_programTimothy Arceri2017-01-194-29/+25
| | | | | | | | | This allows us to cleanup the functions that pass this count around, but more importantly we will be able to call the uniform linking functions from that backends linker without having to pass this information to the backend directly via Driver.LinkShader(). Reviewed-by: Kenneth Graunke <[email protected]>
* glsl: create a new link_and_validate_uniforms() helperTimothy Arceri2017-01-191-9/+17
| | | | | | | | | Currently this just breaks up the linking code a bit but in the future i965 will call this from the backend via Driver.LinkShader() so that we can do NIR optimisations before assigning uniform locations. Reviewed-by: Kenneth Graunke <[email protected]>
* glsl: make a bunch of varying linking functions staticTimothy Arceri2017-01-192-53/+6
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* glsl: move more varying linking code to link_varyings.cppTimothy Arceri2017-01-193-148/+161
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965/blorp: Make post draw flush more explicitTopi Pohjolainen2017-01-182-5/+22
| | | | | | | | | | | | | Blits do not need any special treatment as the target buffer object is added to render cache just as one does for normal draw. Color clears and resolves in turn require explicit "end of pipe synchronization". It is not clear what this means exactly but the assumption is that render cache flush with command stream stall should be sufficient. Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/gen6: Issue direct depth stall and flush after depth clearTopi Pohjolainen2017-01-181-1/+6
| | | | | | | | | | | | | | | | | | instead of calling unconditionally brw_emit_mi_flush() which does: brw_emit_pipe_control_flush(brw, PIPE_CONTROL_DEPTH_CACHE_FLUSH | PIPE_CONTROL_RENDER_TARGET_FLUSH | PIPE_CONTROL_CS_STALL); brw_emit_pipe_control_flush(brw, PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE | PIPE_CONTROL_CONST_CACHE_INVALIDATE); Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Make depth clear flushing more explicitTopi Pohjolainen2017-01-182-8/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | Current blorp logic issues unconditional "flush everything" (see brw_emit_mi_flush()) after each render. For example, all blits issue this unconditionally which shouldn't be needed if they set render cache properly so that subsequent renders do necessary flushing before drawing. In case of piglit: ext_framebuffer_multisample-accuracy all_samples depth_draw small intel_hiz_exec() is always preceded by blorb blit and the unconditional flush looks to hide the lack of stall and flushes in depth clears. By removing the brw_emit_mi_flush() I get gpu hangs. This patch adds the stalls and flushes mandated by the spec and gets rid of those hangs. v2 (Jason, Ken): Document the rational for separating depth cache flush and stall on Gen7. Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/blorp: Use the render cache mechanism instead of explicit flushingTopi Pohjolainen2017-01-181-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | by replacing brw_emit_mi_flush() with brw_render_cache_set_check_flush(). The latter splits the flush in two: brw_emit_pipe_control_flush(brw, PIPE_CONTROL_DEPTH_CACHE_FLUSH | PIPE_CONTROL_RENDER_TARGET_FLUSH | PIPE_CONTROL_CS_STALL); brw_emit_pipe_control_flush(brw, PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE | PIPE_CONTROL_CONST_CACHE_INVALIDATE); instead of int flags = PIPE_CONTROL_NO_WRITE | PIPE_CONTROL_RENDER_TARGET_FLUSH; if (brw->gen >= 6) { flags |= PIPE_CONTROL_INSTRUCTION_INVALIDATE | PIPE_CONTROL_CONST_CACHE_INVALIDATE | PIPE_CONTROL_DEPTH_CACHE_FLUSH | PIPE_CONTROL_VF_CACHE_INVALIDATE | PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE | PIPE_CONTROL_CS_STALL; } brw_emit_pipe_control_flush(brw, flags); v2 (Jason): Check that destination exists before trying to add to render cache. Depth clears and resolves don't have it. Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* utils: really remove the __END_DECLS macroEmil Velikov2017-01-181-1/+0
| | | | | Fixes: d1efa09d342 "util: import sha1 implementation from OpenBSD" Signed-off-by: Emil Velikov <[email protected]>
* utils: build sha1/disk cache only with Android/AutoconfEmil Velikov2017-01-186-0/+58
| | | | | | | | | | Earlier commit imported a SHA1 implementation and relaxed the SHA1 and disk cache handling, broking the Windows builds. Restrict things for now until we get to a proper fix. Fixes: d1efa09d342 "util: import sha1 implementation from OpenBSD" Signed-off-by: Emil Velikov <[email protected]>
* util: import sha1 implementation from OpenBSD17.0-branchpointEmil Velikov2017-01-1812-466/+290
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At the moment we support 5+ different implementations each with varying amount of bugs - from thread safely problems [1], to outright broken implementation(s) [2] In order to accommodate these we have 150+ lines of configure script and extra two configure toggles. Whist an actual implementation being ~200loc and our current compat wrapping ~250. Let's not forget that different people use different code paths, thus effectively makes it harder to test and debug since the default implementation is automatically detected. To minimise all these lovely experiences, import the "100% Public Domain" OpenBSD sha1 implementation. Clearly document any changes needed to get building correctly, since many/most of those can be upstreamed making future syncs easier. As an added bonus this will avoid all the 'fun' experiences trying to integrate it with the Android and SCons builds. v2: Manually expand __BEGIN_DECLS/__END_DECLS and document (Tapani). Furthermore it seems that some games (or surrounding runtime) static link against OpenSSL resulting in conflicts. For more information see the discussion thread [3] Bugzilla [1]: https://bugs.freedesktop.org/show_bug.cgi?id=94904 Bugzilla [2]: https://bugs.freedesktop.org/show_bug.cgi?id=97967 [3] https://lists.freedesktop.org/archives/mesa-dev/2017-January/140748.html Cc: Mark Janes <[email protected]> Cc: Vinson Lee <[email protected]> Cc: Tapani Pälli <[email protected]> Cc: Jonathan Gray <[email protected]> Tested-by: Jonathan Gray <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Acked-by: Tapani Pälli <[email protected]> (v1) Acked-by: Jason Ekstrand <[email protected]> (v1)
* i965: Make brw_cache_item structure private to brw_program_cache.c.Kenneth Graunke2017-01-182-19/+21
| | | | | | | | struct brw_cache_item is an implementation detail of the program cache. We don't need to make those internals available to the entire driver. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eduardo Lima Mitev <[email protected]>
* radeonsi: determine in advance which VBOs should be added to the buffer listMarek Olšák2017-01-183-4/+11
| | | | | | v2: now it should be correct Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: use fewer pointer dereferences in upload_vertex_buffer_descriptorsMarek Olšák2017-01-181-8/+9
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: reject invalid vertex buffer indices at state creationMarek Olšák2017-01-182-5/+6
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: use a global dirty mask for shader pointersMarek Olšák2017-01-184-41/+51
| | | | | | Only vertex buffers use a separate bool flag. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: use a bitmask-based loop in si_decompress_texturesMarek Olšák2017-01-183-7/+31
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: skip an unnecessary mutex lock for L2 prefetchesMarek Olšák2017-01-181-5/+7
| | | | | | the mutex lock is inside util_range_add. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: si_cp_dma_prepare is a no-op for L2 prefetchesMarek Olšák2017-01-182-5/+12
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: add SI_CPDMA_SKIP_BO_LIST_UPDATEMarek Olšák2017-01-182-10/+15
| | | | | | | the next commit will use it in a clever way, because the CP DMA prefetch doesn't need this. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: use the correct target machine when building shader variantsMarek Olšák2017-01-182-14/+29
| | | | | | | | | | If the shader selector is created with a different context than the shader variant, we should use the calling context's target machine for the shader variant. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99419 Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: move shader pipe context state into a separate structureMarek Olšák2017-01-182-14/+22
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* i965: Fix SURFACE_STATE to handle non-zero aux offsetsBen Widawsky2017-01-181-2/+1
| | | | | | | Signed-off-by: Ben Widawsky <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Acked-by: Daniel Stone <[email protected]>
* Revert "etnaviv: Fake occlusion query capability"Christian Gmeiner2017-01-181-3/+2
| | | | | | | | | | This reverts commit b7ac0f567123c96b5cd9e3485b963a5c0a0db66a. This is a half baked solution needs some rework to fixes issues with reported counter bits (GL_QUERY_COUNTER_BITS_ARB). Also it enables PIPE_CAP_QUERY_TIME_ELAPSED accidently. Signed-off-by: Christian Gmeiner <[email protected]>
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