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* mesa: Drop the "target" parameter from NewBufferObject().Kenneth Graunke2014-10-1611-26/+21
| | | | | | | | | | | NewBufferObject took a "target" parameter, which it blindly passed to _mesa_initialize_buffer_object(), which ignored it. Not much point in passing it around. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* glsl: Update and fix typos in README.Andres Gomez2014-10-161-8/+8
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* i965: Flag BRW_ATOMIC_COUNTER_BUFFER when a possible ABO is respecifiedChris Forbes2014-10-161-0/+2
| | | | | Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* mesa: Mark buffer objects that are used as atomic counter buffersChris Forbes2014-10-162-0/+2
| | | | | Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* i965/disasm: Add missing message type for Gen7 DP untyped surface readChris Forbes2014-10-161-0/+1
| | | | | | | | This is used to implement GLSL's atomicCounter() intrinsic. Previously it *worked*, but the disassembly was bogus. Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* i965: Correctly use ABO count to trigger flagging of new surfaces.Chris Forbes2014-10-161-1/+1
| | | | | | | | This would have *almost never* actually been an issue, since other state tends to get flagged at the same time as new ABOs -- but still bogus. Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* i965: No longer reemit textures on BRW_NEW_UNIFORM_BUFFERChris Forbes2014-10-161-2/+1
| | | | | | | | This didn't make any sense, but papered over the missing TexBO flagging we've just fixed, in a bunch of cases. Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* i965: Dirty state in BO reallocation based on usage historyChris Forbes2014-10-161-1/+4
| | | | | Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* i965: Have mesa flag BRW_NEW_TEXTURE_BUFFER when a TexBO binding changesChris Forbes2014-10-161-0/+1
| | | | | Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* i965: Add new dirty flag for new TexBOs.Chris Forbes2014-10-163-0/+4
| | | | | Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* mesa: Mark buffer objects that are used as TexBOsChris Forbes2014-10-162-0/+9
| | | | | Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* mesa: Mark buffer objects which are bound as UBOsChris Forbes2014-10-161-0/+6
| | | | | | | | | When a buffer object is bound to one of the indexed uniform buffer binding points, assume that from that point on it may be used as a uniform buffer. Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* mesa: Add usage history bitfield to buffer objectsChris Forbes2014-10-161-0/+9
| | | | | | | | | | | | | | | | | | | | | | In the drivers, we occasionally want to reallocate the backing store for a buffer object; often to avoid waiting for the GPU to be finished with the previous contents. At the point that happens, we don't have a good way of determining where else the buffer object may be bound, and so no good way of determining which dirty flags need to be raised -- it's fairly expensive to go looking at all the possible binding points. Until now, we've considered any BO to be possibly bound as a UBO or TexBO, and flagged all that state to be reemitted. Instead, remember what kinds of binding point this buffer has ever been used with, so that the drivers can flag only what they need. I don't expect these bits to ever be reset, but that doesn't matter for reasonable apps. Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* vc4: correctly include the source filesEmil Velikov2014-10-162-3/+1
| | | | | | | | | The kernel files are built into a separate static library and all the functions that require it are already wrapped in ifdef USE_VC4_SIMULATOR. Don't forget the header file :) Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965/fs: don't make a fake ir_texture in the Mesa IR frontendConnor Abbott2014-10-151-14/+5
| | | | | | | | | Now that we've made all the texture emit code mostly independent of GLSL IR, this isn't necessary any more. Signed-off-by: Connor Abbott <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
* i965/fs: Refactor the texture emission logic into a single function.Kenneth Graunke2014-10-153-104/+144
| | | | | | | | | | | | | | | | | Before, we had 3 different emit functions for various different gen's, as well as some ancilliary work that was the same across all gen's which was either contained in functions or duplicated across the GLSL IR and Mesa IR backends. Now, we have a single method, emit_texture(), that takes all the information needed to make a texture instruction and handles all the setup, and all we have to do to emit a texture instruction while converting from GLSL IR, Mesa IR, or any new backend is to extract the information emit_texture() needs and then call it. v2: Significant rebasing (by Ken). Signed-off-by: Connor Abbott <[email protected]> Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
* i965/fs: Make gather_channel() not use ir_texture.Connor Abbott2014-10-152-5/+4
| | | | | | | | Our new IR won't have ir_texture objects. Signed-off-by: Connor Abbott <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
* i965/fs: Make swizzle_result() not use ir_texture.Connor Abbott2014-10-153-8/+9
| | | | | | | | Our new IR won't have ir_texture objects. Signed-off-by: Connor Abbott <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
* i965/fs: fix integer textures with swizzlesConnor Abbott2014-10-151-0/+1
| | | | | | | | | This happened to work before, but it would convert the output to a float and then back to an integer which seems bad. Signed-off-by: Connor Abbott <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
* i965/fs: don't pass in ir_texture to emit_texture_*Connor Abbott2014-10-153-24/+23
| | | | | | | | At this point, the only thing it's used for is the opcode. Signed-off-by: Connor Abbott <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
* i965/fs: don't use ir->type in emit_texture_gen4()Connor Abbott2014-10-151-4/+1
| | | | | | | | We already have the type from the original destination. Signed-off-by: Connor Abbott <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
* i965/fs: Don't use ir->lod_info.grad.dPd<x,y> in emit_texture_*.Connor Abbott2014-10-153-18/+31
| | | | | | | | | | | | | This drops a dependency on ir_texture objects. v2 (Ken): Rename lod_components to grad_components, as it only has a meaningful value for ir_txd. We could set it to 1 for TXL, but there's no real need. Signed-off-by: Connor Abbott <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
* i965/fs: Don't use ir->coordinate in emit_texture_*.Connor Abbott2014-10-153-31/+39
| | | | | | | | This drops a dependency on ir_texture objects. Signed-off-by: Connor Abbott <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
* i965/fs: make rescale_texcoord() not use ir_texture.Connor Abbott2014-10-153-8/+8
| | | | | | | | | | Our new IR won't have ir_texture objects, but using glsl_type is fine. v2 (Ken): Drop redundant ir->coordinate NULL check; rebase. Signed-off-by: Connor Abbott <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
* i965/fs: Make emit_mcs_fetch() not use ir_texture.Connor Abbott2014-10-152-4/+4
| | | | | | | Our new IR won't have ir_texture objects. Signed-off-by: Connor Abbott <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
* i965/fs: Rename "length" to "components" in emit_mcs_fetch().Kenneth Graunke2014-10-151-6/+6
| | | | | | | This is slightly clearer. Based on a patch by Connor Abbott. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
* i965: Make brw_texture_offset() not use ir_texture.Connor Abbott2014-10-154-12/+15
| | | | | | | | Our new IR won't have ir_texture objects. Signed-off-by: Connor Abbott <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
* i965/fs: don't use ir->offset in emit_texture_gen5.Connor Abbott2014-10-153-5/+8
| | | | | | | | v2 (Ken): Refactor the Gen7 code separately; rebase. Signed-off-by: Connor Abbott <[email protected]> Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
* i965/fs: Move texel offset handling to visit(ir_texture *).Kenneth Graunke2014-10-153-11/+29
| | | | | | | | | | | | This moves the handling of non-constant texel offset subexpression trees to the place where we visit other such subtrees. It also removes some uses of ir->offset in emit_texture_gen7, which will be useful when we write the backend for our new upcoming IR. Based on a patch by Connor Abbott. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
* i965: Drop ir->op != ir_txf condition in offset checking.Kenneth Graunke2014-10-152-4/+3
| | | | | | | | | brw_lower_unnormalized_offset sets ir->offset to NULL if it applies the texelFetchOffset workarounds, so there's no need to special case it here---there won't be an offset for ir_txf. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
* i965: Restore a lost comment about TXF offset bugs.Kenneth Graunke2014-10-151-0/+5
| | | | | | | | | | | Eric's original code to work around TXF offset bugs contained a comment explaining the problem, which was lost when Chris generalized it to an IR transformation (in commit 598ca510b8a118c3c7e18b5d031a2b116120e0a6). This commit adds the original comment to the newer code. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
* freedreno/ir3: large const supportRob Clark2014-10-155-13/+33
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: update generated headersRob Clark2014-10-154-5/+10
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: fix layer_strideRob Clark2014-10-151-1/+1
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: inline fd_draw_emit()Rob Clark2014-10-152-49/+47
| | | | | | Manual LTO Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: optimize shader key comparisionRob Clark2014-10-155-40/+79
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx: refactor/optimize emitRob Clark2014-10-157-83/+125
| | | | | | | | | | | | | Because we reuse various bits of emit code (for state/vertex/prog/etc) for both regular draws and internal draws (gmem<->mem, clear, etc), the number of parameters getting passed around has been growing. Refactor to group these into fd3_emit. This simplifies fxn signatures, avoids passing around shader key on the stack, etc. It also gives us a nice place to cache shader-variant lookup to avoid looking up shader variants multiple times per draw (without having to *also* pass them around as fxn args everywhere). Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx: refactor vertex state emitRob Clark2014-10-1511-79/+83
| | | | | | | | | | | | | | Get rid of fd3_vertex_buf and use fd_vertex_state directly for all draws. Removes a tiny bit of CPU overhead for munging around the vertex state every time it is emitted, but more importantly it cleans things up for later optimizations, so the emit paths don't have to special case internal draws (gmem<->mem, clears, etc) with regular draws. Instead of constructing fd3_vertex_buf array each time for internal draws, and context init time pre-create solid_vbuf_state and blit_vbuf_state. Signed-off-by: Rob Clark <[email protected]>
* vc4: Fix the uniform debug output.Eric Anholt2014-10-151-1/+1
| | | | | I dropped the shader index when moving to the compiled shader struct, but didn't update the format string here.
* vc4: Add support for user clip plane and gl_ClipVertex.Eric Anholt2014-10-155-4/+91
| | | | Fixes about 15 piglit tests about interpolation and clipping.
* vc4: Move the output semantics setup to a helper.Eric Anholt2014-10-151-16/+28
| | | | I want to reuse it elsewhere to set up outputs that aren't in the TGSI.
* i965: Allow CSE on Gen4-5 unary math.Kenneth Graunke2014-10-151-1/+1
| | | | | | | | | | | | | | | | | | | | | | | Due to the implicit move-from-GRF, unary math looks a lot like the Gen6+ math instruction: it's a single instruction (SEND) with a GRF source. The difference is that it also implicitly clobbers a message register. The only visible effect is that CSE will remove the MRF-clobbering from later math operations. This should be fine; compute_to_mrf and remove_redundant_mrf_writes don't look at the values populated by implied writes, so they can't rely on those values being present. Less interference may actually help those passes make more progress. Binary math is still problematic, since it involves a separate MOV instruction to load the second operand. We continue disallowing CSE for binary math operations. total instructions in shared programs: 3340303 -> 3340100 (-0.01%) instructions in affected programs: 26927 -> 26724 (-0.75%) Nothing hurt, gained, or lost. ~6% reduction on a few shaders. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* r600g,radeonsi: Only set use_staging_texture = TRUE onceMichel Dänzer2014-10-151-8/+5
| | | | | | No need to check for setting the flag after we set it already. Reviewed-by: Marek Olšák <[email protected]>
* r600g,radeonsi: Use staging texture for transfers if any miplevel is tiledMichel Dänzer2014-10-151-1/+1
| | | | | | | We set the NO_CPU_ACCESS flag for BO allocation in that case, so direct CPU access may not work. Reviewed-by: Marek Olšák <[email protected]>
* winsys/radeon: Use separate caching buffer manager for each set of flagsMichel Dänzer2014-10-153-41/+32
| | | | | | | | Otherwise the caching buffer manager may return a buffer which was created with a different set of flags, which can cause trouble. Cc: [email protected] Reviewed-by: Marek Olšák <[email protected]>
* configure.ac: check for libexpat when no pkg-config is availableAndres Gomez2014-10-151-8/+7
| | | | | | | | | | | Previously, when no pkg-config was available for libexpat we would just add the needed linking flags without any extra check. Now, we check that the library and the headers are also installed in the building environment. Reviewed-by: Emil Velikov <[email protected]>
* clover: Fix regression in module serializationTom Stellard2014-10-141-0/+1
| | | | | | | We need to serialize semantic information for arguments, which was added in 06139c56fa070f84a931a4ddbdb894c9e8d24f55. Reviewed-by: Francisco Jerez <[email protected]>
* i965/fs: Use the correct regs_written on unspill instructionsJason Ekstrand2014-10-141-0/+1
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* st/gbm: fix order of arguments passed to is_format_supportedIlia Mirkin2014-10-141-1/+1
| | | | | | | | Reported by Coverity Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Cc: [email protected]
* nouveau: 3d textures are unsupported, limit 3d levels to 1Ilia Mirkin2014-10-141-0/+3
| | | | | | | | | | Ideally there would be a swrast fallback, but the driver isn't ready for that. This should avoid crashes if someone tries to use 3d textures though. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Francisco Jerez <[email protected]> Cc: [email protected]
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