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* radeonsi: make SI_SGPR_VERTEX_BUFFERS the last user SGPR inputMarek Olšák2018-02-264-20/+53
| | | | | | | | so that it can be removed and replaced with inline VBO descriptors, and the pointer can be packed in unused bits of VBO descriptors. This also removes the pointer from merged TES-GS where it's useless. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: set correct num_input_sgprs for VS prolog in merged shadersMarek Olšák2018-02-261-24/+24
| | | | | | | We need to take num_input_sgprs from VS, not the second shader. No apps suffered from this. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: allow fewer input SGPRs in 2nd shader of merged shadersMarek Olšák2018-02-261-1/+5
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: don't use struct si_descriptors for vertex buffer descriptorsMarek Olšák2018-02-266-33/+46
| | | | | | VBO descriptor code will change a lot one day. Reviewed-by: Nicolai Hähnle <[email protected]>
* build: Move wayland-scanner check into platformDaniel Stone2018-02-261-7/+7
| | | | | | | | | | | | Also only check for wayland-scanner if building for the Wayland platform. Signed-off-by: Daniel Stone <[email protected]> Fixes: bfa22266cd4d ("vulkan/wsi/wayland: Add support for zwp_dmabuf") Cc: Emil Velikov <[email protected]> Reported-by: Dieter Nützel <[email protected]> Tested-by: Dieter Nützel <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105211
* build: Move wayland-protocols check into platformDaniel Stone2018-02-261-9/+3
| | | | | | | | | | | | In line with wayland-client and wayland-server, move the check for wayland-protocols into the wayland platform branch. Signed-off-by: Daniel Stone <[email protected]> Fixes: bfa22266cd4d ("vulkan/wsi/wayland: Add support for zwp_dmabuf") Cc: Emil Velikov <[email protected]> Reported-by: Dieter Nützel <[email protected]> Tested-by: Dieter Nützel <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105211
* vulkan/wsi/wayland: Move Wayland protocol from BUILT_SOURCESDaniel Stone2018-02-261-1/+4
| | | | | | | | | | | | | | | | | | autotools wants to have the BUILT_SOURCES ready as soon as it enters the directory, even if they are not used. This meant the build failed if wayland-protocols was not available on the system, even if it was not enabled. As BUILT_SOURCES cannot be used in a conditional (cf. 166852ee957f), do the same thing as EGL and manually encode the dependencies in the Makefile. Signed-off-by: Daniel Stone <[email protected]> Fixes: bfa22266cd4d ("vulkan/wsi/wayland: Add support for zwp_dmabuf") Cc: Emil Velikov <[email protected]> Reported-by: Dieter Nützel <[email protected]> Tested-by: Dieter Nützel <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105211
* r600: fix tgsi clock last settingDave Airlie2018-02-261-0/+1
| | | | | | | On cayman this was hitting an assert later, which probably wasn't see on non-cayman due to having the t slot. Fixes: 9041730d1 (r600: add support for ARB_shader_clock.)
* r600: add time lo/hi debugging output.Dave Airlie2018-02-262-0/+12
| | | | This just adds the these to the debug prints.
* radeonsi/nir: enable lowering of fpowTimothy Arceri2018-02-261-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Lowering fpow in NIR rather than LLVM can be beneficial. Polaris results: Totals from affected shaders: SGPRS: 124928 -> 124896 (-0.03 %) VGPRS: 68616 -> 68332 (-0.41 %) Spilled SGPRs: 394 -> 413 (4.82 %) Spilled VGPRs: 0 -> 0 (0.00 %) Private memory VGPRs: 0 -> 0 (0.00 %) Scratch size: 0 -> 0 (0.00 %) dwords per thread Code Size: 3668912 -> 3658368 (-0.29 %) bytes LDS: 0 -> 0 (0.00 %) blocks Max Waves: 18575 -> 18593 (0.10 %) Wait states: 0 -> 0 (0.00 %) Fixes: d6b753920677 "ac/nir: remove emission of nir_op_fpow" Tested-by: Dieter Nützel <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* ac: make use of ac_get_llvm_num_components() helperTimothy Arceri2018-02-261-5/+1
| | | | Reviewed-by: Samuel Pitoiset <[email protected]>
* gallium/tgsi: remove is_msaa_sampler array from tgsi_shader_infoTimothy Arceri2018-02-262-7/+0
| | | | | | | Seems to have not been used since 16be87c90429 Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* radeonsi/nir: fix loading of doubles for tess varyingsTimothy Arceri2018-02-261-2/+10
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi/nir: fix lds store in tcs outputs handlingTimothy Arceri2018-02-261-1/+1
| | | | | | We were ignoring the channel offset. Reviewed-by: Marek Olšák <[email protected]>
* r600: Take ALU_EXTENDED into account when evaluating jump offsetsGert Wollny2018-02-261-2/+7
| | | | | | | | | | | ALU_EXTENDED needs 4 DWORDS instead of the usual 2, hence if the last ALU clause within a IF-JUMP or ELSE branch is ALU_EXTENDED the target jump offset needs to be adjusted accordingly. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104654 Cc: <[email protected]> Signed-off-by: Gert Wollny <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* mesa: Expose EXT_shader_framebuffer_fetch(_non_coherent) on desktop and ↵Francisco Jerez2018-02-242-1/+4
| | | | | | embedded GL. Reviewed-by: Plamena Manolova <[email protected]>
* glsl: Silence warnings when reading from a framebuffer fetch output.Francisco Jerez2018-02-241-0/+1
| | | | | | | Framebuffer fetch outputs are implicitly initialized upon entry to the fragment shader. Reviewed-by: Plamena Manolova <[email protected]>
* glsl: Specify framebuffer fetch coherency mode in ↵Francisco Jerez2018-02-244-4/+7
| | | | | | | | | | | | | | | | | | | | | lower_blend_equation_advanced(). This requires passing an extra argument to the lowering pass because the KHR_blend_equation_advanced specification doesn't seem to define any mechanism for the implementation to determine at compile-time whether coherent blending can ever be used (not even an "#extension KHR_blend_equation_advanced_coherent" directive seems to be required in the shader source AFAICT). In the long run we'll probably want to do state-dependent recompiles based on the value of ctx->Color.BlendCoherent, but right now there would be no benefit from that because the only driver that supports coherent framebuffer fetch is i965 on SKL+ hardware, which are unable to support the non-coherent path for the moment because of texture layout issues, so framebuffer fetch coherency is always enabled for them. Reviewed-by: Plamena Manolova <[email protected]>
* glsl: Add support for the framebuffer fetch layout(noncoherent) qualifier.Francisco Jerez2018-02-245-2/+61
| | | | | | | | | | This allows the application to request framebuffer fetch coherency with per-fragment output granularity. Coherent framebuffer fetch outputs (which is the default if no qualifier is present for compatibility with older versions of the EXT_shader_framebuffer_fetch extension) will have ir_variable_data::memory_coherent set to true. Reviewed-by: Plamena Manolova <[email protected]>
* glsl: Allow layout token for EXT_shader_framebuffer_fetch_non_coherent.Francisco Jerez2018-02-241-1/+2
| | | | | | | EXT_shader_framebuffer_fetch_non_coherent requires layout qualifiers even on GL(ES) 2. Reviewed-by: Plamena Manolova <[email protected]>
* glsl: Initialize ir_variable_data::fb_fetch_output earlier for GL(ES) 2.Francisco Jerez2018-02-241-2/+7
| | | | | | | | | | At the same point where it is initialized on GL(ES) 3.0+ so we can implement some common layout qualifier handling in a future commit. Until now the fb_fetch_output flag would be inherited from the original implicit gl_LastFragData declaration at a later point in the AST to GLSL IR translation. Reviewed-by: Plamena Manolova <[email protected]>
* glsl: Replace MESA_shader_framebuffer_fetch extension flags with EXT ones.Francisco Jerez2018-02-242-6/+4
| | | | Reviewed-by: Plamena Manolova <[email protected]>
* glsl: Switch ast_type_qualifier to a 128-bit bitset.Francisco Jerez2018-02-243-4/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | This should end the drought of bits in the ast_type_qualifier object. The bitset_t type works pretty much as a drop-in replacement for the current uint64_t bitset. The only catch is that the bitset_t type as defined in the previous commit doesn't have a trivial constructor (because it has a user-defined constructor), so it cannot be used as union member without providing a user-defined constructor for the union (which causes it in turn to be non-trivially constructible). This annoyance could be easily addressed in C++11 by declaring the default constructor of bitset_t to be the implicitly defined one -- IMO one more reason to drop support for GCC 4.2-4.3. The other minor change was required because glsl_parser_extras.cpp was hard-coding the type of bitset temporaries as uint64_t, which (unlike would have been the case if the uint64_t had been replaced with e.g. an __int128) would otherwise have caused a build failure, because the boolean conversion operator of bitset_t is marked explicit (if C++11 is available), so the bitset won't be silently truncated down to 1 bit in order to use it to initialize the uint64_t temporaries (yikes). Reviewed-by: Plamena Manolova <[email protected]>
* util/bitset: Add C++ wrapper for static-size bitsets.Francisco Jerez2018-02-241-0/+114
| | | | Reviewed-by: Plamena Manolova <[email protected]>
* util: Add EXPLICIT_CONVERSION macro.Francisco Jerez2018-02-241-0/+10
| | | | | | | | | This can be used to specify that a C++ conversion operator is not meant to be used for implicit conversions, which can lead to unintended loss of information in some cases. Implemented as a macro in order to keep old GCC versions happy. Reviewed-by: Plamena Manolova <[email protected]>
* mesa: Implement glFramebufferFetchBarrierEXT entry point.Francisco Jerez2018-02-243-2/+24
| | | | Reviewed-by: Plamena Manolova <[email protected]>
* glapi: Update XML for last revision of EXT_shader_framebuffer_fetch.Francisco Jerez2018-02-242-5/+6
| | | | | | | Desktop GL is now supported, and there is an additional entry-point for EXT_shader_framebuffer_fetch_non_coherent. Reviewed-by: Plamena Manolova <[email protected]>
* mesa: Rename MESA_shader_framebuffer_fetch gl_extensions bits to EXT.Francisco Jerez2018-02-2410-16/+15
| | | | | | | | The changes I had originally planned for the MESA_shader_framebuffer_fetch extension have been merged into the EXT spec, there's no point in keeping MESA_shader_framebuffer_fetch extension enables. Reviewed-by: Plamena Manolova <[email protected]>
* mesa: Rename dd_function_table::BlendBarrier to match latest EXT spec.Francisco Jerez2018-02-244-9/+9
| | | | | | | | This GL entry point was renamed to glFramebufferFetchBarrier() in the EXT extension on request from Khronos members. Update the Mesa codebase to match the latest spec. Reviewed-by: Plamena Manolova <[email protected]>
* i965: Fix KHR_blend_equation_advanced with some render targets.Francisco Jerez2018-02-241-1/+3
| | | | | | | | | | | | | | | | This reverts two bogus and seemingly useless changes from the commits referenced below, which broke KHR_blend_equation_advanced (and EXT_shader_framebuffer_fetch_non_coherent which wasn't exposed yet) for any kind of render target surface that would cause the get_isl_surf() call in brw_emit_surface_state() to do anything useful (notice how the result of get_isl_surf() is completely ignored by the caller right now), as was the case while using those extensions with 1D array or 3D framebuffers in particular. Fixes: f5859b45b1686e8116380d87 "i965/miptree: Switch remaining surfaces to isl" Fixes: bf24c3539e4b6989512968ca "i965/miptree: Clean-up unused" Cc: [email protected] Reviewed-by: Plamena Manolova <[email protected]>
* radeonsi: remove si_descriptors parameter from emit_shader_pointer functionsMarek Olšák2018-02-241-12/+13
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: preload the tess offchip ring in TESMarek Olšák2018-02-242-12/+10
| | | | | | so that it's not done multiple times in branches Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: move tess ring address into TCS_OUT_LAYOUT, removes 2 TCS user SGPRsMarek Olšák2018-02-245-91/+70
| | | | | | | TCS_OUT_LAYOUT has 13 unused bits. That's enough for a 32-bit address aligned to 512KB. Hey, it's a 13-bit pointer! Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: move 2nd-shader descriptor pointers into s[0:1]Marek Olšák2018-02-243-74/+140
| | | | | | | | | | | If 32-bit pointers are supported, both pointers can be moved into s[0:1] and then ESGS has exactly the same user data SGPR declarations as VS. If 32-bit pointers are not supported, only one pointer can be moved into s[0:1]. In that case, the 2nd pointer is moved before TCS constants, so that the location is the same in HS and GS. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: change si_descriptors::shader_userdata_offset type to shortMarek Olšák2018-02-242-9/+9
| | | | | | | We will want to use SH registers outside of user data SGPRs, like the GFX9 special SGPRs. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: put both tessellation rings into 1 bufferMarek Olšák2018-02-244-29/+18
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: move tessellation ring info into si_screenMarek Olšák2018-02-243-45/+52
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: move TCS_OUT_LAYOUT.PatchVerticesIn to lower bitsMarek Olšák2018-02-243-5/+6
| | | | | | For a later patch. Reviewed-by: Nicolai Hähnle <[email protected]>
* nvir: dont optimize mad with subops to shladdKarol Herbst2018-02-241-1/+2
| | | | | Signed-off-by: Karol Herbst <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* radv: Really use correct HTILE expanded words.James Legg2018-02-241-3/+3
| | | | | | | | | | | | | | | | | | | | When transitioning to an htile compressed depth format, Set the full depth range, so later rasterization can pass HiZ. Previously, for depth only formats, the depth range was set to 0 to 0. This caused unwanted HiZ rejections with a VK_FORMAT_D16_UNORM depth buffer (VK_FORMAT_D32_SFLOAT was not affected somehow). These values are derived from PAL [0], since I can't find the specification describing the htile values. [0] https://github.com/GPUOpen-Drivers/pal/blob/5cba4ecbda9452773f59692f5915301e7db4a183/src/core/hw/gfxip/gfx9/gfx9MaskRam.cpp#L1500 CC: Dave Airlie <[email protected]> CC: Bas Nieuwenhuizen <[email protected]> CC: [email protected] Reviewed-by: Bas Nieuwenhuizen <[email protected]> Tested-by: Grazvydas Ignotas <[email protected]> Fixes: 5158603182fe7435 "radv: Use correct HTILE expanded words."
* radv/extensions: fix c_vk_version for patch == NoneMauro Rossi2018-02-241-1/+2
| | | | | | | | | | | | | | | | | | | | Similar to cb0d1ba156 ("anv/extensions: Fix VkVersion::c_vk_version for patch == None") fixes the following building errors: out/target/product/x86_64/obj_x86/STATIC_LIBRARIES/libmesa_radv_common_intermediates/radv_entrypoints.c:1161:48: error: use of undeclared identifier 'None'; did you mean 'long'? return instance && VK_MAKE_VERSION(1, 0, None) <= core_version; ^~~~ long external/mesa/include/vulkan/vulkan.h:34:43: note: expanded from macro 'VK_MAKE_VERSION' (((major) << 22) | ((minor) << 12) | (patch)) ^ ... fatal error: too many errors emitted, stopping now [-ferror-limit=] 20 errors generated. Fixes: e72ad05c1d ("radv: Return NULL for entrypoints when not supported.") Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* broadcom/vc5: Fix layout of 3D textures.Eric Anholt2018-02-232-32/+81
| | | | | | Cube maps are entire miptrees repeated, while 3D textures have each level have all of its layers next to each other. Fixes tex3d and tex-miplevel-selection GL2:texture() 3D.
* broadcom/vc5: Ignore unused usage flags in is_format_supported.Eric Anholt2018-02-231-27/+16
| | | | | | | | Like for vc4, the new DISPLAY_TARGET flag ended up causing no formats to match. Just drop the whole retval == usage thing and return early when we hit a known unsupported case. Fixes: f7604d8af521 ("st/dri: only expose config formats that are display targets")
* gbm: Fix the alpha masks in the GBM format table.Eric Anholt2018-02-231-2/+2
| | | | | | | | | Once GBM started looking at the values of the alpha masks, ARGB/ABGR wouldn't match any more because we had both A and R in the low bits. Fixes: 2ed344645d65 ("gbm/dri: Add RGBA masks to GBM format table") Reviewed-by: Ilia Mirkin <[email protected]> Reviewed-by: Daniel Stone <[email protected]>
* mesa: Update vertex processing mode on _mesa_UseProgram.Mathias Fröhlich2018-02-231-0/+2
| | | | | | | | | | | | The change is a bug fix for 92d76a169: mesa: Provide an alternative to get_vp_mode() that actually got exposed through 4562a7b0: vbo: Make use of _DrawVAO from the dlist code. Fixes: KHR-GLES31.core.shader_image_load_store.advanced-sso-simple Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105229 Signed-off-by: Mathias Fröhlich <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* mesa: rename has_core_gs -> has_gs in get_programivMarek Olšák2018-02-231-5/+5
| | | | | | | This is also true for GLES. Tested-by: Dieter Nützel <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* mesa: replace some API_OPENGL_CORE checks with _mesa_is_desktop_glMarek Olšák2018-02-233-6/+6
| | | | | | | This is more accurate with respect to the compatibility profile. Tested-by: Dieter Nützel <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* mesa: add some of missing compatibility support for ARB_bindless_textureMarek Olšák2018-02-233-9/+10
| | | | | | | The extension is exposed in the compatibility profile. Tested-by: Dieter Nützel <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* mesa: expose ARB_enhanced_layouts in the compatibility profileMarek Olšák2018-02-232-2/+3
| | | | | | | GLSL 1.40 is required. Tested-by: Dieter Nützel <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* mesa: enable OpenGL 3.1 with ARB_compatibilityMarek Olšák2018-02-234-20/+17
| | | | | Tested-by: Dieter Nützel <[email protected]> Reviewed-by: Brian Paul <[email protected]>
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