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* i965: For color clears, only disable writes to components that exist.Kenneth Graunke2014-03-241-1/+2
| | | | | | | | | | | | | | | | | | | | | | | The SIMD16 replicated FB write message only works if we don't need the color calculator to mask our framebuffer writes. Previously, we bailed on it if color_mask wasn't <true, true, true, true>. However, this was needlessly strict for formats with fewer than four components - only the components that actually exist matter. WebGL Aquarium attempts to clear a BGRX texture with the ColorMask set to <true, true, true, false>. This will work perfectly fine with the replicated data message; we just bailed unnecessarily. Improves performance of WebGL Aquarium on Iris Pro (at 1920x1080) by abound 50%, and Bay Trail (at 1366x768) by over 70% (using Chrome 24). v2: Use _mesa_format_has_color_component() to properly handle ALPHA formats (and generally be less fragile). Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Tested-by: Dylan Baker <[email protected]>
* mesa: Skip clearing color buffers when color writes are disabled.Kenneth Graunke2014-03-241-1/+26
| | | | | | | | | | | | | | | | | | WebGL Aquarium in Chrome 24 actually hits this. v2: Move to core Mesa (wisely suggested by Ian); only consider components which actually exist. v3: Use _mesa_format_has_color_component to determine whether components actually exist, fixing alpha format handling. v4: Add a comment, as requested by Brian. No actual code changes. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Tested-by: Dylan Baker <[email protected]>
* mesa: Introduce a _mesa_format_has_color_component() helper.Kenneth Graunke2014-03-242-0/+33
| | | | | | | | | | | | | When considering color write masks, we often want to know whether an RGBA component actually contains any meaningful data. This function provides an easy way to answer that question, and handles luminance, intensity, and alpha formats correctly. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Tested-by: Dylan Baker <[email protected]>
* i965: Fix compiler warning about signed/unsigned.Eric Anholt2014-03-241-1/+1
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965/gen8: Change the winsys MSAA blits from blorp to meta.Eric Anholt2014-03-244-8/+152
| | | | | | | | | | | | | | | | | | This gets us equivalent code paths on BDW and pre-BDW, except for stencil (where we don't have MSAA stencil resolve code yet) Improves MSAA-forced citybench by 7.94496% +/- 2.38429% (n=16). Reduces DRI2 MSAA glxgears performance by -12.3559% +/- 1.52845% (n=9). v2: Move the new meta code to brw_meta_updownsample.c, name it brw_meta_updownsample(), add a comment about intel_rb_storage_first_mt_slice(), and rename that function and move the RB generation into it (review ideas by Ken). v3: Fix 2 src vs dst pasteos in previous change. v4: Skip this path pre-gen8 for now, until we can analyze the glxgears performance delta some more. Reviewed-by: Kenneth Graunke <[email protected]>
* mesa: Stop skipping the FinishRenderTexture calls for winsys FBOs.Eric Anholt2014-03-241-2/+3
| | | | | | | | | | Now that BindRenderbufferTexImage() is a thing that drivers can do, winsys FBOs *can* have NeedsFinishRenderTexture set. v2: Keep the short-circuit for non-BindRenderbufferTexImage() drivers (review by Ken). Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Skip reallocating the private MSAA miptree, unless it's resized.Eric Anholt2014-03-241-17/+28
| | | | | | | | | | | Even if the singlesample_mt got reopened from DRI due to pageflipping/buffer swapping, our private miptree shouldn't need any changes. Improves performance of a little swapbuffers-loving microbenchmark with MSAA forced on, by 1.2371% +/- 0.624802% (n=102) Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Simplify the no-reopening-the-winsys-buffer tests.Eric Anholt2014-03-241-22/+16
| | | | | | | The formatting was weird, and the tests were duplicated, and it is guaranteed that mt->region exists. Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Don't forget to free the old singlesample_mt.Eric Anholt2014-03-241-0/+1
| | | | | | | Fixes a memory leak with MSAA winsys buffers since my move of singlesample_mt to the rb in 4e0924c5de5f3964e4ca81f923d877dbb59fad0a Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Add an env var for forcing window system MSAA.Eric Anholt2014-03-242-0/+17
| | | | | | | | Sometimes it would be nice to benchmark some app with MSAA versus not, but it doesn't offer the controls you want. Just provide a handy knob to force the issue. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/vec4: Eliminate dead writes to the flag register.Matt Turner2014-03-241-18/+48
| | | | | | | | | | | For each write, search previous instructions for unread writes to the flag register and remove them. Note that this will not eliminate the last unread write. total instructions in shared programs: 788074 -> 788004 (-0.01%) instructions in affected programs: 4930 -> 4860 (-1.42%) Reviewed-by: Eric Anholt <[email protected]>
* i965/vec4: Eliminate writes that are never read.Matt Turner2014-03-241-0/+46
| | | | | | | | | | With an awful O(n^2) algorithm that searches previous instructions for dead writes. total instructions in shared programs: 805582 -> 788074 (-2.17%) instructions in affected programs: 144561 -> 127053 (-12.11%) Reviewed-by: Eric Anholt <[email protected]>
* i965/vec4: Factor code out of DCE into a separate function.Matt Turner2014-03-241-34/+39
| | | | | | Will be reused in the next commit. Reviewed-by: Eric Anholt <[email protected]>
* i965/vec4: Let dead code eliminate trim dead channels.Matt Turner2014-03-241-3/+26
| | | | | | | | | | | | | | | | | That is, modify mad dst, a, b, c to be mad dst.xyz, a, b, c if dst.w is never read. total instructions in shared programs: 811869 -> 805582 (-0.77%) instructions in affected programs: 168287 -> 162000 (-3.74%) Reviewed-by: Eric Anholt <[email protected]>
* i965/vec4: Track live ranges per-channel, not per vgrf.Matt Turner2014-03-242-14/+41
| | | | | | Will be squashed with the next patch. Reviewed-by: Eric Anholt <[email protected]>
* i965/vec4: Don't dead code eliminate instructions writing the flag.Matt Turner2014-03-241-1/+5
| | | | | | | | | | A future patch adds support for removing dead writes to the flag register. This patch simplifies the logic until then. total instructions in shared programs: 811813 -> 811869 (0.01%) instructions in affected programs: 3378 -> 3434 (1.66%) Reviewed-by: Eric Anholt <[email protected]>
* i965/vec4: Preparatory clean up of dead_code_eliminate().Matt Turner2014-03-241-22/+23
| | | | Reviewed-by: Eric Anholt <[email protected]>
* i965/vec4: Add is_null() method to dst_reg.Matt Turner2014-03-242-0/+10
| | | | Reviewed-by: Eric Anholt <[email protected]>
* i965/vec4: Print the predicate in dump_instructions().Matt Turner2014-03-241-0/+5
| | | | Reviewed-by: Eric Anholt <[email protected]>
* i965/vec4: Rename depends_on_flags() to reads_flag().Matt Turner2014-03-242-3/+3
| | | | | | To be consistent with the fs backend. Reviewed-by: Eric Anholt <[email protected]>
* i965/vec4: Add and use vec4_instruction::writes_flag().Matt Turner2014-03-242-2/+7
| | | | | | | | To be consistent with the fs backend. Also the instruction scheduler incorrectly considered SEL with a conditional modifier to read the flag register. Reviewed-by: Eric Anholt <[email protected]>
* i965/vec4: Add missing doxygen close brace.Matt Turner2014-03-241-0/+1
| | | | Reviewed-by: Eric Anholt <[email protected]>
* mesa: Generate FRAMEBUFFER_INCOMPLETE_MISSING_ATTACHMENT earlierChris Forbes2014-03-251-6/+6
| | | | | | | | | | | | | | The ARB_framebuffer_object spec lists this case before the FRAMEBUFFER_INCOMPLETE_DRAW_BUFFER and FRAMEBUFFER_INCOMPLETE_READ_BUFFER cases. Fixes two broken cases in piglit's fbo-incomplete test, if ARB_ES2_compatibility is not advertised. (If it is, this is masked because the FRAMEBUFFER_INCOMPLETE_DRAW_BUFFER / FRAMEBUFFER_INCOMPLETE_READ_BUFFER cases are removed by that extension) Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* mesa: Fix format matching checks for GL_INTENSITY* internalformats.Chris Forbes2014-03-251-8/+12
| | | | | | | | | GL_INTENSITY has never been valid as a pixel format -- to get the memcpy pack/unpack paths, the app needs to specify GL_RED as the pixel format (or GL_RED_INTEGER for the integer formats). Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* st/mesa: recreate sampler view on context change v3Christian König2014-03-241-0/+10
| | | | | | | | | | | | | With shared glx contexts it is possible that a texture is create and used in one context and then used in another one resulting in incorrect sampler view usage. v2: avoid template copy v3: add XXX comment Signed-off-by: Christian König <[email protected]> Cc: "10.0 10.1" <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* i965: Report the type of color clear in INTEL_DEBUG=blorp.Kenneth Graunke2014-03-231-2/+9
| | | | | | | | | It's useful to know whether a clear is fast (MCS-based), using the SIMD16 repdata message, or slow. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Paul Berry <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* radeonsi: disable fast color clear for 1D-tiled surfaces on CIKMarek Olšák2014-03-221-0/+6
| | | | This will be re-enabled once my kernel fix lands.
* Revert "i965: For color clears, only disable writes to components that exist."Kenneth Graunke2014-03-211-1/+1
| | | | | | | | This reverts commit 2919c3fdb40cf457f2e47f378a46f4cefa9e9f6d. For formats like BGRX, looping through 0..num_components works fine. But for formats like XRGB, we'd check the color mask for X and fail to check it for B.
* i965: For color clears, only disable writes to components that exist.Kenneth Graunke2014-03-211-1/+1
| | | | | | | | | | | | | | | | | | | | The SIMD16 replicated FB write message only works if we don't need the color calculator to mask our framebuffer writes. Previously, we bailed on it if color_mask wasn't <true, true, true, true>. However, this was needlessly strict for formats with fewer than four components - only the components that actually exist matter. WebGL Aquarium attempts to clear a BGRX texture with the ColorMask set to <true, true, true, false>. This will work perfectly fine with the replicated data message; we just bailed unnecessarily. Improves performance of WebGL Aquarium on Iris Pro (at 1920x1080) by abound 40%, and Bay Trail (at 1366x768) by over 70% (using Chrome 24). Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Anuj Phogat <[email protected]> Reviewed-by: Paul Berry <[email protected]> Tested-by: Dylan Baker <[email protected]>
* i965: Print number of multisamples in INTEL_DEBUG=blorp output.Kenneth Graunke2014-03-211-4/+4
| | | | | | | | This lets us distinguish MSAA resolves from other ordinary blits. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Anuj Phogat <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* i965: Drop BLT TexSubImage Y-tiling restriction on Gen6+.Kenneth Graunke2014-03-211-2/+2
| | | | | | | | | | Currently, we don't use this path on Sandybridge because we suspect other paths will be faster. But we potentially could. If we do, we should allow it to support Y-tiled BLTs. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* i965: Enable ARB_vertex_type_10f_11f_11f_rev for Gen4/5 also.Chris Forbes2014-03-221-1/+1
| | | | | | | Tested on ILK and CTG (with the GL3isms taken out of the piglits). Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* clover: Fix typo in validate_object()Tom Stellard2014-03-211-1/+1
| | | | Reviewed-by: Francisco Jerez <[email protected]>
* llvmpipe: add support for b5g6r5_srgbRoland Scheidegger2014-03-215-9/+61
| | | | | | | | | | | | | The conversion code for srgb was tuned for n x 4x8bit AoS -> 4 x nxfloat SoA (and vice versa), fix this to handle also 16bit 565-style srgb formats. Still not really all that generic, things like r10g10b10a2_srgb or r4g4b4a4_srgb wouldn't work (the latter trivial to fix, the former would not require more work to not crash but near certainly need some higher precision calculation) but not needed right now. The code is not fully optimized for this (could use more direct calculation instead of expanding to 8-bit range first) but should be good enough. Reviewed-by: Jose Fonseca <[email protected]>
* gallium: add b5g6r5 srgb formatRoland Scheidegger2014-03-214-4/+21
| | | | | | | | | | | | | | | GL generally doesn't seem to allow srgb formats with less (or more) than 8 bit for the rgb channels, though some hw could easily do it (typically for formats with up to 10 bits for the rgb channels, at least for formats with less than 8 bits support is likely widespread even). While it may be true there aren't really any benefits for such formats, we need for it for d3d, though luckily only for b5g6r5_srgb it seems. So add this format along with the util code for conversion - since that util code is heavily tuned for 8bit srgb this isn't really all that well optimized and rounding doesn't seem right but at least it should give some halfway meaningful results. Reviewed-by: Jose Fonseca <[email protected]>
* nvc0/ir: move sample id to second source arg to fix sampler2DMSIlia Mirkin2014-03-202-4/+12
| | | | | | | | | | | | The nvc0 texfetch instruction expects the sample id to be in the second source (usually used for the offset) rather than as part of the texture coordinate. This fixes all the sampler2DMS/Array tests on nvc0. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Christoph Bumiller <[email protected]> Cc: "10.1" <[email protected]>
* st/mesa: drop the lowering of quad strips to triangle stripsMarek Olšák2014-03-211-10/+0
| | | | | | | | | | | | | | | This fallback to triangle strips is silly and should be done in drivers if they need it. This should fix the case when quad strips are used with flatshading that is enabled by the "flat" GLSL varying modifier. It also fixes primitive restart for quad strips. This fixes piglit: NV_primitive_restart/primitive-restart-draw-mode-quad_strip Cc: [email protected] Reviewed-by: Brian Paul <[email protected]>
* gallium/u_gen_mipmap: remove the software fallbackMarek Olšák2014-03-211-1160/+2
| | | | | | | | The last changes to it are from 2008 and 2009. It doesn't support most texture formats and some texture targets. Nobody can possibly be using this. Reviewed-by: Brian Paul <[email protected]>
* st/mesa: fix generating mipmaps for cube arraysMarek Olšák2014-03-212-29/+22
| | | | | Cc: [email protected] Reviewed-by: Brian Paul <[email protected]>
* mesa: fix software fallback for generating mipmaps for 3D texturesMarek Olšák2014-03-211-21/+16
| | | | | | | | It didn't use the driver-provided src/dstRowStride at all. This was broken for the cases when stride != width*bpp. Cc: [email protected] Reviewed-by: Brian Paul <[email protected]>
* mesa: fix software fallback for generating mipmaps for cube arraysMarek Olšák2014-03-211-2/+5
| | | | | Cc: [email protected] Reviewed-by: Brian Paul <[email protected]>
* mesa: allow generating mipmaps for cube arraysMarek Olšák2014-03-211-0/+4
| | | | | Cc: [email protected] Reviewed-by: Brian Paul <[email protected]>
* mesa: fix texture border handling for cube arraysMarek Olšák2014-03-211-1/+4
| | | | | Cc: [email protected] Reviewed-by: Brian Paul <[email protected]>
* r600g: use more appropriate names for async DMA functionsMarek Olšák2014-03-205-32/+32
| | | | | | *_dma_copy calls either *_dma_copy_buffer or *_dma_copy_tile. Reviewed-by: Michel Dänzer <[email protected]>
* r600g: deobfuscate async DMA codeMarek Olšák2014-03-206-31/+35
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* r600g: don't flush the gfx IB explicitly before doing DMAMarek Olšák2014-03-204-11/+0
| | | | | | It's flushed by calling r600_context_bo_reloc. Reviewed-by: Michel Dänzer <[email protected]>
* winsys/radeon: only add duplicate relocations for DMA if VM isn't supportedMarek Olšák2014-03-201-10/+13
| | | | | | Also rewrite the comment for it to be readable and reorder the code. Reviewed-by: Alex Deucher <[email protected]>
* radeonsi: Implement DMA blitNiels Ole Salscheider2014-03-206-20/+391
| | | | | | | | | | | | | | This code is a slightly modified version of evergreen_dma_blit (and evergreen_dma_copy as well as evergreen_dma_copy_tile). It would be nice to share some of the code in the long term. I have reused some "cik"-prefixed functions that also return the right value for SI. I am not sure if they should be renamed. v2: Marek> removed gfx.flush in si_dma_copy_tile Signed-off-by: Niels Ole Salscheider <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* radeon: Move r600_need_dma_space to common codeNiels Ole Salscheider2014-03-207-15/+15
| | | | | Signed-off-by: Niels Ole Salscheider <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* llvmpipe: Tighten check for alpha-only formatsRichard Sandiford2014-03-201-1/+1
| | | | | | | | | | | The AoS version of ld_build_blend_factor was assuming that if the first channel was alpha, there were no rgb components. Fixes glean/blendFunc on System z. No piglit regressions on x86_64. The shortcut is still used in tests like spec/ARB_framebuffer_object/ fbo-alpha. Signed-off-by: Richard Sandiford <[email protected]>
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