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* nv50/ir/ra: make sure all used function inputs get assigned a regChristoph Bumiller2013-03-121-0/+7
| | | | | | A live range [0, 0) counts as empty. For function inputs this can be a problem, so insert a nop at the beginning to make it [0, 1). This is a bit of a hack but also the most simple solution.
* nv50/ir/ra: also add pre-existing MERGE,SPLIT to constraint listChristoph Bumiller2013-03-121-1/+3
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* nv50/ir/ra: fix confusion with conditional RegisterSet::occupyChristoph Bumiller2013-03-122-12/+32
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* nv50/ir/ra: swap copyCompound args if src is compound and dst isn'tChristoph Bumiller2013-03-121-0/+9
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* nv50/ir/ra: Fix maxGPR calculation for programs with multiple functions.Francisco Jerez2013-03-121-1/+1
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* nv50/ir/ra: Fix traversal before the beginning of the active list in buildRIG.Francisco Jerez2013-03-121-6/+5
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* nv50/ir/ra: Fix RegisterSet::occupy(const Value *v).Francisco Jerez2013-03-121-1/+1
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* nv50/ir/ra: Fix argument const-ness in RegisterSet::idToUnits and idToBytesFrancisco Jerez2013-03-121-2/+2
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* nv50/ir/opt: Fix tryPropagateBranch for BBs with several exit branches.Francisco Jerez2013-03-121-28/+32
| | | | | Comments and "if (bf->cfg.incidentCount() == 1)" condition added by Christoph Bumiller.
* nv50/ir: Clean up references to function values before destroying them.Francisco Jerez2013-03-121-0/+4
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* nouveau: Bail out from nouveau_fence_wait if flushing the pushbuf fails.Francisco Jerez2013-03-121-2/+4
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* mesa: Use correct functions for enum conversion.Vinson Lee2013-03-111-2/+2
| | | | | | | | Fixes mixing enum types defects reported by Coverity. Signed-off-by: Vinson Lee <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* freedreno: gallium driver for adrenoRob Clark2013-03-1149-1/+9973
| | | | | | | | | | | | | | | | | | | Currently works on a220. Others in the a2xx family look pretty similar and should be pretty straightforward to support with the same driver. The a3xx has a new shader ISA, and while many registers appear similar, the register addresses have been completely shuffled around. I am not sure yet whether it is best to support with the same driver, but different compiler, or whether it should be split into a different driver. v1: original v2: build file updates from review comments, and remove GPL licensed header files from msm kernel v3: smarter temp/pred register assignment, fix clear and depth/stencil format issues, resource_transfer fixes, scissor fixes Signed-off-by: Rob Clark <[email protected]>
* d3d1x: Remove.José Fonseca2013-03-12137-27307/+1
| | | | | | Unused/unmaintained. Reviewed-by: Christoph Bumiller <[email protected]>
* nv50: Remove nv0_ir_from_sm4.*José Fonseca2013-03-122-2512/+0
| | | | | | Unused, depends on d3d1x. Reviewed-by: Christoph Bumiller <[email protected]>
* gallivm: clean up passing derivatives aroundRoland Scheidegger2013-03-126-249/+196
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously, the derivatives were calculated and passed in a packed form to the sample code (for implicit derivatives, explicit derivatives were packed to the same format). There's several reasons why this wasn't such a good idea: 1) the derivatives may not even be needed (not as bad as it sounds since llvm will just throw the calculations needed for them away but still) 2) the special packing format really shouldn't be part of the sampler interface 3) depending what the sample code actually does the derivatives will be processed differently, hence there is no "ideal" packing. For cube maps with explicit derivatives (which we don't do yet) for instance the packing looked downright useless, and for non-isotropic filtering we'd need different calculations too. So, instead just pass the derivatives as is (for explicit derivatives), or let the rho calculating sample code calculate them itself. This still does exactly the same packing stuff for implicit derivatives for now, though explicit ones are handled in a more straightforward manner (quick estimates show performance should be quite similar, though it is much easier to follow and also does the rho calculation per-pixel until the end, which we eventually need for spec compliance anyway). No piglit changes. Reviewed-by: Jose Fonseca <[email protected]>
* i965: Fix typo in doxygen hyperlinkChad Versace2013-03-111-1/+1
| | | | | | | | s/brw_state_upload/brw_upload_state/ Found because the link was broken. Signed-off-by: Chad Versace <[email protected]>
* mesa: Reduce memory usage for reg alloc with many graph nodes (part 2).Eric Anholt2013-03-111-4/+8
| | | | | | | | | | | | | After the previous fix that almost removes an allocation of 4*n^2 bytes, we can use a bitset to reduce another allocation from n^2 bytes to n^2/8 bytes. Between the previous commit and this one, the peak heap size for an oglconform ARB_fragment_program max instructions test on i965 goes from 4GB to 255MB. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=55825 Reviewed-by: Kenneth Graunke <[email protected]>
* mesa: Reduce the memory usage for reg alloc with many graph nodes (part 1)Eric Anholt2013-03-111-1/+13
| | | | | | | | We were allocating an adjacency_list entry for every possible interference that could get created, but that usually doesn't happen. We can save a lot of memory by resizing the array on demand. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Improve CSE performance by expiring some available expressions.Eric Anholt2013-03-111-1/+19
| | | | | | | | | | We're already walking the list, and we can easily know when something has no reason to be in the list any longer, so take a brief extra step to reduce our worst-case runtime (an oglconform test that emits the maximum instructions in a fragment program). I don't actually know what the worst-case runtime was, because it was too long and I got bored. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Improve live variables calculation performance.Eric Anholt2013-03-112-26/+32
| | | | | | | | | | | | We can execute way fewer instructions by doing our boolean manipulation on an "int" of bits at a time, while also reducing our working set size. Reduces compile time of L4D2's slowest shader from 4s to 1.1s (-72.4% +/- 0.2%, n=10) v2: Remove redundant masking (noted by Ken) Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Also do the gen4 SEND dependency workaround against other SENDs.Eric Anholt2013-03-111-9/+15
| | | | | | | | | | | | We were handling the the dependency workaround for the first written reg of a send preceding the one we're fixing up, but didn't consider the other regs. Thus if you had two sampler calls that got allocated to the same set of regs, one might, rarely, ovewrite the other. This was occurring in XBMC's GLSL shaders. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=44567 NOTE: This is a candidate for the stable branches. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Switch to using sampler LD messages for uniform pull constants.Eric Anholt2013-03-114-52/+50
| | | | | | | | | When forcing the compiler to always generate pull constants instead of push constants (in order to have an easy to use testcase), improves performance of my old GLSL demo 23.3553% +/- 1.42968% (n=7). Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=60866 Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Fix broken rendering in large shaders with UBO loads.Eric Anholt2013-03-111-0/+2
| | | | | | | | | | The lowering process creates a new vgrf on gen7 that should be represented in live interval analysis. As-is, it was getting a conflicting allocation with gl_FragDepth in the dolphin emulator, producing broken rendering. NOTE: This is a candidate for the 9.1 branch. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=61317 Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Add a comment about about an implementation detail.Eric Anholt2013-03-111-0/+4
| | | | | | | | I was going to fix the code above like the previous commit, but we already had that covered (otherwise all our uniform access would have been broken, unlike just pull constants). Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Fix register allocation for uniform pull constants in 16-wide.Eric Anholt2013-03-111-23/+31
| | | | | | | | | | | | | | | We were allowing a compressed instruction to write a register that contained the last use of a uniform pull constant (either UBO load or push constant spillover), so it would get half its values smashed. Since we need to see the actual instruction to decide this, move the pre-gen6 pixel_x/y logic here, which should improve the performance of register allocation since virtual_grf_interferes() is called more than once per instruction. NOTE: This is a candidate for the stable branches. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=61317 Reviewed-by: Kenneth Graunke <[email protected]>
* intel: Remove some unused debug flags.Eric Anholt2013-03-112-8/+0
| | | | | | | I was looking at the list to see what might be interesting to document for application developers, and it turns out some are completely dead. Reviewed-by: Kenneth Graunke <[email protected]>
* draw/gs: Correctly iterate the emitted primitivesZack Rusin2013-03-071-4/+4
| | | | | | | | | | We were assuming that each emitted primitive had the same number of vertices. That is incorrect. Emitted primitives can have arbirtrary number of vertices. Simply increment index on iteration to fix it. Signed-off-by: Zack Rusin <[email protected]> Reviewed-by: José Fonseca <[email protected]>
* tgsi/exec: Correctly reset NumOutputs before parsing the shaderZack Rusin2013-03-071-3/+7
| | | | | | | | | | | | Whenever we're binding the shaders we're incrementing NumOutputs, assuming the parser spots an output decleration, but we were never reseting the variable. That means that each subsequent bind of a geometry shader would add its number of output to the number of output bound by all previously ran shaders and our indexes would get completely messed up. Signed-off-by: Zack Rusin <[email protected]> Reviewed-by: José Fonseca <[email protected]>
* draw/llvm: another quick hack for drawing with no position outputRoland Scheidegger2013-03-111-1/+1
| | | | | | Also need to skip things if we have no cv value but pos value (happens with geometry shaders enabled). Needs a round of cleanup, though.
* softpipe: don't use samplers with prebaked sampler and sampler_view stateRoland Scheidegger2013-03-116-866/+779
| | | | | | | | | | | | | | This is needed for handling the dx10-style sample opcodes. This also simplifies the logic by getting rid of sampler variants completely (sampler_views though OTOH have sort of variants because some of their state is different depending on the shader stage they are bound to). No significant performance difference (openarena run: 840 frames in 459.8 seconds vs. 840 frames in 460.5 seconds). v2: fix reference counting bug spotted by Jose. Reviewed-by: Jose Fonseca <[email protected]>
* tgsi: emit code for SVIEWINFO and SAMPLE_IRoland Scheidegger2013-03-111-3/+10
| | | | | | | | Can handle them since the single sampler interface was introduced. v2: simplify txf/sample_i handling a bit according to Brian's feedback. Reviewed-by: Jose Fonseca <[email protected]>
* tgsi: fix wrong reg used for unit for TGSI_OPCODE_TXFRoland Scheidegger2013-03-111-2/+2
| | | | Reviewed-by: Jose Fonseca <[email protected]>
* r600g/llvm: Fix buildTom Stellard2013-03-111-1/+1
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* r600g: add debug options disabling various copy-buffer-related featuresMarek Olšák2013-03-113-2/+11
| | | | This will be invaluable for debugging and bug reports.
* mesa: don't allocate a texture if width or height is 0 in CopyTexImageMarek Olšák2013-03-111-10/+12
| | | | | | NOTE: This is a candidate for the stable branches. Reviewed-by: Brian Paul <[email protected]>
* gallium/util: attempt to fix blitting multisample texture arraysMarek Olšák2013-03-112-2/+2
| | | | We don't have a test for this yet, but obviously the swizzle was wrong.
* r600g: allocate FMASK right after the texture, so that it's aligned with itMarek Olšák2013-03-111-1/+1
| | | | | | This avoids the kernel CS checker errors with MSAA textures. Reviewed-by: Jerome Glisse <[email protected]>
* r600g: remove r600.h, move the stuff elsewhere (mostly to r600_pipe.h)Marek Olšák2013-03-118-167/+126
| | | | Reviewed-by: Jerome Glisse <[email protected]>
* r600g: remove r600_hw_context_priv.h, move the stuff to r600_pipe.hMarek Olšák2013-03-116-46/+13
| | | | Reviewed-by: Jerome Glisse <[email protected]>
* r600g: remove deprecated state management codeMarek Olšák2013-03-1110-560/+2
| | | | | | It's nice to see so much code that did pretty much nothing go away. Reviewed-by: Jerome Glisse <[email protected]>
* r600g: atomize pixel shaderMarek Olšák2013-03-117-207/+83
| | | | Reviewed-by: Jerome Glisse <[email protected]>
* r600g: atomize vertex shaderMarek Olšák2013-03-118-232/+203
| | | | Reviewed-by: Jerome Glisse <[email protected]>
* r600g: inline r600_pipe_shader functionMarek Olšák2013-03-115-58/+51
| | | | | | also change names of other functions, so that they make sense Reviewed-by: Jerome Glisse <[email protected]>
* r600g: dump vertex elements state along with the fetch shaderMarek Olšák2013-03-111-0/+8
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* gallium/util: dump instance_divisorMarek Olšák2013-03-111-2/+1
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* r600g: remove bytecode dumpingMarek Olšák2013-03-112-240/+0
| | | | Reviewed-by: Tom Stellard <[email protected]>
* r600g: use a single env var R600_DEBUG, disable bytecode dumpingMarek Olšák2013-03-1110-95/+122
| | | | | | | | | | | | | | | | | | | | | | | | | Only the disassembler is used to dump shaders. Here's a few examples how to use R600_DEBUG. Log compute info: R600_DEBUG=compute Dump all shaders: R600_DEBUG=fs,vs,gs,ps,cs Dump pixel shaders only: R600_DEBUG=ps Disable Hyper-Z: R600_DEBUG=nohyperz Disable the LLVM backend: R600_DEBUG=nollvm Or use any combination of the above, or print all options: R600_DEBUG=help Reviewed-by: Tom Stellard <[email protected]>
* r600g: cleanup #include recursion between r600_pipe.h and evergreen_compute.hMarek Olšák2013-03-117-2/+6
| | | | Reviewed-by: Tom Stellard <[email protected]>
* r600g: don't check for R600_ENABLE_S3TC env varMarek Olšák2013-03-111-10/+3
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