| Commit message (Collapse) | Author | Age | Files | Lines |
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Reviewed-by: Kenneth Graunke <[email protected]>
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brw_bo_map_cpu() took a write_enable arg, but it wasn't always clear
whether we were also planning to read from the buffer. I kept everything
semantically identical by passing only MAP_READ or MAP_READ | MAP_WRITE
depending on the write_enable argument.
The other flags are not used yet, but MAP_ASYNC for instance, will be
used in a later patch to remove the need for a separate
brw_bo_map_unsynchronized() function.
Reviewed-by: Kenneth Graunke <[email protected]>
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I'm going to make a new function named brw_bo_map() in a later patch
that is responsible for choosing the mapping type, so this patch clears
the way.
Reviewed-by: Kenneth Graunke <[email protected]>
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I think these are better names, and it reduces the delta between
upstream and Chris Wilson's brw-batch branch.
Reviewed-by: Kenneth Graunke <[email protected]>
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Since we can distinguish when mapping between READ and WRITE, we can
pass along the map mode to avoid stalls and flushes where possible.
Reviewed-by: Kenneth Graunke <[email protected]>
Reviewed-by: Matt Turner <[email protected]>
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Reviewed-by: Kenneth Graunke <[email protected]>
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Missing in the resource streamer removal of commit 951f56cd43bc.
Reviewed-by: Kenneth Graunke <[email protected]>
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Just return the map from brw_map_bo_*
Reviewed-by: Kenneth Graunke <[email protected]>
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Reviewed-by: Kenneth Graunke <[email protected]>
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Based on discussions with Jason, Ivy Bridge and Bay Trail only actually
support 16 samplers, while newer hardware can support more than the
current limit of 64. Therefore set the lower limit where needed, and
bump up to 128 for everything else. There is also a limit on the total
number of other resources of around 250.
This allows Dawn of War III to render correctly on ANV.
Signed-off-by: Alex Smith <[email protected]>
Reviewed-by: Jason Ekstrand <[email protected]>
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As already done by RADV.
v2: Move version calculation function to src/vulkan/util to share with
RADV.
Signed-off-by: Alex Smith <[email protected]>
Reviewed-by: Emil Velikov <[email protected]>
Reviewed-by: Eric Engestrom <[email protected]>
Reviewed-by: Jason Ekstrand <[email protected]>
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This means it can be reused for other Vulkan drivers. Also fix up a
typo, need to search for '.' in the version string rather than ','.
v2: Remove unneeded temporary version variable (Emil, Eric)
Signed-off-by: Alex Smith <[email protected]>
Reviewed-by: Emil Velikov <[email protected]>
Reviewed-by: Eric Engestrom <[email protected]>
Reviewed-by: Jason Ekstrand <[email protected]>
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We have Vulkan utilities in both src/util and src/vulkan/util. The
latter seems a more appropriate place for Vulkan-specific things, so
move them there.
v2: Android build system changes (from Tapani Pälli)
Signed-off-by: Alex Smith <[email protected]>
Reviewed-by: Emil Velikov <[email protected]>
Reviewed-by: Eric Engestrom <[email protected]>
Acked-by: Jason Ekstrand <[email protected]>
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The current way of handling groups doesn't seem to be able to handle
MI_LOAD_REGISTER_* with more than one register. This change reworks
the way we handle groups by building a traversal list on loading the
GENXML files.
Let's say you have
Instruction {
Field0
Field1
Field2
Group0 (count=2) {
Field0-0
Field0-1
}
Group1 (count=4) {
Field1-0
Field1-1
}
}
We build of linked on load that goes :
Instruction -> Group0 -> Group1
All of those are gen_group structures, making the traversal trivial.
We just need to iterate groups for the right number of timers (count
field in genxml).
The more fancy case is when you have only a single group of unknown
size (count=0). In that case we keep on reading that group for as long
as we're within the DWordLength of that instruction.
Signed-off-by: Lionel Landwerlin <[email protected]>
Reviewed-by: Rafael Antognolli <[email protected]>
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Only harvested Stoney has 2 CUs. Tested on 2-CU Stoney and Fiji forced
to 2 CUs.
Cc: 17.0 17.1 <[email protected]>
Tested-by: Edmondo Tommasina <[email protected]>
Tested-by: Dieter Nützel <[email protected]>
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Now, st_update_window_rectangles() won't be called when the
scissor is going to be updated.
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
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This new driver flag will replace _NEW_SCISSOR which is
emitted when setting new window rectangles but it actually
triggers useless changes in the state tracker (like scissor
and rasterizer).
EXT_window_rectangles is currently only supported by Nouveau.
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
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This is actually useless because this driver call is only used
by the classic DRI drivers which don't support that extension
and probably won't never support it.
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
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We usually check that given parameters are different before
updating the state.
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
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We usually check that given parameters are different before
updating the state.
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
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We usually check that given parameters are different before
updating the state.
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
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We moved to INTEL_SCALAR_* when we added more than a single stage, but
never went back and converted the VS to work that way. Be consistent.
Also update the documentation to actually mention these debug variables.
Acked-by: Jason Ekstrand <[email protected]>
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This just sets the vulkan device type depending on whether
this is an APU or GPU.
Signed-off-by: Dave Airlie <[email protected]>
Fixes: f4e499ec791 "radv: add initial non-conformant radv vulkan driver"
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We always compute HTILE size using addrlib, even when not TC compatible.
Signed-off-by: Bas Nieuwenhuizen <[email protected]>
Reviewed-by: Dave Airlied <[email protected]>
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Typo here, fixes command submission hangs on vega
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I'm open to reverting this closer to release if bad things
happen, but it might be easier to debugging to leave it for now.
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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We don't support these yet, and it'll take a bit of work to do so.
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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These are just some register changes ported from radeonsi for gfx9.
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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These are ported from radeonsi, don't know all the rules for
when they should be inserted.
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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This adds some rb+ support, as on GFX9 we have to disable
it as per radeonsi.
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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GFX9 needs to write event EOP to a fence buffer, allocate some
space for this, and just write an ever increasing number to it,
this isn't exactly what radeonsi does, but it seems to work.
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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This adds gfx9 support for the texture descriptor along
with the fmask/cmask allocation routines.
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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This just adds support for initialising some GFX9 registers,
and handles the different init for the VGT reuse reg.
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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This adds support to the CP dma code for GFX9, ported from
radeonsi.
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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This is ported from radeonsi.
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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This is ported from radeonsi.
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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This just adds the strings and includes the gfx9 register defs
in some files that we need them in.
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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radeonsi never uses 512 here anymore.
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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This is just copied over.
Signed-off-by: Dave Airlie <[email protected]>
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Must have snuck in during a rebase.
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This is just ported from radeonsi.
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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This just splits out some non-gfx9 bits in advance to avoid
regressions.
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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This just moves the code around in preparation for gfx9 support.
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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In advance of GFX9 to reduce chances for regression, refactor
this code out so adding the GFX9 changes will be more obvious.
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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This just collapses a few per-stage things into a loop,
shouldn't affect anything.
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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The file was introduced to track which LLVM revision was required, yet
that has quickly gone out of shape.
It has seen no updates since 2013.
Cc: Nicolai Hähnle <[email protected]>
Cc: Marek Olšák <[email protected]>
Signed-off-by: Emil Velikov <[email protected]>
Reviewed-by: Aaron Watry <[email protected]>
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Signed-off-by: Juan A. Suarez Romero <[email protected]>
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