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| * mesa/formats: Don't flip channels of null array formatsJason Ekstrand2015-08-121-1/+2
| * mesa/formats: Fix swizzle flipping for big-endian targetsJason Ekstrand2015-08-121-4/+12
| * mesa/formats: Only do byteswapping for packed formatsJason Ekstrand2015-08-121-3/+3
| * configure.ac: Always define __STDC_LIMIT_MACROS.Matt Turner2015-08-111-1/+1
| * i965: Optimize brw_inst_set_bits() and brw_compact_inst_set_bits().Matt Turner2015-08-111-4/+4
| * i965: Optimize brw_inst_bits() and brw_compact_inst_bits().Matt Turner2015-08-111-4/+4
| * docs: add news item and link release notes for 10.6.4Emil Velikov2015-08-112-0/+7
| * docs: add sha256 checksums for 10.6.4Emil Velikov2015-08-111-1/+2
| * docs: add release notes for 10.6.4Emil Velikov2015-08-111-0/+136
| * gallium/radeon: fix r600g build if LLVM is disabledMarek Olšák2015-08-111-4/+5
| * r600g: use a bitfield to track dirty atomsGrazvydas Ignotas2015-08-114-10/+56
| * r600g: don't mark unused atom dirtyGrazvydas Ignotas2015-08-111-1/+3
| * r600g: use a helper to add an initialized atomGrazvydas Ignotas2015-08-114-8/+16
| * gallium/radeon: use helper functions to mark atoms dirtyGrazvydas Ignotas2015-08-1119-145/+182
| * docs: Mark ARB_shader_image_load_store as done on i965.Francisco Jerez2015-08-112-1/+2
| * i965: Expose ARB_shader_image_load_store.Francisco Jerez2015-08-111-0/+1
| * i965/fs: Clamp image array indices to the array bounds on IVB.Francisco Jerez2015-08-111-4/+21
| * i965/fs: Translate image load, store and atomic NIR intrinsics.Francisco Jerez2015-08-111-0/+106
| * i965/fs: Handle image uniforms in NIR programs.Francisco Jerez2015-08-112-8/+44
| * i965: Implement logic to set up and upload an image uniform.Francisco Jerez2015-08-112-0/+32
| * i965: Teach type_size() about the size of an image uniform.Francisco Jerez2015-08-112-0/+2
| * i965/fs: Implement image load, store and atomic.Francisco Jerez2015-08-112-0/+264
| * i965/fs: Import image format conversion primitives.Francisco Jerez2015-08-111-0/+265
| * i965/fs: Import image format metadata queries.Francisco Jerez2015-08-111-0/+148
| * i965/fs: Import code to transform image coordinates into surface coordinates.Francisco Jerez2015-08-111-0/+52
| * i965/fs: Import image memory offset calculation code.Francisco Jerez2015-08-111-0/+169
| * i965/fs: Import image access validity checks.Francisco Jerez2015-08-111-0/+55
| * i965: Define implementation constants for ARB_shader_image_load_store.Francisco Jerez2015-08-111-0/+12
| * i965/gen7-8: Set up early depth/stencil control appropriately for image load/...Francisco Jerez2015-08-116-3/+21
| * i965/gen7-8: Poke the 3DSTATE UAV access enable bits.Francisco Jerez2015-08-117-9/+32
| * i965/gen7: Enable fragment shader dispatch if the program has image uniforms.Francisco Jerez2015-08-111-0/+1
| * i965: Hook up image state upload.Francisco Jerez2015-08-116-2/+146
| * i965: Reserve enough parameter entries for all image uniforms used in the pro...Francisco Jerez2015-08-114-3/+7
| * i965: Define and initialize image parameter structure.Francisco Jerez2015-08-116-1/+170
| * i965: Implement surface state set-up for shader images.Francisco Jerez2015-08-113-0/+188
| * i965: Fix brw_memory_barrier() for SKL.Francisco Jerez2015-08-111-1/+1
| * i965: Add SKL support to brw_miptree_get_horizontal_slice_pitch().Francisco Jerez2015-08-111-3/+1
| * glsl: Add missing spec quote about atomic counter in structsTimothy Arceri2015-08-111-4/+4
| * radeonsi: add new OLAND pci idAlex Deucher2015-08-101-0/+1
| * nouveau: no need to do tnl wakeup, state updates are always hooked upIlia Mirkin2015-08-102-2/+0
| * i965/fs: Make resolve_source_modifiers consistent with the vec4 versionJason Ekstrand2015-08-103-15/+16
| * i965/vec4_visitor: Make some function arguments const referencesJason Ekstrand2015-08-102-6/+6
| * i965/fs: Don't do redundant RA setup on IVB+Jason Ekstrand2015-08-101-0/+9
| * i965/fs: Use dispatch_width instead of reg_width in alloc_reg_setsJason Ekstrand2015-08-101-8/+8
| * ra: Delete the conflict lists in ra_set_finalizeJason Ekstrand2015-08-101-0/+5
| * ra: Refactor ra_set_finalizeJason Ekstrand2015-08-101-26/+25
| * i965/vec4_nir: Properly handle integer multiplies on BDW+Jason Ekstrand2015-08-101-24/+28
| * i965/vec4_nir: Do boolean source modifier resolves on BDW+Jason Ekstrand2015-08-103-0/+29
| * i965/vec4-nir: Handle boolean resolvese on ILK-Jason Ekstrand2015-08-101-0/+14
| * i965/nir: Don't mark bany or ball instructions for resolveJason Ekstrand2015-08-101-0/+23
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