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* glsl: re-enable varying packing in GL4.4+Timothy Arceri2016-07-221-30/+24
| | | | | | | | We can still do packing we just need to get the packing type from the consumer rather than the producer. Reviewed-by: Iago Toral Quiroga <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97033
* i965: Include VUE handles for GS with invocations > 1.Kenneth Graunke2016-07-211-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We always resort to the pull model for instanced GS inputs. So, we'd better include the VUE handles, or else we can't actually pull anything. Ian reports that on his branch with OES_geometry_shader enabled, this fixes a bunch of dEQP-GLES31.functional.geometry_shading tests:: - instanced.draw_2_instances_geometry_2_invocations - instanced.draw_2_instances_geometry_8_invocations - instanced.draw_4_instances_geometry_2_invocations - instanced.draw_4_instances_geometry_8_invocations - instanced.draw_8_instances_geometry_2_invocations - instanced.draw_8_instances_geometry_8_invocations - instanced.geometry_2_invocations - instanced.geometry_32_invocations - instanced.geometry_8_invocations - instanced.geometry_max_invocations - instanced.geometry_output_different_2_invocations - instanced.geometry_output_different_32_invocations - instanced.geometry_output_different_8_invocations - instanced.geometry_output_different_max_invocations - instanced.invocation_output_vary_by_attribute - instanced.invocation_output_vary_by_texture - instanced.invocation_output_vary_by_uniform - query.primitives_generated_instanced Cc: [email protected] Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]> Tested-by: Ian Romanick <[email protected]>
* mesa: Add -fno-math-errno -fno-trapping-math to CXXFLAGS.Matt Turner2016-07-211-0/+3
| | | | | | | | | | | | Not sure why I forgot to add them to CXXFLAGS in commit f55c408067 or commit 875458b778. Cuts about 1k of .text. text data bss dec hex filename 5806354 287816 29384 6123554 5d7022 i965_dri.so before 5805497 287744 29384 6122625 5d6c81 i965_dri.so after Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* mesa: Drop -fno-builtin-memcmp.Matt Turner2016-07-211-8/+0
| | | | | | | | | | | | According to the referenced bug report, gcc-4.5 and newer do not inline memcmp(). I see no difference in performance of ipers with llvmpipe on a Sandybridge (which does not have "Enhanced REP MOVSB/STOSB") by removing this flag. I attempted to confirm the problem with gcc-4.4, but it fails to compile for quite a few different reasons. Reviewed-by: Ian Romanick <[email protected]>
* mapi: Massage code to allow clang to compile.Matt Turner2016-07-214-6/+23
| | | | | | | | | | According to https://llvm.org/bugs/show_bug.cgi?id=19778#c3 this code was violating the spec, resulting in it failing to compile. Cc: [email protected] Co-authored-by: Tomasz Paweł Gajc <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89599 Reviewed-by: Emil Velikov <[email protected]>
* docs: Add extensions not part of any GL or GL ES versionIan Romanick2016-07-211-0/+56
| | | | | | | | | | | Based loosely on patches submitted ages ago by Thomas Helland. v2: Add lots of missing data provided by Ilia. Fix sort order of GL_ARB_sparse_texture extensions suggested by Ilia. v3: Note that Dave Airlie has started work on GL_ARB_bindless_texture. Signed-off-by: Ian Romanick <[email protected]>
* docs: Update GL3.txt for OpenGL 4.0 on i965-ish hardwareIan Romanick2016-07-211-13/+13
| | | | Signed-off-by: Ian Romanick <[email protected]>
* docs: Update GL3.txt for OpenGL ES on i965-ish hardwareIan Romanick2016-07-211-13/+15
| | | | Signed-off-by: Ian Romanick <[email protected]>
* i965: print error messages if gs fails to compileTimothy Arceri2016-07-211-0/+6
| | | | | | We do this for all other stages. Reviewed-by: Kenneth Graunke <[email protected]>
* i965: enable GL4.4 for Gen8+Timothy Arceri2016-07-212-2/+2
| | | | Acked-by: Kenneth Graunke <[email protected]>
* i965: enable ARB_enhanced_layouts for gen6+Timothy Arceri2016-07-211-1/+1
| | | | Reviewed-by: Edward O'Callaghan <[email protected]>
* i965/vec4: add packing support for tcs load outputsTimothy Arceri2016-07-213-7/+17
| | | | | Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]>
* i965/vec4: add support for packing tes inputsTimothy Arceri2016-07-211-4/+10
| | | | | Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Alejandro Piñeiro <[email protected]>
* i965/vec4: add support for packing tcs outputsTimothy Arceri2016-07-211-0/+7
| | | | | Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]>
* i965/vec4: support packing tcs inputsTimothy Arceri2016-07-212-2/+7
| | | | | Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]>
* i965/vec4: add component packing for gsTimothy Arceri2016-07-211-0/+2
| | | | | Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]>
* i965/vec4: add support for packing vs/gs/tes outputsTimothy Arceri2016-07-213-4/+45
| | | | | | | | | | | Here we create a new output_generic_reg array with the ability to store the dst_reg for each component of user defined varyings. This is needed as the previous code only stored the dst_reg based on the varying location which meant packed varyings would overwrite each other. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Alejandro Piñeiro <[email protected]>
* i965/vec4: add support for packing inputsTimothy Arceri2016-07-211-0/+2
| | | | | Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]>
* i965: add helper for creating packing writemaskTimothy Arceri2016-07-211-0/+7
| | | | | | | | | | | For example where n=3 first_component=1 this will give us 0xE (WRITEMASK_YZW). V2: Add assert to check first component is <= 4 (Suggested by Ken) Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]>
* i965: add helpers for creating component layout swizzleTimothy Arceri2016-07-211-0/+3
| | | | | | | | | This will be used to swizzle components to the beginning or end of the vector based on the component layout qualifier and whether we are doing a load or store. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]>
* vc4: Return V3D version details in the GL renderer info.Eric Anholt2016-07-202-1/+12
| | | | This is as close as we get to a name for the 3D blocks.
* vc4: Check the V3D version reported by the kernel.Eric Anholt2016-07-202-0/+62
| | | | | | We don't want to bring up an old userspace driver on a kernel for newer hardware. We'll also want to look at the other ident fields in the future.
* vc4: Detect and report kernel support for branching.Eric Anholt2016-07-201-2/+12
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* vc4: Switch to using the libdrm-provided vc4_drm.h.Eric Anholt2016-07-203-280/+4
| | | | | The required version is set to .69 for the getparam ioctl that will be used in the next commit.
* docs: mark ARB_enhanced_layouts as DONE for i965Timothy Arceri2016-07-211-2/+2
| | | | Reviewed-by: Edward O'Callaghan <[email protected]>
* i965: enable ARB_enhanced_layouts for gen8+Timothy Arceri2016-07-211-0/+1
| | | | Acked-by: Edward O'Callaghan <[email protected]>
* nir: add doubles component packing supportTimothy Arceri2016-07-211-0/+20
| | | | | | | | | | | This makes sure we give the correct driver location for doubles when using component packing. Specifically it handles packing a dvec3 with a double which is the only packing scenario allowed which spans across two locations. Acked-by: Kenneth Graunke <[email protected]> Reviewed-by: Alejandro Piñeiro <[email protected]>
* i965: add component packing support for load_output intrinsicsTimothy Arceri2016-07-211-5/+33
| | | | | | | | Here we use the component qualifier (which is the first component) as an offset when loading output varyings. Reviewed-by: Alejandro Piñeiro <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: enable component packing for vs and fsTimothy Arceri2016-07-214-25/+16
| | | | | | | | | | | Rather than trying to work out the total number of components used at a location we simply treat all outputs as vec4s. This removes the need for complex code looping over varyings to match packed locations and the need for storing the total number of components used at each location. Reviewed-by: Alejandro Piñeiro <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: bring back type_size_vec4_times_4()Timothy Arceri2016-07-212-0/+14
| | | | | | | | We will use this for output varyings. To make component packing simpler we will just treat all varyings as vec4s. Reviewed-by: Alejandro Piñeiro <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* nir/inline: Constant-initialize local variables in the callee if neededJason Ekstrand2016-07-201-2/+40
| | | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Cc: "12.0" <[email protected]>
* nir: Add a nir_deref_foreach_leaf helperJason Ekstrand2016-07-202-0/+120
| | | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Cc: "12.0" <[email protected]>
* clover: Re-order includes in invocation.cpp to fix buildTom Stellard2016-07-201-7/+17
| | | | | | | | | | | | The build was failing because the official CL headers have a few defines, like: # define cl_khr_gl_sharing 1 Which have the same name as some class members of clang's OpenCLOptions class. If we include the cl headers first, this breaks the build because the member names of this class are replaced by the literal 1. Reviewed-by: Francisco Jerez <[email protected]> Reviewed-by: Vedran Miletić <[email protected]>
* clover: Add missing include v2Tom Stellard2016-07-201-0/+1
| | | | | | | | | | | clang commit r275822 removed unnecessary includes from header files, so we now need to explicitly include clang/Lex/PreprocessorOptions.h v2: - Use <> instead of "" for the include path. Reviewed-by: Francisco Jerez <[email protected]> Reviewed-by: Vedran Miletić <[email protected]>
* i965: Move VS load_input handling to nir_emit_vs_intrinsic().Kenneth Graunke2016-07-201-31/+30
| | | | | | | | | | TCS/TES/GS and now FS all handle these in stage-specific functions. CS don't have inputs, so VS was the only one left using this code. Move it to the VS-specific function for clarity. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Delete the FS_OPCODE_INTERPOLATE_AT_CENTROID virtual opcode.Kenneth Graunke2016-07-204-10/+0
| | | | | | | | | We no longer use this message. As far as I can tell, it's fairly useless - the equivalent information is provided in the payload. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Chris Forbes <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Rewrite FS input handling to use the new NIR intrinsics.Kenneth Graunke2016-07-205-341/+270
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This eliminates the need to walk the list of input variables, recurse into their types (via logic largely redundant with nir_lower_io), and interpolate all possible inputs up front. The backend no longer has to care about variables at all, which eliminates complications from trying to pack multiple variables into the same location. Instead, each intrinsic specifies exactly what's needed. This should unblock Timothy's work on GL_ARB_enhanced_layouts. Each load_interpolated_input intrinsic corresponds to PLN instructions, while load_barycentric_at_* intrinsics correspond to pixel interpolator messages. The pixel/centroid/sample barycentric intrinsics simply refer to payload fields (delta_xy[]), and don't actually generate any code. Because we use a single intrinsic for both centroid-qualified variables and interpolateAtCentroid(), they become indistinguishable. We stop sending pixel interpolator messages for those, and instead use the payload provided data, which should be considerably faster. On Broadwell: total instructions in shared programs: 9067751 -> 9067570 (-0.00%) instructions in affected programs: 145902 -> 145721 (-0.12%) helped: 422 HURT: 209 total spills in shared programs: 2849 -> 2899 (1.76%) spills in affected programs: 760 -> 810 (6.58%) helped: 0 HURT: 10 total fills in shared programs: 3910 -> 3950 (1.02%) fills in affected programs: 617 -> 657 (6.48%) helped: 0 HURT: 10 LOST: 3 GAINED: 3 The differences mostly appear to be slight changes in MOVs. v2: Use nir_shader_compiler_options::use_interpolated_input_intrinsics flag rather than passing it directly to nir_lower_io. Use the unreachable() macro rather than assert in one place. (Review feedback from Chris Forbes.) Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Chris Forbes <[email protected]> Acked-by: Jason Ekstrand <[email protected]>
* i965: Move load_interpolated_input/barycentric_* intrinsics to the top.Kenneth Graunke2016-07-201-0/+64
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, i965 interpolates all FS inputs at the top of the program. This has advantages and disadvantages, but I'd like to keep that policy while reworking this code. We can consider changing it independently. The next patch will make the compiler generate PLN instructions "on the fly", when it encounters an input load intrinsic, rather than doing it for all inputs at the start of the program. To emulate this behavior, we introduce an ugly pass to move all NIR load_interpolated_input and payload-based (not interpolator message) load_barycentric_* intrinsics to the shader's start block. This helps avoid regressions in shader-db for cases such as: if (...) { ...load some input... } else { ...load that same input... } which CSE can't handle, because there's no dominance relationship between the two loads. Because the start block dominates all others, we can CSE all inputs and emit PLNs exactly once, as we did before. Ideally, global value numbering would eliminate these redundant loads, while not forcing them all the way to the start block. When that lands, we should consider dropping this hacky pass. Again, this pass currently does nothing, as i965 doesn't generate these intrinsics yet. But it will shortly, and I figured I'd separate this code as it's relatively self-contained. v2: Dramatically simplify pass - instead of creating new instructions, just remove/re-insert their list nodes (suggested by Jason Ekstrand). Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Chris Forbes <[email protected]> [v1] Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Add a pass to demote sample interpolation intrinsics.Kenneth Graunke2016-07-201-0/+44
| | | | | | | | | | | | | | | | | | | When working with a non-multisampled render target, asking for "sample" interpolation locations doesn't make sense. We demote them to centroid. In a couple of patches, brw_compute_barycentric_modes will begin looking at these intrinsics to determine the barycentric modes. fs_visitor also will use them to code-generate pixel interpolator messages or payload references. Handling the "but what if it's not MSAA?" logic ahead of time in a NIR pass simplifies things and prevents duplicated logic. This patch doesn't actually do anything useful yet as we don't generate these intrinsics. I decided to keep it separate as it's self-contained, in the hopes of shrinking the "convert everything" patch for reviewers. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Chris Forbes <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* nir: Add nir_load_interpolated_input lowering code.Kenneth Graunke2016-07-202-5/+100
| | | | | | | | | | | | | | Now nir_lower_io can optionally produce load_interpolated_input and load_barycentric_* intrinsics for fragment shader inputs. flat inputs continue using regular load_input. v2: Use a nir_shader_compiler_options flag rather than ad-hoc boolean passing (in response to review feedback from Chris Forbes). Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Chris Forbes <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* nir: Add new intrinsics for fragment shader input interpolation.Kenneth Graunke2016-07-205-0/+51
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Backends can normally handle shader inputs solely by looking at load_input intrinsics, and ignore the nir_variables in nir->inputs. One exception is fragment shader inputs. load_input doesn't capture the necessary interpolation information - flat, smooth, noperspective mode, and centroid, sample, or pixel for the location. This means that backends have to interpolate based on the nir_variables, then associate those with the load_input intrinsics (say, by storing a map of which variables are at which locations). With GL_ARB_enhanced_layouts, we're going to have multiple varyings packed into a single vec4 location. The intrinsics make this easy: simply load N components from location <loc, component>. However, working with variables and correlating the two is very awkward; we'd much rather have intrinsics capture all the necessary information. Fragment shader input interpolation typically works by producing a set of barycentric coordinates, then using those to do a linear interpolation between the values at the triangle's corners. We represent this by introducing five new load_barycentric_* intrinsics: - load_barycentric_pixel (ordinary variable) - load_barycentric_centroid (centroid qualified variable) - load_barycentric_sample (sample qualified variable) - load_barycentric_at_sample (ARB_gpu_shader5's interpolateAtSample()) - load_barycentric_at_offset (ARB_gpu_shader5's interpolateAtOffset()) Each of these take the interpolation mode (smooth or noperspective only) as a const_index, and produce a vec2. The last two also take a sample or offset source. We then introduce a new load_interpolated_input intrinsic, which is like a normal load_input intrinsic, but with an additional barycentric coordinate source. The intention is that flat inputs will still use regular load_input intrinsics. This makes them distinguishable from normal inputs that need fancy interpolation, while also providing all the necessary data. This nicely unifies regular inputs and interpolateAt functions. Qualifiers and variables become irrelevant; there are just load_barycentric intrinsics that determine the interpolation. v2: Document the interp_mode const_index value, define a new BARYCENTRIC() helper rather than using SYSTEM_VALUE() for some of them (requested by Jason Ekstrand). Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Chris Forbes <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv: Properly call gen75_emit_state_base_address on Haswell.Kenneth Graunke2016-07-201-1/+1
| | | | | | | | | | This should fix MOCS values. Caught by Coverity. CID: 1364155 Cc: "12.0" <[email protected]> Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* genxml: Rename "API Rendering Disable" to "Rendering Disable".Kenneth Graunke2016-07-202-2/+2
| | | | | | | | | | Gen7/7.5 call it "Rendering Disable" while Gen8/9 prefix it with "API". Pick one for consistency, and so we can share code between generations. Cc: "12.0" <[email protected]> Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv: Unify 3DSTATE_CLIP code across generations.Kenneth Graunke2016-07-203-43/+41
| | | | | | | | | | The bulk of this is the same. There are just a couple fields that only exist on one generation or another, and we can easily handle those with an #ifdef. Cc: "12.0" <[email protected]> Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv: Enable early culling on Gen7.Kenneth Graunke2016-07-201-0/+1
| | | | | | | | We set the cull mode, but forgot the enable bit. Gen8 uses this. Cc: "12.0" <[email protected]> Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv: Fix near plane clipping on Gen7/7.5.Kenneth Graunke2016-07-201-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Gen7/7.5 clip code used APIMODE_OGL, while the Gen8+ clip code used APIMODE_D3D. The meaning hasn't changed, so one of these must be wrong. It appears that the hardware documentation is completely wrong. It claims that the "API Mode" bit means: 0h APIMODE_OGL NEAR_VP boundary == 0.0 (NDC) 1h APIMODE_D3D NEAR_VP boundary == -1.0 (NDC) However, DirectX typically uses 0.0 for the near plane, while unextended OpenGL uses -1.0. i965's gen6_clip_state.c uses APIMODE_D3D for the GL_ZERO_TO_ONE case, so I believe the meanings are backwards from what the documentation says. Section 23.2 ("Primitive Clipping") of the Vulkan 1.0.21 specification contains the following equations: -w_c <= x_c <= w_c -w_c <= y_c <= w_c 0 <= z_c <= w_c This means that Vulkan follows D3D semantics. Cc: "12.0" <[email protected]> Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* genxml: Add APIMODE_D3D missing enum values and improve consistency.Kenneth Graunke2016-07-206-3/+8
| | | | | | Cc: "12.0" <[email protected]> Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* genxml: Add CLIPMODE_* prefix to 3DSTATE_CLIP's "Clip Mode" enum values.Kenneth Graunke2016-07-203-7/+7
| | | | | | | | | Gen6-7.5 use CLIPMODE_REJECT_ALL, while Gen8+ just used REJECT_ALL. Being consistent will let me unify code, and I prefer having the prefix. Cc: "12.0" <[email protected]> Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* swr: [rasterizer core] introduce simd16intrin.hTim Rowley2016-07-204-6/+751
| | | | | | | | | Refactoring to leave existing simd_* intrinsics in "simdintrin.h" unchanged, adding corresponding simd16_* intrinsics in "simd16intrin.h" on the side, with emulation, that we can use piecemeal, rather than the all-or-nothing approach to bring up avx512. Signed-off-by: Tim Rowley <[email protected]>
* swr: [rasterizer core] fix for possible int32 overflow conditionTim Rowley2016-07-201-1/+1
| | | | Signed-off-by: Tim Rowley <[email protected]>
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