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* intel: Add a INTEL_DEBUG=color option.Kenneth Graunke2017-03-213-0/+3
| | | | | | | This will be used for color output in debug messages. Reviewed-by: Lionel Landwerlin <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* nir: Add positional argument specifiers.Vinson Lee2017-03-212-2/+2
| | | | | | | | | | | | | Fix build with Python < 2.7. File "src/compiler/nir/nir_builder_opcodes_h.py", line 46, in <module> from nir_opcodes import opcodes File "src/compiler/nir/nir_opcodes.py", line 178, in <module> unop_convert("{}2{}{}".format(src_t[0], dst_t[0], bit_size), ValueError: zero length field name in format Fixes: 762a6333f21f ("nir: Rework conversion opcodes") Signed-off-by: Vinson Lee <[email protected]>
* r600_shader.c: check returned value of eg_get_interpolator_indexJulien Isorce2017-03-211-2/+4
| | | | | | | | | Like done in another place in that same file. CID 1250588 Signed-off-by: Julien Isorce <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* util/disk_cache: fix build on platforms where shader cache is disabledTimothy Arceri2017-03-211-1/+1
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* util/disk_cache: add a write helperGrazvydas Ignotas2017-03-211-14/+23
| | | | | | | | | | | | | Simplifies the write code a bit and handles EINTR. V2: (Timothy Arceri) Drop EINTR handling. To do it properly we would need a retry limit but it's probably best to just avoid trying to write if we hit EINTR and try again next time we see the program. Signed-off-by: Grazvydas Ignotas <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* tests/cache_test: use the blob key's actual first byteGrazvydas Ignotas2017-03-211-6/+2
| | | | | | | | | There is no need to hardcode it, we can just use blob_key[0]. This is needed because the next patches are going to change how cache keys are computed. Signed-off-by: Grazvydas Ignotas <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* util/disk_cache: use a helper to compute cache keysGrazvydas Ignotas2017-03-217-25/+51
| | | | | | | | | | This will allow to hash additional data into the cache keys or even change the hashing algorithm easily, should we decide to do so. v2: don't try to compute key (and crash) if cache is disabled Signed-off-by: Grazvydas Ignotas <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* radv: move KHR_get_physical_device_properties2 to instance props.Dave Airlie2017-03-211-4/+4
| | | | | | | | | This is an instance property not a device one. Fixes: dEQP-VK.api.info.device.extensions Signed-off-by: Dave Airlie <[email protected]>
* radv: drop illegal DB format error.Dave Airlie2017-03-211-3/+0
| | | | | | We'll get this if we have a stencil only setup. Signed-off-by: Dave Airlie <[email protected]>
* i965: Add autogenerated OA files to .gitignore.Kenneth Graunke2017-03-201-0/+1
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* swr: [rasterizer] Cleanup naming of codegen filesTim Rowley2017-03-2026-138/+145
| | | | | | All template files and generated files are prefixed with gen_. Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer codegen] Remove BOM from knob_defs.pyTim Rowley2017-03-201-1/+1
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer codegen] Rewrite gen_llvm_types.py to use makoTim Rowley2017-03-204-118/+171
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer codegen] Fix generation of knobsTim Rowley2017-03-208-8/+23
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer codegen] Change backend template comment styleTim Rowley2017-03-201-29/+29
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer codegen] Rewrite gen_llvm_ir_macros.py to use makoTim Rowley2017-03-206-349/+204
| | | | | | Don't create/use cpp files, header only now. Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer codegen] Quiet gen_backends.py executionTim Rowley2017-03-201-3/+3
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer scripts] Put codegen scripts into a separate directoryTim Rowley2017-03-2032-84/+84
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer core] Fix trifan regression from 9d3442575fTim Rowley2017-03-202-5/+11
| | | | | | | | Fixes piglit triangle-rasterization-overdraw. SIMD16 path not working. Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer core] SIMD16 Frontend WIP - fix tesselation crashesTim Rowley2017-03-203-31/+35
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer jitter] Fix LogicOp blend jit after assert changesTim Rowley2017-03-201-10/+25
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer] Convert more SWR_ASSERT(false, ...) to SWR_INVALID(...)Tim Rowley2017-03-2018-57/+57
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer core] Fix typo in SIMD16 code pathTim Rowley2017-03-201-1/+1
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer core/common] Fix the native AVX512 build under ICCTim Rowley2017-03-203-27/+47
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer core] Allow no arguments to SWR_INVALID macroTim Rowley2017-03-201-1/+13
| | | | | | Turns out this is somewhat tricky with gcc/g++. Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer] Slight assert refactoringTim Rowley2017-03-2017-256/+296
| | | | | | | | Make asserts more robust. Add SWR_INVALID(...) as a replacement for SWR_ASSERT(0, ...) Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer] Backend code adjustmentsTim Rowley2017-03-205-45/+70
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer archrast] Fix the early and late depthstencil eventsTim Rowley2017-03-201-5/+5
| | | | | | The coverage and stencil mask arguments were reversed. Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer core] Implement double pumped SIMD16 TESSTim Rowley2017-03-201-79/+177
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer archrast/core/scripts] Fix archrast multithreading issueTim Rowley2017-03-206-16/+52
| | | | | | | | Per pixel stats are cached but were not always being flushed as threads moved from one draw context to the next. Added an explicit flush to allow all archrast objects to flush any cached events. Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer archrast] Remove redundant data from archrast filesTim Rowley2017-03-202-137/+103
| | | | | | | If count can be derived from other counts then this can be done in post processing scripts. Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer archrast/scripts] Further archrast cleanupsTim Rowley2017-03-203-164/+104
| | | | | | Removed redundant data being written out to file Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer core] Fix RECT_LIST primitive assemblyTim Rowley2017-03-201-2/+2
| | | | | | | The bug would make the 3rd component of attributes on the second triangle of a RECT be invalid. Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer common] Add InterpolateComponentFlat utilityTim Rowley2017-03-201-0/+13
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer archrast] Fix performance issue with archrast statsTim Rowley2017-03-201-15/+15
| | | | | | | Performance is now 50x faster with archrast now that we're properly filtering out all of the rdtsc begin/end. Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer core] Implement SIMD16 GS and STREAMOUTTim Rowley2017-03-201-51/+251
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer archrast] Add additional API eventsTim Rowley2017-03-202-0/+48
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer core/scripts] Autogen backend initialization function(s)Tim Rowley2017-03-207-226/+398
| | | | | | | | | | | Autogen functions that instantiates different BackendPixelRate templates. Functions get split into separate files after reaching a user defined threshold (currently 512 per file) to speed up compilation. This change will enable the addition of more template flags in the pixel back end. Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer core] backend.h declares gBackendPixelRateTableTim Rowley2017-03-202-1/+8
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer core] Finish SIMD16 PA OPT including tesselationTim Rowley2017-03-201-21/+247
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer core] Finish SIMD16 PA OPT except tesselationTim Rowley2017-03-202-274/+1405
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer core] Support sparse numa id values on all OSesTim Rowley2017-03-201-27/+53
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* i965: Skip register write detection when possible.Kenneth Graunke2017-03-201-2/+8
| | | | | | | | | | | | | | | | | | | Detecting register write support by trial and error introduces a stall at screen creation time, which it would be nice to avoid. Certain command parser versions guarantee this will work (see the giant comment in intelInitScreen2 below, or a few commits ago): - Ivybridge: version >= 1 (kernel v3.16) - Baytrail: version >= 2 (kernel v3.19) - Haswell: version >= 7 (kernel v4.8) For simplicity, we don't bother with version 1 in this patch. This assumes that the user hasn't disabled aliasing PPGTT via a kernel command line parameter. Don't do that - you're only breaking things. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]>
* i965: Set screen->cmd_parser_version to 0 if we can't write registers.Kenneth Graunke2017-03-201-6/+11
| | | | | | | | | | | | | | | | If we can't write registers, then the effective command parser version is 0 - it may exist, but it's not usefully enabling anything. See kernel commit 1ca3712ca3429a617ed6c5f87718e4f6fe4ae0c6 (in v4.8) where the kernel starts doing this for us. This makes us do more or less the same thing on older kernels. This should preserve a bit of sanity by allowing us to perform a screen->cmd_parser_version > N check to determine that we really can use the features promised by command parser version N. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]>
* i965: Document the sad story of the kernel command parser.Kenneth Graunke2017-03-201-0/+97
| | | | | | | | This should help us figure out the complexities of which kernel versions we need to get various features on various platforms. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]>
* i965: Fall back to GL 4.2/4.3 on Haswell if the kernel isn't new enough.Kenneth Graunke2017-03-201-2/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | In commit d2590eb65ff28a9cbd592353d15d7e6cbd2c6fc6 I enabled GL 4.5 on Haswell...but failed to check if we could do indirect compute shader dispatch...and query buffer objects. Indirect compute shader dispatch requires command parser version 5 (kernel commit 7b9748cb513a6bef4af87b79f0da3ff7e8b56cd8, which is in Linux v4.4). On earlier kernels we would have disabled ARB_compute_shader, which is a mandatory part of OpenGL 4.3+. Query buffer objects currently require MI_MATH and MI_LOAD_REGISTER_REG, which mean command parser version 7 (Linux v4.8). On earlier kernels we would have disabled ARB_query_buffer_object, which is a mandatory part of OpenGL 4.4+. The new version support looks like: - Kernel 4.1 and older => OpenGL 3.3 - Kernel 4.2-4.3 => OpenGL 4.2 - Kernel 4.4-4.7 => OpenGL 4.3 - Kernel 4.8+ => OpenGL 4.5 Cc: "17.0" <[email protected]> Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]>
* r600g/sb: Fix memory leak by reworking uses list (rebased)Constantine Kharlamov2017-03-204-61/+28
| | | | | | | | | | | | | | | | | | | | | | | | | The author is Heiko Przybyl(CC'ing), the patch is rebased on top of Bartosz Tomczyk's one per Dieter Nützel's comment. Tested-by: Constantine Charlamov <[email protected]> v2: Resend the patch again through git-email. The prev. rebase was sent through Thunderbird, which screwed up tab characters, making the patch not apply. -------------- When fixing the stalls on evergreen I introduced leaking of the useinfo structure(s). Sorry. Instead of allocating a new object to hold 3 values where only one is actually used, rework the list to just store the node pointer. Thus no allocating and deallocation is needed. Since use_info and use_kind aren't used anywhere, drop them and reduce code complexity. This might also save some small amount of cycles. Thanks to Bartosz Tomczyk for finding the bug. Reported-by: Bartosz Tomczyk <bartosz.tomczyk86 at gmail.com <https://lists.freedesktop.org/mailman/listinfo/mesa-dev>> Signed-off-by: Heiko Przybyl <lil_tux at web.de <https://lists.freedesktop.org/mailman/listinfo/mesa-dev>> Supersedes: https://patchwork.freedesktop.org/patch/135852 Signed-off-by: Marek Olšák <[email protected]> Tested-by: Dieter Nützel <[email protected]>
* radeonsi: check the IR type before waiting for a compute compilation fenceMarek Olšák2017-03-201-1/+3
| | | | | | | This should fix OpenCL getting stuck. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100288 Reviewed-by: Samuel Pitoiset <[email protected]>
* aubinator: Move the guts of decode_group() to decoder.c.Kenneth Graunke2017-03-203-31/+42
| | | | | | This lets us use it outside of the aubinator binary itself. Reviewed-by: Lionel Landwerlin <[email protected]>
* aubinator: Drop spec parameter to decode_group().Kenneth Graunke2017-03-201-13/+12
| | | | | | No longer necessary - the iterator gets it from the group. Reviewed-by: Lionel Landwerlin <[email protected]>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-22 20:59:52 +0000