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* st/mesa: release sampler views when redefining a texture in st_context_teximageMarek Olšák2017-07-281-0/+2
* radv: for stencil only set Z tile mode index to same valueDave Airlie2017-07-281-0/+2
* virgl: drop precise modifier.Dave Airlie2017-07-281-0/+10
* st/mesa: always unconditionally revalidate main framebuffer after SwapBuffersMarek Olšák2017-07-281-0/+10
* radeonsi: bail out instead of crashing if the main shader part failed to compileNicolai Hähnle2017-07-271-0/+3
* radeonsi: update a comment for merged shadersNicolai Hähnle2017-07-271-1/+5
* radeonsi/gfx9: dump previous stage LLVM IR for merged shadersNicolai Hähnle2017-07-271-0/+7
* radeonsi: make sure TCS main output VGPRs don't alias inputsNicolai Hähnle2017-07-271-5/+13
* radeonsi/gfx9: always wrap GS and TCS in an if-block (v2)Nicolai Hähnle2017-07-272-33/+79
* radeonsi/gfx9: fix vertex idx in ES with multiple waves per threadgroupNicolai Hähnle2017-07-271-1/+6
* swr: fix transform feedback logicGeorge Kyriazis2017-07-274-8/+71
* swr/rast: non-regex knob fallback code for gcc < 4.9Tim Rowley2017-07-271-0/+21
* mesa: check that buffer object is not NULL before initializing itTimothy Arceri2017-07-271-4/+3
* glsl: small builtin inline tidy upTimothy Arceri2017-07-271-4/+4
* virgl: encode index buffer offset.Dave Airlie2017-07-271-1/+1
* st/mesa: Fix inversed test in st_api_destroy_drawableMichel Dänzer2017-07-271-1/+1
* radv/ac: port SI TC L1 write corruption fix.Dave Airlie2017-07-261-3/+5
* radv/winsys: fix padding command stream for SIDave Airlie2017-07-261-4/+6
* radv/ac: realign SI workaround with radeonsi.Dave Airlie2017-07-261-2/+3
* i965/clear: Don't perform redundant depth clearsJason Ekstrand2017-07-261-3/+31
* i965: Only do depth resolves prior to clearing when neededJason Ekstrand2017-07-261-3/+36
* i965: Expose get_num_logical_layers outside of intel_mipmap_tree.c.Kenneth Graunke2017-07-262-5/+8
* ac/surface: fix hybrid graphics where APU=GFX9, dGPU=olderMarek Olšák2017-07-261-0/+12
* radeonsi: decrease the number of compiler threadsMarek Olšák2017-07-262-3/+8
* gallium/radeon: make S_FIXED function signed and move it to shared codeMarek Olšák2017-07-263-9/+5
* st/mesa: also clamp and quantize per-unit lod biasMarek Olšák2017-07-263-4/+6
* st/mesa: fix unconditional return in st_framebuffer_iface_removeMarek Olšák2017-07-261-1/+1
* drirc: whitelist glthread for Mount and Blade WarbandMarek Olšák2017-07-261-0/+3
* egl: move KHR_no_error vs debug/robustness check further downGrigori Goronzy2017-07-261-11/+10
* radv: rename physical_device->uuid[] to cache_uuid[]Andres Rodriguez2017-07-263-5/+5
* radeonsi/gfx9: reduce max threads per block to 1024 on gfx9+Nicolai Hähnle2017-07-261-15/+24
* radeonsi: fix detection of DRAW_INDIRECT_MULTI on SINicolai Hähnle2017-07-261-2/+2
* anv: only expose up to 28 vertex attributesIago Toral Quiroga2017-07-261-1/+1
* anv/cmd_buffer: fix off by one error in assertionIago Toral Quiroga2017-07-261-1/+1
* i965: Shut up Coverity warning about HiZ buffers.Kenneth Graunke2017-07-251-0/+1
* i965: Fix = vs == in MCS aux usage assert.Kenneth Graunke2017-07-251-1/+1
* i965: Fix offset addition in get_isl_surf.Kenneth Graunke2017-07-251-3/+3
* mesa/st: fix inconsistent indentation of st_cb_bufferobjects.cAndres Rodriguez2017-07-261-18/+18
* compiler: move glsl_interface_packing enum to shader_enums.hTimothy Arceri2017-07-264-27/+11
* mesa/st: fix unused variable warningsTimothy Arceri2017-07-264-10/+11
* mesa/st: move st_pipe_format_to_mesa_format() call to where its usedTimothy Arceri2017-07-261-2/+1
* gallium/util: fix unused variable warningTimothy Arceri2017-07-261-3/+5
* mesa: drop useless assertTimothy Arceri2017-07-261-1/+0
* mesa: call binding functions directly from glDeleteBuffersTimothy Arceri2017-07-261-3/+9
* mesa: move static binding functions above _mesa_DeleteBuffers()Timothy Arceri2017-07-261-207/+205
* mesa: don't try to re-generate the default bufferTimothy Arceri2017-07-261-6/+6
* broadcom/vc4: Switch the V3D 2.1 XML over to restricted address fields.Eric Anholt2017-07-251-4/+4
* broadcom/genxml: Support address fields with <32 bitsEric Anholt2017-07-251-1/+1
* broadcom/vc4: Use the RA callback to improve register selection's choices.Eric Anholt2017-07-251-1/+52
* ra: Add a callback for selecting a register from what's available.Eric Anholt2017-07-252-14/+82