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* gallivm: Cleanup USE_MCJIT.Jose Fonseca2017-01-181-10/+25
* i965: Don't map/unmap in brw_print_program_cache on LLC platforms.Kenneth Graunke2017-01-171-2/+4
* i965: Move program cache printing to brw_program_cache.c.Kenneth Graunke2017-01-173-57/+49
* i965: Make a helper for finding an existing shader variant.Kenneth Graunke2017-01-177-85/+68
* glsl: Make copy propagation not panic when it sees an intrinsic.Kenneth Graunke2017-01-171-4/+27
* i965: Make DCE set null destinations on messages with side effects.Kenneth Graunke2017-01-171-13/+41
* i965: Combine some dead code elimination NOP'ing code.Kenneth Graunke2017-01-171-8/+1
* i965: Make DCE explicitly not eliminate any control flow instructions.Kenneth Graunke2017-01-171-3/+2
* radv: disable vertex reuse when writing viewport indexDave Airlie2017-01-181-0/+2
* radv: add support for layered clears (v2)Dave Airlie2017-01-181-6/+22
* radv/ac: split part of llvm compile into a separate functionDave Airlie2017-01-181-11/+22
* radv/ac: switch an if to switchDave Airlie2017-01-181-4/+9
* radv: add support for writing layer/viewport index (v2)Dave Airlie2017-01-183-4/+25
* ac/debug: Decrease num_dw for type 2 NOP's.Bas Nieuwenhuizen2017-01-171-0/+1
* radeonsi: for the tess barrier, only use emit_waitcnt on SI and LLVM 3.9+Marek Olšák2017-01-171-2/+5
* st/vdpau: remove the delayed rendering hack(v1.1)Nayan Deshmukh2017-01-176-141/+52
* st/vdpau: use dri3 to directly send the buffer to X(v2)Nayan Deshmukh2017-01-172-27/+33
* vl/dri3: use external texture as back buffers(v4)Nayan Deshmukh2017-01-173-18/+115
* anv: set UAV coherence required bit when neededIago Toral Quiroga2017-01-171-0/+51
* anv: increase ANV_MAX_STATE_SIZE_LOG2 limit to 1 MBSamuel Iglesias Gonsálvez2017-01-172-2/+2
* nv50/ir: optimize shl + andIlia Mirkin2017-01-161-0/+11
* nvc0: enable FBFETCH with a special slot for color buffer 0Ilia Mirkin2017-01-1611-7/+174
* st/mesa: add support for advanced blend when fb can be fetched fromIlia Mirkin2017-01-164-8/+37
* gallium: add flags parameter to texture barrierIlia Mirkin2017-01-1614-16/+24
* gallium: add PIPE_CAP_TGSI_FS_FBFETCHIlia Mirkin2017-01-1617-2/+20
* gallium: add FBFETCH opcode to retrieve the current sample valueIlia Mirkin2017-01-163-2/+15
* mesa: allow BlendBarrier to be used without support for full fb fetchIlia Mirkin2017-01-161-1/+2
* glsl: avoid treating fb fetches as output reads to be loweredIlia Mirkin2017-01-161-1/+1
* radv/meta: split color renderpass creation out.Dave Airlie2017-01-171-38/+49
* radv: Support multiple devices.Bas Nieuwenhuizen2017-01-162-44/+19
* radv: Get physical device from radv_device instead of the instance.Bas Nieuwenhuizen2017-01-169-49/+50
* nvc0: true up exposing of the HW_METRIC_QUERY_GROUP for maxwellIlia Mirkin2017-01-161-2/+2
* radv/ac: use ctx->voidt in more places. (v2)Dave Airlie2017-01-171-11/+11
* radv/meta: consolidate the depth stencil clear renderpassesDave Airlie2017-01-172-41/+48
* nv50/ir: handle new DDIV op which will be used for double divisionsIlia Mirkin2017-01-161-0/+3
* tgsi: add DDIV instructionNicolai Hähnle2017-01-164-1/+17
* radeonsi: fix R600_DEBUG=nooptvariantNicolai Hähnle2017-01-161-1/+1
* i965: Make BLORP disable the NP Z PMA stall fix.Kenneth Graunke2017-01-161-0/+4
* i965: Enable OpenGL 4.5 on Haswell.Kenneth Graunke2017-01-162-2/+2
* radeonsi: implement GL_FIXED vertex formatMarek Olšák2017-01-163-7/+20
* radeonsi: implement 32-bit SNORM/UNORM/SSCALED/USCALED vertex formatsMarek Olšák2017-01-163-18/+90
* radeonsi: make fix_fetch 64-bitMarek Olšák2017-01-166-9/+18
* gallium/hud: avoid buffer overrunThomas Hindoe Paaboel Andersen2017-01-161-2/+4
* gallium/radeon: add GPU-shaders-busy HUD queryMarek Olšák2017-01-164-1/+31
* gallium/radeon: make the GPU load / GRBM_STATUS monitoring extensibleMarek Olšák2017-01-163-32/+53
* radeonsi: show average results per frame for perf counters in HUDMarek Olšák2017-01-161-1/+1
* gallium/hud: disable queries during HUD draw callsMarek Olšák2017-01-163-1/+29
* gallium/hud: increase the vertex buffer size for background quadsMarek Olšák2017-01-161-1/+1
* st/va: delay calling begin_frame until we have all parametersNayan Deshmukh2017-01-161-3/+3
* i965: Use align1 mode for barrier messages.Kenneth Graunke2017-01-151-0/+3