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* vulkan/wsi: Add multiple planes to wsi_imageDaniel Stone2018-02-214-20/+31
| | | | | | | Not currently used. Signed-off-by: Daniel Stone <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* nir: remove old assertTimothy Arceri2018-02-221-1/+0
| | | | | | | | | | | | This was originally intended to make sure the remap location was not -1. However the code has changed alot since then, the location is now never set to -1 and we also handle components meaning this old assert has been doing comparisions with the pointer to the array of component data. Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105183
* radeonsi/nir: collect more accurate output_usagemaskTimothy Arceri2018-02-221-13/+43
| | | | | | | | | | | Fixes assert in the glsl-1.50-gs-max-output-components piglit test. Note that the double handling will only work for doubles that don't take up multiple slots i.e. double and dvec2. However dual slot double handling is an existing bug which is made no worse by this patch. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi/nir: disable GLSL IR loop unrollingTimothy Arceri2018-02-221-0/+2
| | | | | | | | | | | | | | | | | | | | | | | Delaying unrolling and allowing NIR to do it instead has been shown to result in better code in drivers such as i965. shader-db results appear to show the same is true for radeonsi. The other advantage is that using NIR unrolling improves compile times significantly. Totals from affected shaders: SGPRS: 9624 -> 10016 (4.07 %) VGPRS: 6800 -> 6464 (-4.94 %) Spilled SGPRs: 0 -> 2 (0.00 %) Spilled VGPRs: 0 -> 0 (0.00 %) Private memory VGPRs: 0 -> 0 (0.00 %) Scratch size: 0 -> 0 (0.00 %) dwords per thread Code Size: 359176 -> 332264 (-7.49 %) bytes LDS: 0 -> 0 (0.00 %) blocks Max Waves: 1355 -> 1432 (5.68 %) Wait states: 0 -> 0 (0.00 %) Reviewed-by: Marek Olšák <[email protected]>
* radeonsi/nir: fix tess varying loads for doublesTimothy Arceri2018-02-221-2/+2
| | | | | | | | | Fixes the following piglit tests: tests/spec/arb_tessellation_shader/execution/double-array-vs-tcs-tes.shader_test tests/spec/arb_tessellation_shader/execution/double-vs-tcs-tes.shader_test Reviewed-by: Marek Olšák <[email protected]>
* ac/radeonsi: pass type to load_tess_varyings()Timothy Arceri2018-02-224-2/+17
| | | | | | We need this to be able to load 64bit varyings. Reviewed-by: Marek Olšák <[email protected]>
* x11/dri3: Store raw present completion modeDaniel Stone2018-02-212-10/+4
| | | | | | | | | | The DRI3 drawable info struct currently stores a boolean for whether the last completed operation was a flip or not. As we need to track the full completion mode for handling suboptimal returns, change the 'flipping' field to the raw present completion mode from the server. Signed-off-by: Daniel Stone <[email protected]> Reviewed-by: Eric Engestrom <[email protected]>
* x11/dri3: Don't open-code ARRAY_SIZEDaniel Stone2018-02-212-3/+4
| | | | | | Signed-off-by: Daniel Stone <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* anv: Don't assert that stencil HiZ clears are single-sliceJason Ekstrand2018-02-211-3/+6
| | | | | | | | | It's true for depth HiZ clears because we only have HiZ on single-slice images right now. However, for stencil-only clears there is no such restriction. Tested-by: Rafael Antognolli <[email protected]> Reviewed-by: Nanley Chery <[email protected]>
* anv: Only copy clear dwords if we're rendering to the first sliceJason Ekstrand2018-02-211-1/+4
| | | | Reviewed-by: Rafael Antognolli <[email protected]>
* radeonsi: don't flush when si_eliminate_fast_color_clear is no-opMarek Olšák2018-02-211-1/+5
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* radeonsi: make texture_discard_cmask/eliminate functions non-staticMarek Olšák2018-02-212-11/+13
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* radeonsi: enable uvd encode for HEVC mainJames Zhu2018-02-211-1/+3
| | | | | | | Enable UVD encode for HEVC main profile Signed-off-by: James Zhu <[email protected]> Reviewed-by: Boyuan Zhang <[email protected]>
* radeonsi:create uvd hevc enc entryJames Zhu2018-02-211-3/+12
| | | | | | | Add UVD hevc encode pipe video codec creation entry Signed-off-by: James Zhu <[email protected]> Reviewed-by: Boyuan Zhang <[email protected]>
* radeon/uvd:add uvd hevc enc functionsJames Zhu2018-02-213-0/+383
| | | | | | | Implement UVD hevc encode functions Signed-off-by: James Zhu <[email protected]> Reviewed-by: Boyuan Zhang <[email protected]>
* radeon/uvd:add uvd hevc enc hw ib implementationJames Zhu2018-02-213-0/+1134
| | | | | | | Implement required IBs for UVD HEVC encode. Signed-off-by: James Zhu <[email protected]> Reviewed-by: Boyuan Zhang <[email protected]>
* radeon/uvd:add uvd hevc enc hw interface headerJames Zhu2018-02-213-0/+471
| | | | | | | Add hevc encode hardware interface for UVD Signed-off-by: James Zhu <[email protected]> Reviewed-by: Boyuan Zhang <[email protected]>
* winsys/amdgpu:add uvd hevc enc support in amdgpu csJames Zhu2018-02-211-0/+6
| | | | | | | Support UVD HEVC encode in amdgpu cs Signed-off-by: James Zhu <[email protected]> Reviewed-by: Boyuan Zhang <[email protected]>
* amd/common:add uvd hevc enc support check in hw queryJames Zhu2018-02-212-1/+12
| | | | | | | Based on amdgpu hardware query information to check if UVD hevc enc support Signed-off-by: James Zhu <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* nvir/nvc0: fix legalizing of ld unlock c0[0x10000]Karol Herbst2018-02-211-1/+1
| | | | | | | | | We have to increase the file index also for 0x10000 not just for values greater than 0x10000. Fixes: 37b67db6ae34fb6586d640a7a1b6232f091dd812 Signed-off-by: Karol Herbst <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* ac/nir: add glsl_is_array_image() helperSamuel Pitoiset2018-02-211-23/+18
| | | | | | | For consistency. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/nir: set the DA field when performing atomics on 3D imagesSamuel Pitoiset2018-02-211-1/+2
| | | | | | | This doesn't fix anything known but it should definitely be set. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* i965: Fix compiler warning about write being undefined.Eric Anholt2018-02-201-1/+1
| | | | | | | This looks like it should be protected by the assume() about nr_color_regions, but my compiler warns anyway. Reviewed-by: Matt Turner <[email protected]>
* glsl/tests: Fix a compiler warning about signed/unsigned loop comparison.Eric Anholt2018-02-201-1/+1
| | | | | Fixes: d32956935edf ("glsl: Walk a list of ir_dereference_array to mark array elements as accessed") Reviewed-by: Ian Romanick <[email protected]>
* loader: Fix compiler warnings about truncating the PCI ID path.Eric Anholt2018-02-201-8/+7
| | | | | | | | | | | | | My build was producing: ../src/loader/loader.c:121:67: warning: ‘%1u’ directive output may be truncated writing between 1 and 3 bytes into a region of size 2 [-Wformat-truncation=] and we can avoid this careful calculation by just using asprintf (as we do elsewhere in the file). Reviewed-by: Eric Engestrom <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* glsl: Silence warnings in the uniform initializer test about 16-bit typesEric Anholt2018-02-201-0/+9
| | | | | | | | | They should probably get unit tests implemented, but this cleans up a bunch of warnings in my build for now. Fixes: 59f458cd8703 ("glsl: Add 16-bit types") Cc: Eduardo Lima Mitev <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Enable disk shader cache by defaultJordan Justen2018-02-202-3/+1
| | | | | | | Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Timothy Arceri <[email protected]> Reviewed-by: Tapani Pälli <[email protected]> Acked-by: Kenneth Graunke <[email protected]>
* radv: don't send num_tcs_input_cp to sgprs.Dave Airlie2018-02-211-4/+1
| | | | | | | We never use it in the shaders. Reviewed-by: Samuel Pitoiset <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv/tess: don't need to look in constant for vertices_per_patchDave Airlie2018-02-212-2/+5
| | | | | | | This just avoids passing this value via user sgprs. Reviewed-by: Samuel Pitoiset <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* ac/radv: cleanup some tcs output values accessDave Airlie2018-02-211-2/+8
| | | | | | | Just consolidates some code to make it easier to change. Reviewed-by: Samuel Pitoiset <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* ac/radv: remove total_vertices variableDave Airlie2018-02-211-4/+3
| | | | | | | This just removes an unneeded variable. Reviewed-by: Samuel Pitoiset <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* ac/radv: don't mark tess inner as used if we don't use it.Dave Airlie2018-02-211-8/+11
| | | | | | | | This just avoids marking it as a used output if we don't actually use it. Reviewed-by: Samuel Pitoiset <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* ac/nir: to integer the args to bcsel.Dave Airlie2018-02-201-1/+2
| | | | | | | | | | | | | dEQP-VK.tessellation.invariance.outer_edge_symmetry.triangles_equal_spacing_ccw was hitting an llvm assert due to one value being an int and the other a float. This just casts both values to integer and fixes the test. Fixes: dEQP-VK.tessellation.invariance.outer_edge_symmetry.triangles_equal_spacing_ccw Cc: [email protected] Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* anv/blorp: Use layout_to_aux_usage when a layout is providedJason Ekstrand2018-02-201-25/+46
| | | | | | | | | | Instead of having aux usage and ANV_AUX_USAGE_DEFAULT to mean "give me something reasonable" we now use anv_layout_to_aux_usage whenever a layout is available. If a layout is available, we ignore the aux_usage parameter. For the cases where we have an explicit aux usage such as clears and aux ops, we have a new ANV_IMAGE_LAYOUT_EXPLICIT_AUX layout. Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]>
* anv/cmd_buffer: Delete some assert-only variablesJason Ekstrand2018-02-201-4/+1
| | | | | | Checking the sample count is almost as good as aux usage in this case. Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]>
* anv/cmd_buffer: Use layout_to_* helpers in compute_aux_usageJason Ekstrand2018-02-201-18/+35
| | | | Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]>
* anv/cmd_buffer: Simplify transition_depth_bufferJason Ekstrand2018-02-201-12/+0
| | | | | | | | | If we don't have HiZ, then anv_layout_to_aux_usage will return NONE for both layouts. If the two layouts are the same, they will get the aux usage. In either case, the code below will give us ISL_AUX_OP_NONE and we'll return without doing anything. Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]>
* anv/cmd_buffer: Do subpass image transitions in begin/end_subpassJason Ekstrand2018-02-201-132/+88
| | | | Reviewed-by: Nanley Chery <[email protected]>
* anv/cmd_buffer: Mark depth/stencil surfaces written in begin_subpassJason Ekstrand2018-02-201-21/+29
| | | | Reviewed-by: Nanley Chery <[email protected]>
* anv/cmd_buffer: Sync clear values in begin_subpassJason Ekstrand2018-02-201-100/+48
| | | | | | | | | This is quite a bit cleaner because we now sync the clear values at the same time as we do the fast clear. For loading the clear values into the surface state, we now do it once when we handle the LOAD_OP_LOAD instead of every subpass. Reviewed-by: Nanley Chery <[email protected]>
* anv/pass: Store usage in each subpass attachmentJason Ekstrand2018-02-203-14/+39
| | | | | | | | | This requires us to ditch the VkAttachmentReference struct in favor of an anv-specific struct. However, we can now easily identify from just the subpass attachment what kind of an attachment it is. This will make iteration over anv_subpass::attachments a little easier in some case. Reviewed-by: Nanley Chery <[email protected]>
* anv/cmd_buffer: Add a concept of pending load aspectsJason Ekstrand2018-02-202-6/+17
| | | | | | | These are the same as pending clear aspects only for the "load" operation. Reviewed-by: Nanley Chery <[email protected]>
* anv/cmd_buffer: Iterate all subpass attachments when clearingJason Ekstrand2018-02-201-45/+33
| | | | | | | This unifies things a bit because we now handle depth and stencil at the same time. Reviewed-by: Nanley Chery <[email protected]>
* anv/cmd_buffer: Decide whether or not to HiZ clear up-frontJason Ekstrand2018-02-201-35/+72
| | | | | | | | | | | | | This moves the decision out of begin_subpass and into BeginRenderPass like the decision for color clears. We use a similar name for the function for depth/stencil as for color even though no aux usage is really getting computed. v2 (Jason Ekstrand): - Don't always disable HiZ clears by accident - Use the initial layout to decide whether to do fast clears Reviewed-by: Nanley Chery <[email protected]>
* anv/cmd_buffer: Move the rest of clear_subpass into begin_subpassJason Ekstrand2018-02-203-140/+185
| | | | Reviewed-by: Nanley Chery <[email protected]>
* intel/blorp: Add a blorp_hiz_clear_depth_stencil helperJason Ekstrand2018-02-202-0/+64
| | | | | | | This is similar to blorp_gen8_hiz_clear_attachments except that it takes actual images instead of trusting in the already set depth state. Reviewed-by: Nanley Chery <[email protected]>
* anv/cmd_buffer: Move the color portion of clear_subpass into begin_subpassJason Ekstrand2018-02-203-92/+94
| | | | | | | | | | This doesn't really change much now but it will give us more/better control over clears in the future. The one interesting functional change here is that we are now re-emitting 3DSTATE_DEPTH_BUFFERS and friends for each clear. However, this only happens at begin_subpass time so it shouldn't be substantially more expensive. Reviewed-by: Nanley Chery <[email protected]>
* anv/cmd_buffer: Pass a subpass id into begin_subpassJason Ekstrand2018-02-201-7/+5
| | | | | | | This is a bit less awkward than passing in the subpass because it means we don't have to extract the subpass id from the subpass. Reviewed-by: Nanley Chery <[email protected]>
* anv/cmd_buffer: Add begin/end_subpass helpersJason Ekstrand2018-02-201-24/+31
| | | | | | | Having begin/end_subpass is a bit nicer than the begin/next/end hooks that Vulkan gives us. Reviewed-by: Nanley Chery <[email protected]>
* anv/cmd_buffer: Apply subpass flushes before set_subpassJason Ekstrand2018-02-201-4/+4
| | | | | | | This seems slightly more correct because it means that the flushes happen before any clears or resolves implied by the subpass transition. Reviewed-by: Nanley Chery <[email protected]>
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