Commit message (Collapse) | Author | Age | Files | Lines | |
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* | intel: android: remove libdrm_intel requirement | Emil Velikov | 2017-03-30 | 3 | -12/+6 |
| | | | | | | | | The only part which requires libdrm_intel tools/aubinator is not built on Android. Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> | ||||
* | Partially revert "amd/addrlib: silence warnings" to fix builds with DEBUG | Marek Olšák | 2017-03-30 | 3 | -6/+6 |
| | | | | This partially reverts commit 8a74140a21fe6b0d2e8a60b065b890f797f2db51. | ||||
* | ddebug: implement clear_texture | Marek Olšák | 2017-03-30 | 2 | -0/+34 |
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi: fix an unused-variable warning in a release build | Marek Olšák | 2017-03-30 | 1 | -3/+1 |
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* | vdpau: fix a maybe-uninitialized warning | Marek Olšák | 2017-03-30 | 1 | -1/+1 |
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* | softpipe: fix a maybe-uninitialized warning | Marek Olšák | 2017-03-30 | 1 | -1/+1 |
| | | | | | | /home/marek/dev/mesa-main/src/gallium/drivers/softpipe/sp_compute.c:178: warning: 'grid_size' may be used uninitialized in this function [-Wmaybe-uninitialized] | ||||
* | gallivm: fix a maybe-uninitialized warning | Marek Olšák | 2017-03-30 | 1 | -1/+1 |
| | | | | | | | /home/marek/dev/mesa-main/src/gallium/auxiliary/gallivm/lp_bld_sample_soa.c:3598: warning: 'level' may be used uninitialized in this function [-Wmaybe-uninitialized] out1 = lp_build_cmp(&leveli_bld, PIPE_FUNC_GREATER, level, last_level); ^ | ||||
* | gallium/radeon: s/dcc_disable/disable_dcc/ | Marek Olšák | 2017-03-30 | 4 | -9/+9 |
| | | | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Tested-by: Edmondo Tommasina <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> | ||||
* | radeonsi: handle incompatible DCC formats in resource_copy_region | Marek Olšák | 2017-03-30 | 1 | -0/+5 |
| | | | | | | | Required because of later commits. Reviewed-by: Nicolai Hähnle <[email protected]> Tested-by: Edmondo Tommasina <[email protected]> | ||||
* | radeonsi: remove a workaround for inexact *8_SNORM blits | Marek Olšák | 2017-03-30 | 1 | -3/+1 |
| | | | | | | | | All tests pass on Fiji now. This prevents DCC disablement due to incompatible DCC formats due to the fallback. Reviewed-by: Nicolai Hähnle <[email protected]> Tested-by: Edmondo Tommasina <[email protected]> | ||||
* | gallium/radeon: add and use a new helper vi_dcc_enabled | Marek Olšák | 2017-03-30 | 5 | -14/+16 |
| | | | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Tested-by: Edmondo Tommasina <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> | ||||
* | gallium/radeon: formalize that r600_query_hw_add_result doesn't need a context | Marek Olšák | 2017-03-30 | 3 | -8/+9 |
| | | | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Tested-by: Edmondo Tommasina <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> | ||||
* | radeonsi: don't make a copy of pipe_index_buffer in draw_vbo | Marek Olšák | 2017-03-30 | 1 | -32/+27 |
| | | | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Tested-by: Edmondo Tommasina <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> | ||||
* | gallium/util: use const in u_index_modify helpers | Marek Olšák | 2017-03-30 | 2 | -6/+6 |
| | | | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Tested-by: Edmondo Tommasina <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> | ||||
* | winsys/amdgpu: remove AMDGPU_INFO_NUM_EVICTIONS | Samuel Pitoiset | 2017-03-30 | 1 | -4/+0 |
| | | | | | | | | This is now exposed with libdrm_amdgpu 2.4.76. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi: add Vega10 PCI IDs | Marek Olšák | 2017-03-30 | 1 | -0/+8 |
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | radeon/uvd: set correct vega10 db pitch alignment | Boyuan Zhang | 2017-03-30 | 1 | -4/+12 |
| | | | | | | | | Create new function to get correct alignment based on Asics, and change the corresponding decode message buffer and dpb buffer size calculations Signed-off-by: Boyuan Zhang <[email protected]> Reviewed-by: Christian König <[email protected]> | ||||
* | radeon/vce: add vce support for firmware 53.19.4 | Leo Liu | 2017-03-30 | 1 | -0/+6 |
| | | | | | | | v2: squashed with other similar commits Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]> | ||||
* | radeon/vce: adapt gfx9 surface to vce | Leo Liu | 2017-03-30 | 2 | -15/+51 |
| | | | | | | Signed-off-by: Leo Liu <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]> | ||||
* | winsys/surface: add height pitch for gfx9 | Leo Liu | 2017-03-30 | 2 | -0/+2 |
| | | | | | Signed-off-by: Leo Liu <[email protected]> Acked-by: Alex Deucher <[email protected]> | ||||
* | radeon/uvd: clear message buffer when reuse | Leo Liu | 2017-03-30 | 1 | -1/+2 |
| | | | | | | | | As required by firmware Signed-off-by: Leo Liu <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]> | ||||
* | radeon/uvd: adapt gfx9 surface to uvd | Leo Liu | 2017-03-30 | 6 | -56/+106 |
| | | | | | | Signed-off-by: Leo Liu <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]> | ||||
* | radeon/uvd: add uvd soc15 register | Leo Liu | 2017-03-30 | 2 | -4/+27 |
| | | | | | | Signed-off-by: Leo Liu <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]> | ||||
* | radeonsi/gfx9: disable features that don't work | Marek Olšák | 2017-03-30 | 4 | -5/+15 |
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi/gfx9: only allow GL 3.1 | Marek Olšák | 2017-03-30 | 1 | -0/+5 |
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi/gfx9: add linear address computations for texture transfers | Marek Olšák | 2017-03-30 | 1 | -20/+53 |
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi/gfx9: don't generate LS and ES states | Marek Olšák | 2017-03-30 | 1 | -24/+46 |
| | | | | | | these shaders don't exist on GFX9 Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi/gfx9: SPI_SHADER_USER_DATA changes | Marek Olšák | 2017-03-30 | 1 | -11/+34 |
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | winsys/amdgpu: set/get BO tiling flags for GFX9 | Marek Olšák | 2017-03-30 | 1 | -2/+4 |
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi/gfx9: handle pitch and offset overrides for texture_from_handle | Marek Olšák | 2017-03-30 | 1 | -11/+18 |
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi/gfx9: set/validate GFX9 BO metadata | Marek Olšák | 2017-03-30 | 2 | -1/+24 |
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi/gfx9: add radeon_surf.gfx9.surf_offset | Marek Olšák | 2017-03-30 | 5 | -1/+7 |
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi/gfx9: don't write mipmap level offsets to BO metadata | Marek Olšák | 2017-03-30 | 1 | -3/+6 |
| | | | | | | GFX9 doesn't have (usable) mipmap offsets. Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi/gfx9: flush CB & DB caches with an EOP TS event | Marek Olšák | 2017-03-30 | 1 | -23/+84 |
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi/gfx9: use ACQUIRE_MEM | Marek Olšák | 2017-03-30 | 1 | -6/+17 |
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi/gfx9: only use CE RAM for most-used descriptors | Marek Olšák | 2017-03-30 | 2 | -5/+23 |
| | | | | | | because the CE RAM size decreased to 4 KB. Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi/gfx9: emit FLUSH_DFSM where required | Marek Olšák | 2017-03-30 | 2 | -0/+18 |
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi/gfx9: emit BREAK_BATCH in emit_framebuffer_state | Marek Olšák | 2017-03-30 | 1 | -0/+5 |
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi/gfx9: fix MIP0_WIDTH & MIP0_HEIGHT for compressed texture blits | Marek Olšák | 2017-03-30 | 6 | -10/+26 |
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi/gfx9: fix textureSize/imageSize for 1D textures | Marek Olšák | 2017-03-30 | 1 | -25/+32 |
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi/gfx9: add a workaround for 1D depth textures | Marek Olšák | 2017-03-30 | 4 | -30/+86 |
| | | | | | | The same workaround is used by Vulkan. Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi/gfx9: enable clamping for Z UNORM formats promoted to Z32F | Marek Olšák | 2017-03-30 | 1 | -1/+11 |
| | | | | | | so that shaders don't have to do it. Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi/gfx9: image descriptor changes in mutable fields | Marek Olšák | 2017-03-30 | 3 | -23/+73 |
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi/gfx9: FMASK image descriptor changes | Marek Olšák | 2017-03-30 | 1 | -21/+48 |
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi/gfx9: image descriptor changes in immutable fields | Marek Olšák | 2017-03-30 | 3 | -5/+60 |
| | | | | | | | The border color swizzle logic was copied from Vulkan. It doesn't make any sense to me, but it passes all piglits except the stencil ones. Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi/gfx9: DB changes | Marek Olšák | 2017-03-30 | 2 | -94/+176 |
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi/gfx9: CB changes | Marek Olšák | 2017-03-30 | 2 | -52/+125 |
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi/gfx9: do DCC clears on non-mipmapped textures only | Marek Olšák | 2017-03-30 | 2 | -4/+17 |
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi/gfx9: update can_sample_z/s flags | Marek Olšák | 2017-03-30 | 1 | -2/+7 |
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> | ||||
* | radeonsi/gfx9: pass correct parameters to buffer_get_handle | Marek Olšák | 2017-03-30 | 1 | -6/+14 |
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> |