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* freedreno/a3xx/compiler: 1D texturesRob Clark2014-05-181-4/+25
* freedreno: fix capsRob Clark2014-05-181-2/+2
* freedreno: fix index buffer offsetRob Clark2014-05-181-1/+1
* freedreno/a3xx: add sRBG texture supportRob Clark2014-05-162-0/+15
* freedreno: update generated headersRob Clark2014-05-164-20/+21
* gallivm: (trivial) fix compilation with llvm 3.1, 3.2Roland Scheidegger2014-05-171-0/+4
* gallivm: print out how long it takes to optimize shader IR.Roland Scheidegger2014-05-163-1/+31
* gallivm: give more verbose names to modulesRoland Scheidegger2014-05-1610-26/+38
* mesa: fix double-freeing of dispatch tables inside glBegin/End.Brian Paul2014-05-161-2/+2
* i965: Use binary literals counter select.Matt Turner2014-05-151-2/+2
* glsl_to_tgsi: Make sure the 'shader' member is always initializedMichel Dänzer2014-05-161-0/+3
* gallivm: remove optimization workaround when not having sse 4.1Roland Scheidegger2014-05-161-8/+1
* gallivm: remove workaround for reversing optimization pass order.Roland Scheidegger2014-05-161-13/+2
* i965/gen8: Make disassembly function match brw's signature.Matt Turner2014-05-154-9/+12
* i965: Pass brw_context and assembly separately to brw_dump_compile.Matt Turner2014-05-156-14/+12
* i965: Pull brw_compact_instructions() out of brw_get_program().Matt Turner2014-05-157-9/+10
* i965/disasm: Align send instruction meta-information with dst.Matt Turner2014-05-151-0/+1
* i965/disasm: Disassemble the compaction control bit.Matt Turner2014-05-159-10/+18
* i965/cfg: Embed exec_node in bblock_link.Matt Turner2014-05-155-23/+25
* i965/cfg: Make brw_cfg.h closer to C-includable.Matt Turner2014-05-151-13/+23
* i965/cfg: Protect brw_cfg.h from multiple inclusion.Matt Turner2014-05-151-0/+6
* glsl: Add C-callable fprint_ir function.Matt Turner2014-05-152-0/+10
* i965/fb: Use meta path for stencil up/downsamplingTopi Pohjolainen2014-05-151-1/+8
* i965/meta: Stencil blit for miptree updownsamplingTopi Pohjolainen2014-05-152-0/+38
* i965/fb: Use meta path for stencil blitsTopi Pohjolainen2014-05-151-0/+9
* i965/meta: Stencil blitsTopi Pohjolainen2014-05-153-0/+497
* i965: Extend brw_get_rb_for_first_slice() for specified level/layerTopi Pohjolainen2014-05-152-7/+29
* i965/gen8: Surface state overriding for stencilTopi Pohjolainen2014-05-151-13/+21
* i965/wm: Surface state overrides for configuring w-tiled as y-tiledTopi Pohjolainen2014-05-152-0/+30
* i965 meta up/downsample: Fix renderbuffer _BaseFormatJordan Justen2014-05-151-1/+2
* i965: Delete current_insn() function.Matt Turner2014-05-152-7/+2
* i965: Remove blorp unit tests.Matt Turner2014-05-153-1099/+1
* egl-static: include libradeonwinsys.la only onceEmil Velikov2014-05-151-8/+5
* gallium/radeon: link in libradeon.la at target levelEmil Velikov2014-05-1513-20/+24
* gallium/radeon: build only a single common library libradeonEmil Velikov2014-05-153-12/+5
* freedreno/a3xx: fix write to bogus registerRob Clark2014-05-141-2/+2
* freedreno/a3xx: account for special inputs/outputsRob Clark2014-05-141-2/+2
* freedreno/a3xx: fix MAX_INPUTS shader capRob Clark2014-05-143-1/+9
* freedreno/a3xx: add debug flag to expose glsl130Rob Clark2014-05-142-3/+8
* freedreno/a3xx/compiler: add KILL_IFRyan Houdek2014-05-141-1/+35
* freedreno/a3xx/compiler: start adding integer supportRyan Houdek2014-05-141-0/+169
* draw: better llvm names for shaders for debugging.Roland Scheidegger2014-05-151-6/+12
* llvmpipe: improve setup shader names (for debugging)Roland Scheidegger2014-05-151-38/+40
* llvmpipe: kill off llvmpipe_variant_countRoland Scheidegger2014-05-154-20/+4
* mesa/st: fix number of ubos being declared in a shaderRoland Scheidegger2014-05-151-3/+5
* nvc0: enable support for maxwell boardsBen Skeggs2014-05-156-19/+49
* nvc0: add maxwell (sm50) compiler backendBen Skeggs2014-05-1516-5/+3588
* nvc0: maxwell isa has no per-instruction join modifierBen Skeggs2014-05-154-19/+23
* nvc0: replace immd 0 with $rLASTGPR for emit/restart opcodesBen Skeggs2014-05-151-0/+1
* nvc0: move nvc0 lowering pass class definitions into headerBen Skeggs2014-05-153-106/+136
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