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* i965/copy_image: Use the correct block dimensionJason Ekstrand2014-09-031-6/+6
| | | | | | | | Signed-off-by: Jason Ekstrand <[email protected]> Cc: "10.3" <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82804 Tested-by: Tapani Pälli <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* meta/copy_image: Use the correct texture level when creating viewsJason Ekstrand2014-09-031-1/+1
| | | | | | | | | | | | | | Previously, we were accidentally assuming that the level of both textures was 0. Now we actually use the correct level in our hacked texture view. This doesn't 100% fix the meta path because the texture type is getting lost somewhere in the pipeline. However, it actually copies to/from the correct layer now. Signed-off-by: Jason Ekstrand <[email protected]> Cc: "10.3" <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82804 Tested-by: Tapani Pälli <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965/copy_image: Use the correct texture levelJason Ekstrand2014-09-031-4/+6
| | | | | | | | | | | | Previously, we were using the source images level for both source and destination. Also, we weren't taking the MinLevel from a potential texture view into account. This commit fixes both problems. Signed-off-by: Jason Ekstrand <[email protected]> Cc: "10.3" <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82804 Tested-by: Tapani Pälli <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* gallivm: Fix build against LLVM SVN >= r216982Michel Dänzer2014-09-032-0/+11
| | | | | | | Only MCJIT is available anymore. Reviewed-by: Roland Scheidegger <[email protected]> Signed-off-by: Michel Dänzer <[email protected]>
* r600g: fix alpha-test with HyperZ enabled, fixing L4D2 tree corruptionMarek Olšák2014-09-031-6/+6
| | | | | | | | | | | *_update_db_shader_control depends on the alpha test state. The problem was it was in a block which is only entered if the pixel shader is changed. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74863 Cc: [email protected] Tested-by: Benjamin Bellec <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* r600g,radeonsi: Preserve existing buffer flagsMichel Dänzer2014-09-031-3/+3
| | | | | | | | The default case was accidentally clearing RADEON_FLAG_CPU_ACCESS from the previous fall-through cases. Reported-by: Mathias Fröhlich <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* main: Don't leak temporary texture rowsJason Ekstrand2014-09-021-0/+4
| | | | | Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* r300g: pointless assignment of info.indexedDave Airlie2014-09-031-2/+0
| | | | | | | Did this code mean to do something else, you tell me! Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* omx/h264: remove stray semicolon after ifDave Airlie2014-09-031-1/+1
| | | | | | | Coverity reported this, looks wrong to me. Reviewed-by: Christian König <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* vdpau: unlock the mutex on error paths in attribute setting.Dave Airlie2014-09-031-12/+26
| | | | | | | | Coverity pointed out we never dropped the lock here, so fix it by using a common exit path. Reviewed-by: Christian König <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* u_primconvert: Use u_upload_mgr for our little IB allocations.Eric Anholt2014-09-021-11/+9
| | | | | | | | tex-miplevel-selection was hammering my memory manager with primconverts on individual quads. This gets all those converted IBs packed into larger IBs. Reviewed-by: Rob Clark <[email protected]>
* u_primconvert: Shut up compiler warning.Eric Anholt2014-09-021-1/+1
| | | | | | | gcc isn't detecting that src is set before used, since both are under if (info->indexed). Reviewed-by: Rob Clark <[email protected]>
* gbm: Fix gallium build when X11 is in a non-system directoryEric Anholt2014-09-021-0/+1
| | | | | | | pipe-loader.h will include Xlib.h when HAVE_PIPE_LOADER_XLIB is set in the build. Reviewed-by: Emil Velikov <[email protected]>
* vc4: Handle a couple of the transfer map flags.Eric Anholt2014-09-022-4/+12
| | | | | | This is part of fixing extremely long runtimes on some piglit tests that involve streaming vertex reuploads due to format conversions, and will similarly be important for X performance, which relies on these flags.
* meta: Make MESA_META_DRAW_BUFFERS restore properlyKristian Høgsberg2014-09-021-34/+4
| | | | | | | | | | | | | | | | | | | | A meta begin/end pair with MESA_META_DRAW_BUFFERS will change visible GL state. We recreate the draw buffer enums from the buffer bitfield, which changes GL_BACK to GL_BACK_LEFT (and GL_FRONT to GL_FRONT_LEFT). This commit modifes the save/restore logic to instead copy the buffer enums from the gl_framebuffer and then set them on restore using _mesa_drawbuffers(). It's not clear how this breaks the benchmark in 82796, but fixing meta to not leak the state change fixes the regression. No piglit regressions. Reviewed-by: Kenneth Graunke <[email protected]> Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=82796 Signed-off-by: Kristian Høgsberg <[email protected]> Cc: [email protected]
* Revert "mesa: fix make tarballs"Emil Velikov2014-09-022-3/+1
| | | | | | | | | | | | | | | | This reverts commit 0fbb9a599df898d4e1166d6d6f00cb34a0524bea. Rather than adding hacks around the issue drop the sources from the final tarball, and re-add them back with 'make dist'. This fixes a problem when running parallel 'make install' fails as it recreates sources and triggers partial recompilation. Cc: "10.2 10.3" <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83355 Reported-by: Maarten Lankhorst <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Tested-by: Maarten Lankhorst <[email protected]> Tested-by: Kai Wasserbäch <[email protected]>
* mesa/program_cache: calloc the correct size for the cache.Dave Airlie2014-09-021-1/+1
| | | | | | | | | Coverity reported this, and I think this is the right solution, since cache->items is struct cache_item ** not struct cache_item *, we also realloc it using struct cache_item * at some point. Reviewed-by: Tapani Pälli <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radeonsi: Compile dummy pixel shader on demandMichel Dänzer2014-09-022-8/+10
| | | | | | It's never used under normal circumstances. Reviewed-by: Marek Olšák <[email protected]>
* u_blitter: Create all shaders on demandMichel Dänzer2014-09-021-43/+104
| | | | | | | Not all of these are used in every context, so this can make a significant difference for short-lived contexts such as in piglit tests. Reviewed-by: Marek Olšák <[email protected]>
* r600g,radeonsi: Inform the kernel if a BO will likely be accessed by the CPUMichel Dänzer2014-09-023-11/+23
| | | | | | | This allows the kernel to prevent such BOs from ever being stored in the CPU inaccessible part of VRAM. Reviewed-by: Marek Olšák <[email protected]>
* glsl: free uniform_map on failure path.Dave Airlie2014-09-021-1/+3
| | | | | | | | | If we fails in reserve_explicit_locations, we leak uniform_map. Reported-by: coverity scanner. Reviewed-by: Tapani Pälli <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* main/cs: Add gl_context::ComputeProgramPaul Berry2014-09-011-0/+15
| | | | Reviewed-by: Jordan Justen <[email protected]>
* mesa: Convert NewDriverState to 64-bitsJordan Justen2014-09-016-13/+25
| | | | | | | i965 will have more than 32 bits when BRW_STATE_COMPUTE_PROGRAM is added. Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* i965: Modify state upload to allow 2 different sets of state atoms.Paul Berry2014-09-012-25/+32
| | | | | | | The set of state atoms for compute shaders is currently empty; it will be filled in by future patches. Reviewed-by: Jordan Justen <[email protected]>
* i965: Modify dirty bit handling to support 2 pipelines.Paul Berry2014-09-014-16/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The hardware state for compute shaders is almost entirely orthogonal to the hardware state for 3D rendering. To avoid sending unnecessary state to the hardware, we'll need to have a separate set of state atoms for the compute pipeline and the 3D pipeline. That means we need to maintain two separate sets of dirty bits to determine which state atoms need to be run. But the dirty bits are not completely independent; for example, if BRW_NEW_SURFACES is flagged while doing 3D rendering, then not only do we need to re-run 3D state atoms that depend on BRW_NEW_SURFACES, but we also need to re-run compute state atoms that depend on BRW_NEW_SURFACES. But we'll also need to re-run those state atoms the next time the compute pipeline is run. To accomplish this, we record two sets of dirty bits, one for each pipeline. When bits are dirtied (via SET_DIRTY_BIT() or SET_DIRTY_ALL()) we set them to the dirty state in both pipelines. When brw_state_upload() is run, we clear the dirty bits just for the pipeline that was run. Note that since the number of pipelines is known at compile time to be 2, the compiler should unroll the loops in SET_DIRTY_BIT() and SET_DIRTY_ALL(). Reviewed-by: Jordan Justen <[email protected]>
* i965: Create a macro for checking a dirty bit.Paul Berry2014-09-012-1/+7
| | | | | | | This will make it easier to extend dirty bit handling to support compute shaders. Reviewed-by: Jordan Justen <[email protected]>
* i965: Create a macro for setting all dirty bits.Paul Berry2014-09-014-7/+18
| | | | | | | This will make it easier to extend dirty bit handling to support compute shaders. Reviewed-by: Jordan Justen <[email protected]>
* i965: Create a macro for setting a dirty bit.Paul Berry2014-09-0132-67/+74
| | | | | | | This will make it easier to extend dirty bit handling to support compute shaders. Reviewed-by: Jordan Justen <[email protected]>
* i965: add missing parens in vec4 visitorDave Airlie2014-09-021-1/+2
| | | | | | | | | coverity reported this, Matt said it look like missing parens, not bad identing, so lets try that. Cc: "10.2 10.3" <[email protected]> Reviewed-by: Chris Forbes <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* nouveau: don't leak dec struct on errorDave Airlie2014-09-021-1/+1
| | | | | | | This one path doesn't goto fail, so it seems to leak dec. Reviewed-by: Ilia Mirkin <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* xvmc/tests: %C isn't a valid printf specifier.Dave Airlie2014-09-021-2/+2
| | | | | | Reported-by: Coverity scanner. Signed-off-by: Dave Airlie <[email protected]>
* nouveau/nv40: quiten coverity warning in unused vertex texture code.Dave Airlie2014-09-021-0/+1
| | | | | | This fixes the code, but we never run it anyways, so silence coverity. Signed-off-by: Dave Airlie <[email protected]>
* nv50: remove unused variablesIlia Mirkin2014-09-012-2/+0
| | | | | | Recent code changes have caused these to no longer be used. Remove them. Signed-off-by: Ilia Mirkin <[email protected]>
* mesa: force height of 1D textures to be 1 in texture viewsIlia Mirkin2014-09-011-0/+3
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
* nv50: attach the buffer bo to the miptree structuresIlia Mirkin2014-09-011-8/+5
| | | | | | | | | The current code... makes no sense. Use nouveau_bo_ref to attach the bo to the exposed resource so as to have the proper lifetime guarantees. Tested-by: Emil Velikov <[email protected]> Signed-off-by: Ilia Mirkin <[email protected]> Cc: "10.2 10.3" <[email protected]>
* nv50: mt address may not be the underlying bo's start addressIlia Mirkin2014-09-013-12/+14
| | | | | | | | | | | | | | With VP2, nv50_miptree is faked because the underlying bo's have to be laid out in a certain way. This is done by adjusting the address. Make sure that blits (and everything else for consistency) use the mt address rather than the bo address as a base. This fixes retrieving chroma plane with VDPAU. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82255 Tested-by: Emil Velikov <[email protected]> Signed-off-by: Ilia Mirkin <[email protected]> Cc: "10.2 10.3" <[email protected]>
* nv50: set the miptree address when clearing bo's in vp2 initIlia Mirkin2014-09-011-0/+2
| | | | | | | | | | The mt address is about to be used more, make sure it's set appropriately. Reported-by: Emil Velikov <[email protected]> Tested-by: Emil Velikov <[email protected]> Signed-off-by: Ilia Mirkin <[email protected]> Cc: "10.2 10.3" <[email protected]>
* nv50/ir: avoid creating instructions that can't be emittedIlia Mirkin2014-09-011-0/+4
| | | | | | | | | | | When constant folding a MAD operation, we first fold the multiply and generate an ADD. However we do so without making sure that the immediate can be handled in the saturate case. If it can't, load the immediate in a separate instruction. Reported-by: Tiziano Bacocco <[email protected]> Signed-off-by: Ilia Mirkin <[email protected]> Cc: "10.2 10.3" <[email protected]>
* nvc0: don't make 1d staging textures linearIlia Mirkin2014-09-011-1/+0
| | | | | | | | | | | Experimentally, the sampler doesn't appear to like these, neither as buffer nor as rect textures. So remove 1D from the list of texture types to make linear when used for staging. This fixes the OSD in mplayer for VDPAU. Signed-off-by: Ilia Mirkin <[email protected]> Cc: "10.2 10.3" <[email protected]>
* nv50: zero out unbound samplersIlia Mirkin2014-09-011-2/+5
| | | | | | | | | Samplers are only defined up to num_samplers, so set all samplers above nr to NULL so that we don't try to read them again later. Tested-by: Christian Ruppert <[email protected]> Signed-off-by: Ilia Mirkin <[email protected]> Cc: "10.2 10.3" <[email protected]>
* nvc0/ir: avoid infinite recursion when finding first uses of texIlia Mirkin2014-09-012-8/+29
| | | | | | | | | | | In certain circumstances, findFirstUses could end up doubling back on instructions it had already processed, resulting in an infinite recursion. Avoid this by keeping track of already-visited instructions. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83079 Tested-by: Tobias Klausmann <[email protected]> Signed-off-by: Ilia Mirkin <[email protected]> Cc: "10.2 10.3" <[email protected]>
* freedreno/ir3: add DDX/DDYRob Clark2014-09-011-4/+53
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: don't keep IR aroundRob Clark2014-09-011-1/+6
| | | | | | | Once we've assembled the shader, no need to keep the intermediate around. Signed-off-by: Rob Clark <[email protected]>
* i965/fs: Don't segfault when debug-logging a null programJason Ekstrand2014-09-011-2/+2
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/vec4: Don't segfault when debug-logging a null programJason Ekstrand2014-09-011-2/+2
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* radeonsi: implement EXPCLEAR optimization for depthMarek Olšák2014-09-015-2/+23
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* r600g,radeonsi: initialize HTILE to fully-expanded stateMarek Olšák2014-09-011-1/+3
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: implement fast depth clearMarek Olšák2014-09-014-2/+21
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: move DB_RENDER_CONTROL into draw_vboMarek Olšák2014-09-015-58/+46
| | | | | | So that I can add fast depth clear. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: disable occlusion queries if they are not neededMarek Olšák2014-09-011-0/+8
| | | | | | | We always left them enabled, which turned off HiZ in some cases. This should improve performace with Hyper-Z. Reviewed-by: Michel Dänzer <[email protected]>
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