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* i965: Trim the interleaved upload to the minimum number of verticesChris Wilson2011-02-221-1/+5
| | | | | | ... should have no impact on a properly formatted draw operation. Signed-off-by: Chris Wilson <[email protected]>
* i965: Reinstate max-index paranoiaChris Wilson2011-02-221-1/+1
| | | | | | | Don't trust the applications not to reference beyond the end of the vertex buffers. Signed-off-by: Chris Wilson <[email protected]>
* i965: Zero the offset into the vbo when uploading non-interleavedChris Wilson2011-02-221-0/+1
| | | | | | Fixes regression from 559435d9152acc7162e4e60aae6591c7c6c8274b. Signed-off-by: Chris Wilson <[email protected]>
* st/dri: Track drawable context bindingsJakob Bornecrantz2011-02-204-2/+14
| | | | | | | | | | | | | | | | | | | Needs to track this ourself since because we get into a race condition with the dri_util.c code on make current when rendering to the front buffer. This is what happens: Old context is rendering to the front buffer. App calls MakeCurrent with a new context. dri_util.c sets drawable->driContextPriv to the new context and then calls the driver make current. st/dri make current flushes the old context, which calls back into st/dri via the flush frontbuffer hook. st/dri calls dri loader flush frontbuffer, which calls invalidate buffer on the drawable into st/dri. This is where things gets wrong. st/dri grabs the context from the dri drawable (which now points to the new context) and calls invalidate framebuffer to the new context which has not yet set the new drawable as its framebuffers since we have not called make current yet, it asserts.
* i965: Fix VB packet reuse when offset for the new buffer isn't stride aligned.Eric Anholt2011-02-211-1/+1
| | | | Fixes regression in scissor-stencil-clear and 5 other tests.
* Revert "mesa: convert macros to inline functions"Brian Paul2011-02-211-22/+22
| | | | | | This reverts commit e9ff76aa81d9bd973d46b7e46f1e4ece2112a5b7. Need to use macros so __FUNCTION__ reports the caller.
* st/mesa: need to translate clear color according to surface's base formatBrian Paul2011-02-214-47/+75
| | | | | | | | | | | When clearing a GL_LUMINANCE_ALPHA buffer, for example, we need to convert the clear color (R,G,B,A) to (R,R,R,A). We were doing this for texture border colors but not renderbuffers. Move the translation function to st_format.c and share it. This fixes the piglit fbo-clear-formats test. NOTE: This is a candidate for the 7.9 and 7.10 branches.
* st/mesa: fix the default case in st_format_datatype()Brian Paul2011-02-211-5/+2
| | | | | | Part of the fix for piglit fbo-clear-formats NOTE: This is a candidate for the 7.9 and 7.10 branches.
* i915g: add some throttlingDaniel Vetter2011-02-211-0/+9
| | | | | | Intel classic drivers switched to this, too, so it must be good. Signed-off-by: Daniel Vetter <[email protected]>
* i915g: s/bool/boolean/ style-fixup in winsysDaniel Vetter2011-02-213-3/+4
| | | | Signed-off-by: Daniel Vetter <[email protected]>
* i915g: Fix warningJakob Bornecrantz2011-02-211-1/+0
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* i915g: Add option to lie about capsJakob Bornecrantz2011-02-213-1/+9
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* i915g: Move debug fields to screenJakob Bornecrantz2011-02-214-4/+7
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* i915g: Use debug get once optionsJakob Bornecrantz2011-02-212-3/+9
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* i915g: Rework texture tiling a bitJakob Bornecrantz2011-02-211-14/+8
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* i915g: Anisotropic filtering worksJakob Bornecrantz2011-02-211-1/+1
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* i915g: TODO about point spritesJakob Bornecrantz2011-02-211-0/+3
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* i915g: TODO about untested code hidden behind capsJakob Bornecrantz2011-02-212-2/+9
| | | | | Should be fairly easy to test and fix since you can look at the code in the classic driver.
* i915g: Reorg capsJakob Bornecrantz2011-02-211-28/+42
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* st/mesa: fix incorrect texture size allocation in st_finalize_texture()Brian Paul2011-02-211-3/+18
| | | | | | | | If finalizing a non-POW mipmapped texture with an odd-sized base texture image we were allocating the wrong size of gallium texture (off by one). Need to be more careful about computing the base texture image size. This fixes https://bugs.freedesktop.org/show_bug.cgi?id=34463
* st/mesa: refactor guess_and_alloc_texture() codeBrian Paul2011-02-211-35/+60
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* st/mesa: fix mipmap generation for non-POW texturesBrian Paul2011-02-211-7/+7
| | | | This is part of the fix for https://bugs.freedesktop.org/show_bug.cgi?id=34463
* mesa: convert macros to inline functionsBrian Paul2011-02-211-22/+22
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* vbo: more commentsBrian Paul2011-02-211-0/+5
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* vbo: make vbo_exec_FlushVertices_internal() staticBrian Paul2011-02-212-22/+20
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* vbo: remove old debug code, add commentsBrian Paul2011-02-211-4/+8
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* vbo: rename, document function paramsBrian Paul2011-02-211-5/+5
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* vbo: commentsBrian Paul2011-02-211-0/+8
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* vbo: replace assert(0) with proper assertionsBrian Paul2011-02-211-5/+2
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* vbo: rename some vars, add new comments, fix formatting, etc.Brian Paul2011-02-212-58/+77
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* vbo: use ctx instead of exec->ctxBrian Paul2011-02-211-3/+3
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* radeon: add default switch case to silence unhandled enum warningBrian Paul2011-02-211-0/+2
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* Use C-style system headers in C++ code to avoid issues with std:: namespaceIan Romanick2011-02-2125-58/+8
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* intel: Fix insufficient integer width for upload buffer offsetChris Wilson2011-02-211-2/+2
| | | | | | | | I was being overly miserly and gave the offset of the buffer into the bo insufficient bits, distracted by the adjacency of the buffer[4096]. Ref: https://bugs.freedesktop.org/show_bug.cgi?id=34541 Signed-off-by: Chris Wilson <[email protected]>
* svga: Remove some remaining fake S3TC rendering support.José Fonseca2011-02-211-4/+0
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* i965: Remove spurious duplicate ADVANCE_BATCHChris Wilson2011-02-211-1/+0
| | | | | | ... a leftover from a bad merge. Signed-off-by: Chris Wilson <[email protected]>
* i915: Emit a single relocation per vboChris Wilson2011-02-215-17/+45
| | | | | | | | | Reducing the number of relocations has lots of nice knock-on effects, not least including reducing batch buffer size, auxilliary array sizes (vmalloced and copied into the kernel), processing of uncached relocations etc. Signed-off-by: Chris Wilson <[email protected]>
* i915: Suppress emission of redundant stencil updatesChris Wilson2011-02-211-45/+55
| | | | Signed-off-by: Chris Wilson <[email protected]>
* i915: Separate BLEND from general context state.Chris Wilson2011-02-213-22/+40
| | | | Signed-off-by: Chris Wilson <[email protected]>
* i915: Only flag context changes if the actual state is changedChris Wilson2011-02-211-49/+105
| | | | Signed-off-by: Chris Wilson <[email protected]>
* i915: suppress repeated sampler state emissionChris Wilson2011-02-212-0/+11
| | | | Signed-off-by: Chris Wilson <[email protected]>
* i915: Eliminate redundant CONSTANTS updatesChris Wilson2011-02-211-25/+26
| | | | Signed-off-by: Chris Wilson <[email protected]>
* i965: Use compiler builtins when availableChris Wilson2011-02-214-20/+25
| | | | Signed-off-by: Chris Wilson <[email protected]>
* i965: Micro-optimise check_stateChris Wilson2011-02-211-7/+5
| | | | | | | Replace the intermediate tests due to the logical or with the bitwise or. Signed-off-by: Chris Wilson <[email protected]>
* intel: use throttle ioctl for throttlingChris Wilson2011-02-213-13/+3
| | | | | | | | | | Rather than waiting on the first batch after the last swapbuffers to be retired, call into the kernel to wait upon the retirement of any request less than 20ms old. This has the twofold advantage of (a) not blocking any other clients from utilizing the device whilst we wait and (b) we attain higher throughput without overloading the system. Signed-off-by: Chris Wilson <[email protected]>
* i965: Remove unused 'next_free_page' memberChris Wilson2011-02-211-5/+0
| | | | Signed-off-by: Chris Wilson <[email protected]>
* intel: Skip the flush before read-pixels via blitChris Wilson2011-02-211-4/+7
| | | | | | | As we will flush when reading the return values of the blit, we can forgo the earlier flush. Signed-off-by: Chris Wilson <[email protected]>
* intel: extend current vertex buffersChris Wilson2011-02-215-23/+73
| | | | | | | | | If the next vertex arrays are a (discontiguous) continuation of the current arrays, such that the new vertices are simply offset from the start of the current vertex buffer definitions we can reuse those defintions and avoid the overhead of relocations and invalidations. Signed-off-by: Chris Wilson <[email protected]>
* intel: Use specified alignment for writes into the upload bufferChris Wilson2011-02-213-30/+57
| | | | Signed-off-by: Chris Wilson <[email protected]>
* i965: Clean up brw_prepare_vertices()Chris Wilson2011-02-211-21/+20
| | | | | | Use a temporary glarray variable to replace the numerous input->glarray. Signed-off-by: Chris Wilson <[email protected]>