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* radeon: update legal notes on UVDChristian König2014-02-061-0/+31
| | | | Signed-off-by: Christian König <[email protected]>
* radeon: just don't map VRAM buffers at allChristian König2014-02-061-2/+2
| | | | | Signed-off-by: Christian König <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeon/video: directly create buffers in the right domainChristian König2014-02-063-7/+12
| | | | | | Avoid moving things around on start of stream. Signed-off-by: Christian König <[email protected]>
* radeon/video: seperate common video functionsChristian König2014-02-069-315/+413
| | | | Signed-off-by: Christian König <[email protected]>
* gallium/dri2: Fix dri2_dup_imageAxel Davy2014-02-051-0/+1
| | | | | | | | | | | | dri2_dup_image was not copying the dri_format field. This was causing some bugs, for example: . we create an gbm_bo. . we get an EGLImage from the gbm_bo. . Bug: impossible to get again the gbm_bo from the EGLImage by importing. (gbm dri2 backend) Signed-off-by: Axel Davy <[email protected]>
* i965/vs: Fix typo in brw_compute_vue_mapChris Forbes2014-02-051-1/+1
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Fix register types in dump_instructions().Kenneth Graunke2014-02-054-2/+32
| | | | | | | | | | | | | | This regressed when I converted BRW_REGISTER_TYPE_* to be an abstract type that doesn't match the hardware description. dump_instruction() was using reg_encoding[] from brw_disasm.c, which no longer matches (and was incorrect for Gen8+ anyway). This patch introduces a new function to convert the abstract enum values into the letter suffix we expect. Signed-off-by: Kenneth Graunke <[email protected]> Reported-by: Matt Turner <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* egl/glx: Remove egl_glx driverChad Versace2014-02-057-1254/+0
| | | | | | | | | | | | | | | Mesa now has a real, feature-rich EGL implementation on X11 via xcb. Therefore I believe there is no longer a practical need for the egl_glx driver. Furthermore, egl_glx appears to be unmaintained. The most recent nontrivial commit to egl_glx was 6baa5f1 on 2011-11-25. Tested by running weston-smoke in windowed Weston on X with i965. Signed-off-by: Chad Versace <[email protected]> Acked-by: Kenneth Graunke <[email protected]> Acked-by: Kristian Høgsberg <[email protected]>
* docs: update 10.1 relnotes to note GL 3.3 on r600 and radeonsi.Dave Airlie2014-02-061-1/+1
| | | | Signed-off-by: Dave Airlie <[email protected]>
* tgsi/ureg: increase the number of immediatesZack Rusin2014-02-051-1/+1
| | | | | | | | | | ureg_program is allocated on the heap so we can just bump the number of immediates that it can handle. It's needed for d3d10. Signed-off-by: Zack Rusin <[email protected]> Reviewed-by: Jose Fonseca <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* gallivm: make sure analysis works with large number of immediatesZack Rusin2014-02-051-8/+9
| | | | | | | | | | | We need to handle a lot more immediates and in order to do that we also switch from allocating this structure on the stack to allocating it on the heap. Signed-off-by: Zack Rusin <[email protected]> Reviewed-by: Jose Fonseca <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* gallivm: handle huge number of immediatesZack Rusin2014-02-054-44/+86
| | | | | | | | | | | | | | We only supported up to 256 immediates, which isn't enough. We had code which was allocating immediates as an allocated array, but it was always used along a statically backed array for performance reasons. This commit adds code to skip that performance optimization and always use just the dynamically allocated immediates if the number of them is too great. Signed-off-by: Zack Rusin <[email protected]> Reviewed-by: Jose Fonseca <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* gallivm: allow large numbers of temporariesZack Rusin2014-02-054-5/+20
| | | | | | | | | | | | | | The number of allowed temporaries increases almost with every iteration of an api. We used to support 128, then we started increasing and the newer api's support 4096+. So if we notice that the number of temporaries is larger than our statically allocated storage would allow we just treat them as indexable temporaries and allocate them as an array from the start. Signed-off-by: Zack Rusin <[email protected]> Reviewed-by: Jose Fonseca <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* i965/fs: Assume FBO rendering in precompile if MRT.Chris Forbes2014-02-061-4/+5
| | | | | | | | If multiple color outputs are written, this shader is unlikely to be useful with a winsys framebuffer. Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Guess nr_color_regions better in precompileChris Forbes2014-02-061-1/+3
| | | | | Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* docs: Add relnotes for 10.2Chris Forbes2014-02-061-0/+61
| | | | Signed-off-by: Chris Forbes <[email protected]>
* mesa: Bump version to 10.2.0-develChris Forbes2014-02-061-1/+1
| | | | Signed-off-by: Chris Forbes <[email protected]>
* i965: Move intel_prepare_render() above first buffer accessKristian Høgsberg2014-02-052-4/+4
| | | | | | | | | | | | | | The driver is supposed to ensure buffers before any drawing operation, but in do_blit_drawpixels() and do_blit_copypixels() we inspect the buffer format before calling intel_prepare_render(). That was covered up by the unconditional call to intel_prepare_render() in intelMakeCurrent(), but we now only do this on the initial intelMakeCurrent call for a context (to get the size for the initial viewport values). https://bugs.freedesktop.org/show_bug.cgi?id=74083 Signed-off-by: Kristian Høgsberg <[email protected]> Tested-by: Alexander Monakov <[email protected]>
* st/mesa: add MESA_SHADER_COMPUTE case in shader_stage_to_ptarget()Brian Paul2014-02-051-0/+2
| | | | Silences compiler warning. Trivial.
* mesa: re-wrap, fix-up comment text in formats.hBrian Paul2014-02-051-14/+19
| | | | | Wrap to 78 columns, fix comment formatting. Trivial.
* i965/cs: Allow ARB_compute_shader to be enabled via env var.Paul Berry2014-02-052-1/+13
| | | | | | | | | | This will allow testing of compute shader functionality before it is completed. To enable ARB_compute_shader functionality in the i965 driver, set INTEL_COMPUTE_SHADER=1. Reviewed-by: Jordan Justen <[email protected]>
* i965/cs: Create the brw_compute_program struct, and the code to initialize it.Paul Berry2014-02-052-0/+19
| | | | | | v2: Fix comment. Reviewed-by: Jordan Justen <[email protected]>
* glsl/cs: Prohibit mixing of compute and non-compute shaders.Paul Berry2014-02-051-0/+7
| | | | | | | Fixes piglit test: spec/ARB_compute_shader/linker/mix_compute_and_non_compute Reviewed-by: Jordan Justen <[email protected]>
* glsl/cs: Prohibit user-defined ins/outs in compute shaders.Paul Berry2014-02-051-0/+7
| | | | Reviewed-by: Jordan Justen <[email protected]>
* main/cs: Implement query for COMPUTE_WORK_GROUP_SIZE.Paul Berry2014-02-051-0/+18
| | | | | | v2: Improve error message. Reviewed-by: Jordan Justen <[email protected]>
* mesa/cs: Handle compute shader local size during linking.Paul Berry2014-02-053-0/+88
| | | | Reviewed-by: Jordan Justen <[email protected]>
* glsl/cs: Handle compute shader local_size_{x,y,z} declaration.Paul Berry2014-02-059-36/+285
| | | | Reviewed-by: Jordan Justen <[email protected]>
* mesa/cs: Implement MAX_COMPUTE_WORK_GROUP_COUNT constant.Paul Berry2014-02-058-0/+25
| | | | | | | | v2: Document that the 3-element array MaxComputeWorkGroupCount is indexed by dimension. Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* mesa/cs: Implement MAX_COMPUTE_WORK_GROUP_INVOCATIONS constant.Paul Berry2014-02-056-0/+8
| | | | | | | | Reviewed-by: Matt Turner <[email protected]> v2: Use CONTEXT_INT rather than CONTEXT_ENUM. Reviewed-by: Jordan Justen <[email protected]>
* mesa/cs: Implement MAX_COMPUTE_WORK_GROUP_SIZE constant.Paul Berry2014-02-058-0/+56
| | | | | | | | v2: Document that the 3-element array MaxComputeWorkGroupSize is indexed by dimension. Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* mesa/cs: Create the gl_compute_program struct, and the code to initialize it.Paul Berry2014-02-053-0/+32
| | | | Reviewed-by: Matt Turner <[email protected]>
* mesa/cs: Handle compute shaders in _mesa_use_program().Paul Berry2014-02-051-0/+1
| | | | | | v2: do cs after the ordered pipeline stages for consistency. Reviewed-by: Matt Turner <[email protected]>
* glsl/cs: update main.cpp to use the ".comp" extension for compute shaders.Paul Berry2014-02-051-0/+2
| | | | Reviewed-by: Matt Turner <[email protected]>
* glsl/cs: Populate default values for ctx->Const.Program[MESA_SHADER_COMPUTE].Paul Berry2014-02-052-0/+8
| | | | Reviewed-by: Matt Turner <[email protected]>
* mesa/cs: Add a MESA_SHADER_COMPUTE stage and update switch statements.Paul Berry2014-02-059-1/+52
| | | | | | | | | This patch adds MESA_SHADER_COMPUTE to the gl_shader_stage enum. Also, where it is trivial to do so, it adds a compute shader case to switch statements that switch based on the type of shader. This avoids "unhandled switch case" compiler warnings. Reviewed-by: Matt Turner <[email protected]>
* glsl/cs: Change some linker loops to use MESA_SHADER_FRAGMENT as a bound.Paul Berry2014-02-051-4/+4
| | | | | | | | | Linker loops that iterate through all the stages in the pipeline need to use MESA_SHADER_FRAGMENT as a bound, so that we can add an additional MESA_SHADER_COMPUTE stage, without it being erroneously included in the pipeline. Reviewed-by: Matt Turner <[email protected]>
* mesa/cs: Add dispatch API stubs for ARB_compute_shader.Paul Berry2014-02-059-3/+141
| | | | Reviewed-by: Matt Turner <[email protected]>
* mesa/cs: Add extension enable flags for ARB_compute_shader.Paul Berry2014-02-056-0/+9
| | | | Reviewed-by: Matt Turner <[email protected]>
* gallivm: fix F2U opcodeRoland Scheidegger2014-02-051-20/+22
| | | | | | | | | | | | | | | | | | | | | Previously, we were really doing F2I. And also move it to generic section. (Note that for llvmpipe the code generated is definitely bad, due to lack of unsigned conversions with sse. I think though what llvm does (using scalar conversions to 64bit signed either with x87 fpu (32bit) or sse (64bit) including lots of domain changes is quite suboptimal, could do something like is_large = arg >= 2^31 half_arg = 0.5 * arg small_c = fptoint(arg) large_c = fptoint(half_arg) << 1 res = select(is_large, large_c, small_c) which should be much less instructions but that's something llvm should do itself.) This fixes piglit fs/vs-float-uint-conversion.shader_test (maybe more, needs GL 3.0 version override to run.) Reviewed-by: Jose Fonseca <[email protected]> Reviewed-by: Zack Rusin <[email protected]>
* tools/trace: Handle index buffer overflow gracefully.José Fonseca2014-02-051-1/+4
| | | | Trivial.
* docs/GL3.txt: update r600 statusDave Airlie2014-02-051-18/+18
| | | | | | This updates the r600 driver status to 3.3 being fully supported. Signed-off-by: Dave Airlie <[email protected]>
* r600g: add support for geom shaders to r600/r700 chipsets (v2)Dave Airlie2014-02-057-49/+313
| | | | | | | | | | | | | This is my first attempt at enabling r600/r700 geometry shaders, the basic tests pass on both my rv770 and my rv635, It requires this kernel patch: http://www.spinics.net/lists/dri-devel/msg52745.html v2: address Alex comments. Signed-off-by: Dave Airlie <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* r600g: enable GLSL 3.30 on evergreen GPUsDave Airlie2014-02-051-1/+1
| | | | | | | This throws the switch to enable GL 3.3 and GLSL 330. Signed-off-by: Dave Airlie <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* r600g: properly propogate clip dist write valueDave Airlie2014-02-051-0/+1
| | | | | | | | | | This moves the value from the GS shader to the copy shader so the registers are setup correctly. fixes tests/spec/glsl-1.50/execution/geometry/clip-distance-out-values.shader_test Signed-off-by: Dave Airlie <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* r600g: calculate a better value for array_size (v2)Dave Airlie2014-02-051-1/+1
| | | | | | | | | attempt to calculate a better value for array size to avoid breaking apps. v2: use 0xfff like streamout, suggested by Grigori Signed-off-by: Dave Airlie <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* r600g: fix CAYMAN geometry shader supportDave Airlie2014-02-051-2/+6
| | | | | | | | | cayman has a different end of program bit, so do that properly. fixes hangs with geom shader tests on cayman. Signed-off-by: Dave Airlie <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* r600g: fix up shader out misc stuff for copy shaderDave Airlie2014-02-052-1/+16
| | | | | | | | | | | set the correct values so the misc out register is setup correctly for the copy shader. This also updates the state for the gs copy shader so the hw gets programmed correctly. Signed-off-by: Dave Airlie <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* r600g: port the layered surface rendering patch from radeonsiDave Airlie2014-02-053-21/+19
| | | | | | | | | This just makes r600 and evergreen do what the radeonsi codepaths do for layered rendering. This makes the 2d amd_vertex_shader_layer test pass on evergreen. Signed-off-by: Dave Airlie <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* r600g: initial VS output layer supportDave Airlie2014-02-054-14/+50
| | | | | | | This just adds support for emitting the proper value in the VS out misc. Signed-off-by: Dave Airlie <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* r600g: setup const texture buffers for geom shadersDave Airlie2014-02-051-0/+6
| | | | | | | | This just enables the workarounds we have for vertex/pixel shaders for geom shaders as well. Signed-off-by: Dave Airlie <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
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