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* os/os_thread: Revert pipe_barrier pre-processing logic.José Fonseca2014-01-231-1/+1
| | | | | Whitelist platforms instead of blacklisting, as several pthread implementations are missing pthread_barrier_t, in particular MacOSX.
* c11: Fix missing pthread_mutex_timedlock declaration warnings on MacOSX.José Fonseca2014-01-231-1/+7
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* radeon: Adding missing stdio.h include.José Fonseca2014-01-231-0/+1
| | | | | | Became apparent with the C11 thread changes. Unfortunately I didn't have all dependencies to build the driver, and only noticed this issue on build server.
* mapi: Prevent cast from pointer to integer of different size.José Fonseca2014-01-231-1/+1
| | | | On Windows64.
* c11: Update docs/license.html and include verbatim copy of Boost license.José Fonseca2014-01-234-3/+69
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* egl: Use C11 thread abstractions.José Fonseca2014-01-231-19/+7
| | | | | | Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* mapi: Use C11 thread abstractions.José Fonseca2014-01-231-152/+13
| | | | | Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* gallium: Use C11 thread abstractions.José Fonseca2014-01-235-235/+37
| | | | | | | Note that PIPE_ROUTINE now returns an int. Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* c11: Import threads.h emulation library.José Fonseca2014-01-233-0/+992
| | | | | | | | | | | | | | | | Implementation is based of https://gist.github.com/2223710 with the following modifications: - inline implementatation - retain XP compatability - add temporary hack for static mutex initializers (as they are not part of the stack but still widely used internally) - make TIME_UTC a conditional macro (some system headers already define it, so this prevents conflict) - respect HAVE_PTHREAD macro Reviewed-by: Brian Paul <[email protected]> Acked-by: Ian Romanick <[email protected]> Acked-by: Chad Versace <[email protected]>
* os: Remove pipe_static_condvar.José Fonseca2014-01-231-12/+0
| | | | | | Never used. Reviewed-by: Brian Paul <[email protected]>
* docs: Mark ARB_arrays_of_arrays as startedTimothy Arceri2014-01-231-1/+1
| | | | | Signed-off-by: Timothy Arceri <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* glsl: remove remaining is_array variablesTimothy Arceri2014-01-235-59/+35
| | | | | | | | | Previously the reason we needed is_array was because we used array_size == NULL to represent both non-arrays and unsized arrays. Now that we use a non-NULL array_specifier to represent an unsized array, is_array is redundant. Signed-off-by: Timothy Arceri <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* glsl: create type name for arrays of arraysTimothy Arceri2014-01-231-2/+14
| | | | | | | | We need to insert outermost dimensions in the correct spot otherwise the dimension order will be backwards Signed-off-by: Timothy Arceri <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* glsl: Allow arrays of arrays as input to vertex shaderTimothy Arceri2014-01-231-2/+3
| | | | | Signed-off-by: Timothy Arceri <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* glsl: only call mark_max_array if we are assigning anTimothy Arceri2014-01-231-2/+4
| | | | | | | | | | array This change does not help fix or prevent any bugs it just seems reasonable to do Signed-off-by: Timothy Arceri <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* glsl: Add ARB_arrays_of_arrays support to yacc definition and astTimothy Arceri2014-01-237-173/+235
| | | | | | | Adds array specifier object to hold array information Signed-off-by: Timothy Arceri <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* mesa: Add ARB_arrays_of_arraysTimothy Arceri2014-01-233-0/+5
| | | | | Signed-off-by: Timothy Arceri <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* i965/blorp: switch eu-emitter to use FS IR and fs_generatorTopi Pohjolainen2014-01-233-120/+84
| | | | | | | | | | | | | | | | | | No regressions on IVB (piglit quick + unit tests). v2 (Paul): - no need to patch the unit tests anymore. Original logic was altered and unit tests updated to match the fs-generator - lrp emission moves from the blorp compiler core into the emitter here (previously there was a separate refactoring patch which is not really needed anymore as the lrp logic got refactored when the original lrp logic got fixed). - pass 'BRW_BLORP_RENDERBUFFER_BINDING_TABLE_INDEX' to the generator in fs_inst::target instead of hardcoding it Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* i965/fs: add support for BRW_OPCODE_AVG in fs_generatorTopi Pohjolainen2014-01-231-0/+3
| | | | | | | Needed for compiling blorp blit programs. Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* i965/fs: introduce blorp specific rt-write for fs_generatorTopi Pohjolainen2014-01-234-0/+23
| | | | | | | | | | | | | | | | | The compiler for blorp programs likes to emit instructions for the message construction itself meaning that the generator needs to skip any such when blorp programs are translated for the hw. In addition, the binding table control is special for blorp programs and the generator does not need to update the binding tables associated with the compiler bookkeeping (this in fact gets thrown away as the blorp compiler sets the program data in its own way). v2 (Paul): do not hardcode the binding table index but use fs_inst::target instead. Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* i965/fs: allow unit tests to dump the final patched assemblyTopi Pohjolainen2014-01-232-8/+10
| | | | | | | | | | | | | | Unit tests comparing generated blorp programs to known good need to have the dump in designated file instead of in default standard output. The comparison also expects the jump counters of if-else-instructions to be correctly set and hence the dump needs to be taken _after_ 'patch_IF_ELSE()' is run (the default dump of the fs_generator does this before). v2 (Paul): dropped the redundant 'dump_enabled' argument Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* i965/blorp: wrap brw_IF/ELSE/ENDIF() into eu-emitterTopi Pohjolainen2014-01-232-9/+23
| | | | | | | v2 (Paul): renamed emit_if() to emit_cmp_if() Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* i965/blorp: wrap RNDD (/brw_RNDD(&func, /emit_rndd(/)Topi Pohjolainen2014-01-232-2/+8
| | | | | Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* i965/blorp: wrap FRC (/brw_FRC(&func, /emit_frc(/)Topi Pohjolainen2014-01-232-4/+10
| | | | | Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* i965/blorp: wrap MUL (/brw_MUL(&func, /emit_mul(/)Topi Pohjolainen2014-01-232-9/+16
| | | | | Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* i965/blorp: wrap OR (/brw_OR(&func, /emit_or(/)Topi Pohjolainen2014-01-232-24/+31
| | | | | Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* i965/blorp: wrap SHL (/brw_SHL(&func, /emit_shl(/)Topi Pohjolainen2014-01-232-12/+19
| | | | | Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* i965/blorp: wrap SHR (/brw_SHR(&func, /emit_shr(/)Topi Pohjolainen2014-01-232-12/+19
| | | | | Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* i965/blorp: wrap ADD (/brw_ADD(&func, /emit_add(/)Topi Pohjolainen2014-01-232-18/+32
| | | | | | | | In addition, the special case requiring explicit execution size control is wrapped manually. Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* i965/blorp: wrap AND (/brw_AND(&func, /emit_and(/)Topi Pohjolainen2014-01-232-39/+46
| | | | | Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* i965/blorp: wrap MOV (/brw_MOV(&func, /emit_mov(/)Topi Pohjolainen2014-01-232-35/+45
| | | | | | | | In addition, the two special cases requiring explicit execution size control are wrapped manually. Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* i965/blorp: wrap emission of if-equal-assignmentTopi Pohjolainen2014-01-232-24/+12
| | | | | Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* i965/blorp: wrap emission of conditional assignmentTopi Pohjolainen2014-01-232-15/+15
| | | | | Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* i965/blorp: move emission of sample combining into eu-emitterTopi Pohjolainen2014-01-233-9/+24
| | | | | | | | | v2 (Paul): pass the combining opcode as an argument to emit_combine(). This keeps manual_blend_average() selfcontained documentation wise. Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* i965/blorp: move emission of rt-write into eu-emitterTopi Pohjolainen2014-01-233-10/+28
| | | | | Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* i965/blorp: move emission of texture lookup into eu-emitterTopi Pohjolainen2014-01-233-22/+60
| | | | | | | | | | | Resolving of the hardware message type is moved into the emitter also in preparation for switching to use fs_generator. The generator wants to translate the high level op-code into the message type and hence the emitter needs to know the original op-code. Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* i965/fs: introduce non-compressed equivalent of tex_cmsTopi Pohjolainen2014-01-234-0/+13
| | | | | | | v2: introduces 'SHADER_OPCODE_TXF_UMS' also for gen8 Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* i965: rename tex_ms to tex_cmsTopi Pohjolainen2014-01-2310-17/+17
| | | | | | | | | | Prepares for the introduction of non-compressed multi-sampled lookup used in the blorp programs. v2: now also taking into account gen8 Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* i965/blorp: move emission of pixel kill into eu-emitterTopi Pohjolainen2014-01-233-25/+38
| | | | | | | | | The combination of four separate comparison operations and and the masked "and" require special treatment when moving to FS LIR. Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* i965/blorp: introduce separate eu-emitter for blit compilerTopi Pohjolainen2014-01-234-38/+113
| | | | | | | | | | | | Prepares for presenting blorp blit programs using FS IR that allows EU-assembly generation using i965 glsl-compiler backend (fs_generator). v2: rebased on top of endif-jump counter fix (moving the added brw_set_uip_jip() into the emitter) Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* i965: Support 32 texture image units on Haswell+.Kenneth Graunke2014-01-222-4/+7
| | | | | | | | | | | | | | | | | | | | The Intel closed source OpenGL driver recently began supporting 32 texture image units on Haswell. This makes the open source driver support 32 as well. Earlier generations don't have the message header field required to support more than 16 sampler states, so we continue to advertise 16 there. On Haswell, this causes us to advertise: - GL_MAX_TEXTURE_IMAGE_UNITS = 32 - GL_MAX_VERTEX_TEXTURE_IMAGE_UNITS = 32 - GL_MAX_COMBINED_TEXTURE_IMAGE_UNITS = 96 instead of the old values of 16, 16, and 48. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
* i965/fs: Switch from BRW_MAX_TEX_UNIT to the actual limit.Kenneth Graunke2014-01-221-1/+2
| | | | | | | | | | BRW_MAX_TEX_UNIT is about to grow, but only Gen7+ will be able to support the new larger value. On older platforms, we don't want to allocate the extra space - it would just be a waste. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
* mesa: Bump MAX_TEXTURE_IMAGE_UNITS to 32.Kenneth Graunke2014-01-221-1/+1
| | | | | | | | This allows drivers to optionally support more than 16 texture units. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
* i965/vec4: Support arbitrarily large sampler state indices on Haswell+.Kenneth Graunke2014-01-222-3/+26
| | | | | | | | | | Like the scalar backend, we add an offset to the "Sampler State Pointer" field to select a group of 16 samplers, then use the "Sampler Index" field to select within that group. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
* i965/vec4: Refactor sampler message setup.Kenneth Graunke2014-01-221-17/+22
| | | | | | | | | | The next patch adds an additional case where the message header is necessary. So we want to do the g0 copy if inst->header_present is set, rather than inst->texture_offset. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
* i965/vec4: Don't set header_present if texel offsets are all 0.Kenneth Graunke2014-01-221-9/+8
| | | | | | | | | | | | | | In theory, a shader might use textureOffset() but set all the texel offsets to zero. In that case, we don't actually need to set up the message header - zero is the implicit default. By moving the texture_offset setup before the header_present setup, we can easily only set header_present when there are non-zero texel offset values. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
* i965/fs: Support arbitrarily large sampler state indices on Haswell+.Kenneth Graunke2014-01-222-2/+22
| | | | | | | | | | | | | | | | | The message descriptor's "Sampler Index" field is only 4 bits (on all generations of hardware), so it can only represent indices 0 through 15. Haswell introduced a new field in the message header - "Sampler State Pointer". Normally, this is copied straight from g0, but we can also add a byte offset (as long as it's a multiple of 32). This patch uses a "Sampler State Pointer" offset to select a group of 16 sampler states, and then uses the "Sampler Index" field to select the state within that group. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
* i965/fs: Plumb sampler index into emit_texture_gen7.Kenneth Graunke2014-01-223-4/+4
| | | | | | | | We'll need this in the next patch. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
* i965/fs: Refactor sampler message header to duplicate less code.Kenneth Graunke2014-01-221-25/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously, the code to copy g0 to the message header existed in two places - one for the texture offset case, and one for any other case. By treating texture_offset as a special case of header_present, we can remove this duplication and shorten the code. Future patches which add new header fields also won't have to add additional duplication. This also clarifies a confusing construct. The old code contained: } else if (inst->header_present) { if (brw->gen >= 7) { ...explicit copy from g0 to the message header... } else { /* Set up an implied move from g0 to the MRF. */ } } This looks like it might set up an implied move on Sandybridge, which doesn't support those. However, Sandybridge only uses a message header for texture offsets, so it would never hit this code path. The new code avoids this implicit knowledge by only setting up an implied move on Gen4-5. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
* i965: Use get_element_ud to shorten texture header access.Kenneth Graunke2014-01-221-2/+1
| | | | | | | | This is shorter, easier to read, and further from the 80 column limit. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
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